MIPS: KVM: Don't save/restore lo/hi for r6
MIPSr6 doesn't have lo/hi registers, so don't bother saving or restoring them, and don't expose them to userland with the KVM ioctl interface either. In fact the lo/hi registers aren't callee saved in the MIPS ABIs anyway, so there is no need to preserve the host lo/hi values at all when transitioning to and from the guest (which happens via a function call). Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim KrÄmář <rkrcmar@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -178,12 +178,6 @@ void *kvm_mips_build_vcpu_run(void *addr)
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UASM_i_SW(&p, i, offsetof(struct pt_regs, regs[i]), K1);
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}
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/* Save hi/lo */
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uasm_i_mflo(&p, V0);
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UASM_i_SW(&p, V0, offsetof(struct pt_regs, lo), K1);
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uasm_i_mfhi(&p, V1);
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UASM_i_SW(&p, V1, offsetof(struct pt_regs, hi), K1);
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/* Save host status */
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uasm_i_mfc0(&p, V0, C0_STATUS);
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UASM_i_SW(&p, V0, offsetof(struct pt_regs, cp0_status), K1);
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@ -307,12 +301,14 @@ static void *kvm_mips_build_enter_guest(void *addr)
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UASM_i_LW(&p, i, offsetof(struct kvm_vcpu_arch, gprs[i]), K1);
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}
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#ifndef CONFIG_CPU_MIPSR6
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/* Restore hi/lo */
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UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, hi), K1);
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uasm_i_mthi(&p, K0);
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UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, lo), K1);
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uasm_i_mtlo(&p, K0);
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#endif
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/* Restore the guest's k0/k1 registers */
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UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, gprs[K0]), K1);
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@ -408,12 +404,14 @@ void *kvm_mips_build_exit(void *addr)
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UASM_i_SW(&p, i, offsetof(struct kvm_vcpu_arch, gprs[i]), K1);
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}
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#ifndef CONFIG_CPU_MIPSR6
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/* We need to save hi/lo and restore them on the way out */
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uasm_i_mfhi(&p, T0);
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UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, hi), K1);
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uasm_i_mflo(&p, T0);
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UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, lo), K1);
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#endif
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/* Finally save guest k1 to VCPU */
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uasm_i_ehb(&p);
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@ -663,12 +661,6 @@ static void *kvm_mips_build_ret_to_host(void *addr)
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UASM_i_LW(&p, i, offsetof(struct pt_regs, regs[i]), K1);
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}
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UASM_i_LW(&p, K0, offsetof(struct pt_regs, hi), K1);
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uasm_i_mthi(&p, K0);
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UASM_i_LW(&p, K0, offsetof(struct pt_regs, lo), K1);
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uasm_i_mtlo(&p, K0);
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/* Restore RDHWR access */
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UASM_i_LA_mostly(&p, K0, (long)&hwrena);
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uasm_i_lw(&p, K0, uasm_rel_lo((long)&hwrena), K0);
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@ -521,8 +521,10 @@ static u64 kvm_mips_get_one_regs[] = {
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KVM_REG_MIPS_R30,
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KVM_REG_MIPS_R31,
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#ifndef CONFIG_CPU_MIPSR6
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KVM_REG_MIPS_HI,
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KVM_REG_MIPS_LO,
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#endif
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KVM_REG_MIPS_PC,
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KVM_REG_MIPS_CP0_INDEX,
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@ -666,12 +668,14 @@ static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
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case KVM_REG_MIPS_R0 ... KVM_REG_MIPS_R31:
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v = (long)vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0];
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break;
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#ifndef CONFIG_CPU_MIPSR6
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case KVM_REG_MIPS_HI:
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v = (long)vcpu->arch.hi;
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break;
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case KVM_REG_MIPS_LO:
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v = (long)vcpu->arch.lo;
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break;
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#endif
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case KVM_REG_MIPS_PC:
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v = (long)vcpu->arch.pc;
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break;
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@ -887,12 +891,14 @@ static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,
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case KVM_REG_MIPS_R1 ... KVM_REG_MIPS_R31:
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vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0] = v;
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break;
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#ifndef CONFIG_CPU_MIPSR6
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case KVM_REG_MIPS_HI:
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vcpu->arch.hi = v;
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break;
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case KVM_REG_MIPS_LO:
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vcpu->arch.lo = v;
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break;
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#endif
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case KVM_REG_MIPS_PC:
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vcpu->arch.pc = v;
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break;
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