drm/exynos/mixer: move mode commit to enable callback
Mode commit should not be called for every plane separately. It is enough to call it once in enable callback. The change also requires that the interlace check is moved to mixer_commit. It should be done in the same patch to avoid regression. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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@ -477,6 +477,11 @@ static void mixer_commit(struct mixer_context *ctx)
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{
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struct drm_display_mode *mode = &ctx->crtc->base.state->adjusted_mode;
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if (mode->flags & DRM_MODE_FLAG_INTERLACE)
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__set_bit(MXR_BIT_INTERLACE, &ctx->flags);
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else
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__clear_bit(MXR_BIT_INTERLACE, &ctx->flags);
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/* setup display size */
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if (ctx->mxr_ver == MXR_VER_128_0_0_184) {
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u32 val = MXR_MXR_RES_HEIGHT(mode->vdisplay)
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@ -494,7 +499,6 @@ static void vp_video_buffer(struct mixer_context *ctx,
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{
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struct exynos_drm_plane_state *state =
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to_exynos_plane_state(plane->base.state);
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struct drm_display_mode *mode = &state->base.crtc->state->adjusted_mode;
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struct mixer_resources *res = &ctx->mixer_res;
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struct drm_framebuffer *fb = state->base.fb;
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unsigned int priority = state->base.normalized_zpos + 1;
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@ -509,8 +513,7 @@ static void vp_video_buffer(struct mixer_context *ctx,
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luma_addr[0] = exynos_drm_fb_dma_addr(fb, 0);
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chroma_addr[0] = exynos_drm_fb_dma_addr(fb, 1);
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if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
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__set_bit(MXR_BIT_INTERLACE, &ctx->flags);
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if (test_bit(MXR_BIT_INTERLACE, &ctx->flags)) {
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if (is_tiled) {
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luma_addr[1] = luma_addr[0] + 0x40;
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chroma_addr[1] = chroma_addr[0] + 0x40;
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@ -519,7 +522,6 @@ static void vp_video_buffer(struct mixer_context *ctx,
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chroma_addr[1] = chroma_addr[0] + fb->pitches[0];
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}
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} else {
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__clear_bit(MXR_BIT_INTERLACE, &ctx->flags);
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luma_addr[1] = 0;
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chroma_addr[1] = 0;
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}
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@ -571,7 +573,6 @@ static void vp_video_buffer(struct mixer_context *ctx,
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mixer_cfg_layer(ctx, plane->index, priority, true);
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mixer_cfg_vp_blend(ctx);
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mixer_commit(ctx);
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spin_unlock_irqrestore(&res->reg_slock, flags);
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@ -591,7 +592,6 @@ static void mixer_graph_buffer(struct mixer_context *ctx,
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{
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struct exynos_drm_plane_state *state =
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to_exynos_plane_state(plane->base.state);
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struct drm_display_mode *mode = &state->base.crtc->state->adjusted_mode;
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struct mixer_resources *res = &ctx->mixer_res;
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struct drm_framebuffer *fb = state->base.fb;
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unsigned int priority = state->base.normalized_zpos + 1;
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@ -637,11 +637,6 @@ static void mixer_graph_buffer(struct mixer_context *ctx,
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+ (state->src.x * fb->format->cpp[0])
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+ (state->src.y * fb->pitches[0]);
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if (mode->flags & DRM_MODE_FLAG_INTERLACE)
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__set_bit(MXR_BIT_INTERLACE, &ctx->flags);
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else
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__clear_bit(MXR_BIT_INTERLACE, &ctx->flags);
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spin_lock_irqsave(&res->reg_slock, flags);
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/* setup format */
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@ -668,7 +663,6 @@ static void mixer_graph_buffer(struct mixer_context *ctx,
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mixer_cfg_layer(ctx, win, priority, true);
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mixer_cfg_gfx_blend(ctx, win, is_alpha_format(fb->format->format));
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mixer_commit(ctx);
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/* layer update mandatory for mixer 16.0.33.0 */
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if (ctx->mxr_ver == MXR_VER_16_0_33_0 ||
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@ -1021,6 +1015,8 @@ static void mixer_enable(struct exynos_drm_crtc *crtc)
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}
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mixer_win_reset(ctx);
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mixer_commit(ctx);
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mixer_vsync_set_update(ctx, true);
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set_bit(MXR_BIT_POWERED, &ctx->flags);
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