arm64: dts: freescale: Add imx8mp-venice-gw73xx-2x
The Gateworks imx8mp-venice-gw73xx-2x consists of a SOM + baseboard. The GW702x SOM contains the following: - i.MX8M Plus SoC - LPDDR4 memory - eMMC Boot device - Gateworks System Controller (GSC) with integrated EEPROM, button controller, and ADC's - PMIC - SOM connector providing: - eQoS GbE MII - 1x SPI - 2x I2C - 4x UART - 2x USB 3.0 - 1x PCI - 1x SDIO (4-bit 3.3V) - 1x SDIO (4-bit 3.3V/1.8V) - GPIO The GW73xx Baseboard contains the following: - GPS - microSD - off-board I/O connector with SPI - off-board I/O connector with I2C, and GPIO - off-board I/O connector with MIPI DSI, MIPI CSI, I2C, and GPIO - off-board I/O connector with RS232 and RS485 - EERPOM - USB 3.0 HUB - USB 3.0 TypeA socket - USB 2.0 Micro-B OTG socket - Accelerometer - 1x GbE (eQoS) - 1x GbE (PCI) - PCIe clock generator - PCIe switch - 2x full-length miniPCIe socket with PCI and USB2.0 - 1x full-length miniPCIe socket with PCI/USB3 (via mux) SIM, and USB2.0 - 1x half-length miniPCIe socket with USB2.0 and USB3.0 - USB Type-C with USB PD Sink capability and peripheral support - USB Type-C with USB 3.0 host support - on-board 802.11abgnac with Bluetooth 5.2 - Wide range DC input supply Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Tim Harvey
Shawn Guo
parent
86c43ae03a
commit
716ced3082
@ -103,6 +103,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw73xx-2x.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw7905-2x.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb
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19
arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx-2x.dts
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19
arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx-2x.dts
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@ -0,0 +1,19 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2023 Gateworks Corporation
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*/
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/dts-v1/;
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#include "imx8mp.dtsi"
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#include "imx8mp-venice-gw702x.dtsi"
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#include "imx8mp-venice-gw73xx.dtsi"
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/ {
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model = "Gateworks Venice GW73xx-2x i.MX8MP Development Kit";
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compatible = "gateworks,imx8mp-gw73xx-2x", "fsl,imx8mp";
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chosen {
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stdout-path = &uart2;
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};
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};
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414
arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
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414
arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
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@ -0,0 +1,414 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2023 Gateworks Corporation
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/phy/phy-imx8-pcie.h>
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/ {
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led-controller {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_leds>;
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led-0 {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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led-1 {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_RED>;
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gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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pcie0_refclk: clock-pcie0 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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};
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pps {
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compatible = "pps-gpio";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pps>;
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gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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reg_usb1_vbus: regulator-usb1 {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_usb1_en>;
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regulator-name = "usb1_vbus";
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gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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reg_usb2_vbus: regulator-usb2 {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_usb2_en>;
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regulator-name = "usb2_vbus";
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gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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reg_wifi_en: regulator-wifi-en {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_wl>;
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regulator-name = "wl";
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gpio = <&gpio4 19 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <100>;
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enable-active-high;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
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regulator-name = "VDD_3V3_SD";
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enable-active-high;
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gpio = <&gpio2 19 0>; /* SD2_RESET */
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off-on-delay-us = <12000>;
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regulator-max-microvolt = <3300000>;
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regulator-min-microvolt = <3300000>;
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startup-delay-us = <100>;
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};
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};
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/* off-board header */
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi2>;
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cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&gpio4 {
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gpio-line-names =
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"", "", "", "",
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"", "", "", "",
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"dio1", "", "", "dio0",
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"", "", "pci_usb_sel", "",
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"", "", "", "",
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"", "", "rs485_en", "rs485_term",
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"", "", "", "rs485_half",
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"pci_wdis#", "", "", "";
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};
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&i2c2 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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accelerometer@19 {
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compatible = "st,lis2de12";
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reg = <0x19>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_accel>;
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st,drdy-int-pin = <1>;
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interrupt-parent = <&gpio4>;
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interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
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interrupt-names = "INT1";
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};
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};
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&pcie_phy {
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fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
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fsl,clkreq-unsupported;
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clocks = <&pcie0_refclk>;
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clock-names = "ref";
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status = "okay";
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcie0>;
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reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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/* GPS */
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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/* bluetooth HCI */
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_bten>;
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cts-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
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rts-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
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status = "okay";
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bluetooth {
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compatible = "brcm,bcm4330-bt";
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shutdown-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
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};
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};
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/* RS232 */
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart4>;
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status = "okay";
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};
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/* USB1 - OTG */
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&usb3_0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb1>;
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fsl,over-current-active-low;
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status = "okay";
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};
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&usb3_phy0 {
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vbus-supply = <®_usb1_vbus>;
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status = "okay";
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};
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&usb_dwc3_0 {
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/* dual role is implemented but not a full featured OTG */
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adp-disable;
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hnp-disable;
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srp-disable;
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dr_mode = "otg";
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usb-role-switch;
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role-switch-default-mode = "peripheral";
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status = "okay";
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connector {
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compatible = "gpio-usb-b-connector", "usb-b-connector";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbcon1>;
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type = "micro";
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label = "otg";
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id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
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};
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};
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/* USB2 - USB3.0 Hub */
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&usb3_1 {
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fsl,permanently-attached;
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fsl,disable-port-power-control;
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status = "okay";
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};
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&usb3_phy1 {
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vbus-supply = <®_usb2_vbus>;
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status = "okay";
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};
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&usb_dwc3_1 {
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dr_mode = "host";
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status = "okay";
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};
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/* SDIO WiFi */
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1>;
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bus-width = <4>;
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non-removable;
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vmmc-supply = <®_wifi_en>;
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status = "okay";
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};
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/* microSD */
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&usdhc2 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
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cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
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bus-width = <4>;
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vmmc-supply = <®_usdhc2_vmmc>;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */
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MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */
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MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x40000106 /* PCIE_USBSEL */
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MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x40000106 /* RS485_HALF */
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MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x40000106 /* RS485_EN */
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MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23 0x40000106 /* RS485_TERM */
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MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCIE_WDIS# */
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>;
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};
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pinctrl_accel: accelgrp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ */
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>;
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};
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pinctrl_bten: btengrp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI1_TXD4__GPIO4_IO16 0x146
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>;
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};
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pinctrl_gpio_leds: gpioledgrp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */
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MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */
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>;
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};
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pinctrl_pcie0: pcie0grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106
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>;
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};
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pinctrl_pps: ppsgrp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146
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>;
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};
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pinctrl_reg_wl: regwlgrp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x146
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>;
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};
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pinctrl_reg_usb1_en: regusb1grp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x146 /* USB1_EN */
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>;
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};
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pinctrl_usb1: usb1grp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x140 /* USB1_FLT# */
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>;
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};
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pinctrl_usbcon1: usbcon1grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140 /* USB1_ID */
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>;
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};
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pinctrl_reg_usb2_en: regusb2grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12 0x146 /* USBHUB_RST# */
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>;
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};
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pinctrl_spi2: spi2grp {
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fsl,pins = <
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MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140
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MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
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MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
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MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
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MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140
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MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140
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MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08 0x140
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MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x140
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>;
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};
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pinctrl_uart4: uart4grp {
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fsl,pins = <
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MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x140
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MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190
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MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0
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MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0
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MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0
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MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0
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MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
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MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
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MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
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MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
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MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
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MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
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MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
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>;
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};
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|
||||
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_vmmc: usdhc2-vmmc-grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_RESET_B__USDHC2_RESET_B 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
|
||||
>;
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user