arm64: Do not enable IRQs for ct_user_exit
[ Upstream commit 9034f62515
]
For el0_dbg and el0_error, DAIF bits get explicitly cleared before
calling ct_user_exit.
When context tracking is disabled, DAIF gets set (almost) immediately
after. When context tracking is enabled, among the first things done
is disabling IRQs.
What is actually needed is:
- PSR.D = 0 so the system can be debugged (should be already the case)
- PSR.A = 0 so async error can be handled during context tracking
Do not clear PSR.I in those two locations.
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
010bfbc934
commit
723ba79384
@ -824,7 +824,7 @@ el0_dbg:
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mov x1, x25
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mov x1, x25
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mov x2, sp
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mov x2, sp
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bl do_debug_exception
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bl do_debug_exception
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enable_daif
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enable_da_f
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ct_user_exit
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ct_user_exit
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b ret_to_user
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b ret_to_user
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el0_inv:
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el0_inv:
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@ -876,7 +876,7 @@ el0_error_naked:
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enable_dbg
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enable_dbg
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mov x0, sp
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mov x0, sp
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bl do_serror
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bl do_serror
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enable_daif
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enable_da_f
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ct_user_exit
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ct_user_exit
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b ret_to_user
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b ret_to_user
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ENDPROC(el0_error)
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ENDPROC(el0_error)
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