drm/i915/dsi: add separate init timer mask definition for ICL DSI

Having a separate definition will be useful for splitting VLV and ICL
register files.

Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220217224023.3994777-2-jani.nikula@intel.com
This commit is contained in:
Jani Nikula 2022-02-18 00:40:21 +02:00
parent 8f0991ccce
commit 72935696f5
2 changed files with 2 additions and 1 deletions

View File

@ -570,7 +570,7 @@ gen11_dsi_setup_dphy_timings(struct intel_encoder *encoder,
/* Program T-INIT master registers */ /* Program T-INIT master registers */
for_each_dsi_port(port, intel_dsi->ports) { for_each_dsi_port(port, intel_dsi->ports) {
tmp = intel_de_read(dev_priv, ICL_DSI_T_INIT_MASTER(port)); tmp = intel_de_read(dev_priv, ICL_DSI_T_INIT_MASTER(port));
tmp &= ~MASTER_INIT_TIMER_MASK; tmp &= ~DSI_T_INIT_MASTER_MASK;
tmp |= intel_dsi->init_count; tmp |= intel_dsi->init_count;
intel_de_write(dev_priv, ICL_DSI_T_INIT_MASTER(port), tmp); intel_de_write(dev_priv, ICL_DSI_T_INIT_MASTER(port), tmp);
} }

View File

@ -9008,6 +9008,7 @@ enum skl_power_gate {
#define ICL_DSI_T_INIT_MASTER(port) _MMIO_PORT(port, \ #define ICL_DSI_T_INIT_MASTER(port) _MMIO_PORT(port, \
_ICL_DSI_T_INIT_MASTER_0,\ _ICL_DSI_T_INIT_MASTER_0,\
_ICL_DSI_T_INIT_MASTER_1) _ICL_DSI_T_INIT_MASTER_1)
#define DSI_T_INIT_MASTER_MASK REG_GENMASK(15, 0)
#define _DPHY_CLK_TIMING_PARAM_0 0x162180 #define _DPHY_CLK_TIMING_PARAM_0 0x162180
#define _DPHY_CLK_TIMING_PARAM_1 0x6c180 #define _DPHY_CLK_TIMING_PARAM_1 0x6c180