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ARM: ux500: fix I2C4 clock bit

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The PCLK for I2C4 is controlled by bit 10 in the PCKEN registers
while the KCLK is controlled by bit 9 on the KCKEN, it's
one of these odd assymetric things. Correct the PCLK bit to 10.

Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Linus Walleij 2013-10-18 10:39:58 +02:00
parent d591640adc
commit 72b3e249ce
1 changed files with 1 additions and 1 deletions
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2
arch/arm/boot/dts/ste-dbx5x0.dtsi
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@ -694,7 +694,7 @@
clock-frequency = <400000>;
clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 9>;
clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 10>;
clock-names = "i2cclk", "apb_pclk";
};