Merge commit '3e10585335b7967326ca7b4118cada0d2d00a2ab' into v5.12/vfio/next
Update to new follow_pte() definition
This commit is contained in:
Alex Williamson
commit
72d6e4871f
@ -122,6 +122,7 @@ ForEachMacros:
|
||||
- 'drm_for_each_bridge_in_chain'
|
||||
- 'drm_for_each_connector_iter'
|
||||
- 'drm_for_each_crtc'
|
||||
- 'drm_for_each_crtc_reverse'
|
||||
- 'drm_for_each_encoder'
|
||||
- 'drm_for_each_encoder_mask'
|
||||
- 'drm_for_each_fb'
|
||||
@ -203,14 +204,13 @@ ForEachMacros:
|
||||
- 'for_each_matching_node'
|
||||
- 'for_each_matching_node_and_match'
|
||||
- 'for_each_member'
|
||||
- 'for_each_mem_region'
|
||||
- 'for_each_memblock_type'
|
||||
- 'for_each_memcg_cache_index'
|
||||
- 'for_each_mem_pfn_range'
|
||||
- '__for_each_mem_range'
|
||||
- 'for_each_mem_range'
|
||||
- '__for_each_mem_range_rev'
|
||||
- 'for_each_mem_range_rev'
|
||||
- 'for_each_mem_region'
|
||||
- 'for_each_migratetype_order'
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||||
- 'for_each_msi_entry'
|
||||
- 'for_each_msi_entry_safe'
|
||||
@ -276,10 +276,8 @@ ForEachMacros:
|
||||
- 'for_each_reserved_mem_range'
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- 'for_each_reserved_mem_region'
|
||||
- 'for_each_rtd_codec_dais'
|
||||
- 'for_each_rtd_codec_dais_rollback'
|
||||
- 'for_each_rtd_components'
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- 'for_each_rtd_cpu_dais'
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||||
- 'for_each_rtd_cpu_dais_rollback'
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- 'for_each_rtd_dais'
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||||
- 'for_each_set_bit'
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||||
- 'for_each_set_bit_from'
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@ -298,6 +296,7 @@ ForEachMacros:
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||||
- '__for_each_thread'
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- 'for_each_thread'
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- 'for_each_unicast_dest_pgid'
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- 'for_each_vsi'
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- 'for_each_wakeup_source'
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- 'for_each_zone'
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- 'for_each_zone_zonelist'
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@ -330,6 +329,7 @@ ForEachMacros:
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||||
- 'hlist_for_each_entry_rcu_bh'
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- 'hlist_for_each_entry_rcu_notrace'
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- 'hlist_for_each_entry_safe'
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- 'hlist_for_each_entry_srcu'
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- '__hlist_for_each_rcu'
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- 'hlist_for_each_safe'
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- 'hlist_nulls_for_each_entry'
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@ -378,6 +378,7 @@ ForEachMacros:
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- 'list_for_each_entry_safe_continue'
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- 'list_for_each_entry_safe_from'
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- 'list_for_each_entry_safe_reverse'
|
||||
- 'list_for_each_entry_srcu'
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- 'list_for_each_prev'
|
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- 'list_for_each_prev_safe'
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- 'list_for_each_safe'
|
||||
@ -411,6 +412,8 @@ ForEachMacros:
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||||
- 'of_property_for_each_string'
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- 'of_property_for_each_u32'
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- 'pci_bus_for_each_resource'
|
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- 'pcl_for_each_chunk'
|
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- 'pcl_for_each_segment'
|
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- 'pcm_for_each_format'
|
||||
- 'ping_portaddr_for_each_entry'
|
||||
- 'plist_for_each'
|
||||
|
||||
9
.mailmap
9
.mailmap
@ -37,6 +37,7 @@ Andrew Murray <amurray@thegoodpenguin.co.uk> <amurray@embedded-bits.co.uk>
|
||||
Andrew Murray <amurray@thegoodpenguin.co.uk> <andrew.murray@arm.com>
|
||||
Andrew Vasquez <andrew.vasquez@qlogic.com>
|
||||
Andrey Ryabinin <ryabinin.a.a@gmail.com> <a.ryabinin@samsung.com>
|
||||
Andrey Ryabinin <ryabinin.a.a@gmail.com> <aryabinin@virtuozzo.com>
|
||||
Andy Adamson <andros@citi.umich.edu>
|
||||
Antoine Tenart <atenart@kernel.org> <antoine.tenart@bootlin.com>
|
||||
Antoine Tenart <atenart@kernel.org> <antoine.tenart@free-electrons.com>
|
||||
@ -179,6 +180,8 @@ Kees Cook <keescook@chromium.org> <kees.cook@canonical.com>
|
||||
Kees Cook <keescook@chromium.org> <keescook@google.com>
|
||||
Kees Cook <keescook@chromium.org> <kees@outflux.net>
|
||||
Kees Cook <keescook@chromium.org> <kees@ubuntu.com>
|
||||
Keith Busch <kbusch@kernel.org> <keith.busch@intel.com>
|
||||
Keith Busch <kbusch@kernel.org> <keith.busch@linux.intel.com>
|
||||
Kenneth W Chen <kenneth.w.chen@intel.com>
|
||||
Konstantin Khlebnikov <koct9i@gmail.com> <khlebnikov@yandex-team.ru>
|
||||
Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com>
|
||||
@ -199,6 +202,9 @@ Li Yang <leoyang.li@nxp.com> <leoli@freescale.com>
|
||||
Li Yang <leoyang.li@nxp.com> <leo@zh-kernel.org>
|
||||
Lukasz Luba <lukasz.luba@arm.com> <l.luba@partner.samsung.com>
|
||||
Maciej W. Rozycki <macro@mips.com> <macro@imgtec.com>
|
||||
Maciej W. Rozycki <macro@orcam.me.uk> <macro@linux-mips.org>
|
||||
Manivannan Sadhasivam <mani@kernel.org> <manivannanece23@gmail.com>
|
||||
Manivannan Sadhasivam <mani@kernel.org> <manivannan.sadhasivam@linaro.org>
|
||||
Marcin Nowakowski <marcin.nowakowski@mips.com> <marcin.nowakowski@imgtec.com>
|
||||
Marc Zyngier <maz@kernel.org> <marc.zyngier@arm.com>
|
||||
Mark Brown <broonie@sirena.org.uk>
|
||||
@ -244,6 +250,7 @@ Morten Welinder <welinder@anemone.rentec.com>
|
||||
Morten Welinder <welinder@darter.rentec.com>
|
||||
Morten Welinder <welinder@troll.com>
|
||||
Mythri P K <mythripk@ti.com>
|
||||
Nathan Chancellor <nathan@kernel.org> <natechancellor@gmail.com>
|
||||
Nguyen Anh Quynh <aquynh@gmail.com>
|
||||
Nicolas Ferre <nicolas.ferre@microchip.com> <nicolas.ferre@atmel.com>
|
||||
Nicolas Pitre <nico@fluxnic.net> <nicolas.pitre@linaro.org>
|
||||
@ -334,6 +341,8 @@ Vinod Koul <vkoul@kernel.org> <vkoul@infradead.org>
|
||||
Viresh Kumar <vireshk@kernel.org> <viresh.kumar2@arm.com>
|
||||
Viresh Kumar <vireshk@kernel.org> <viresh.kumar@st.com>
|
||||
Viresh Kumar <vireshk@kernel.org> <viresh.linux@gmail.com>
|
||||
Viresh Kumar <viresh.kumar@linaro.org> <viresh.kumar@linaro.org>
|
||||
Viresh Kumar <viresh.kumar@linaro.org> <viresh.kumar@linaro.com>
|
||||
Vivien Didelot <vivien.didelot@gmail.com> <vivien.didelot@savoirfairelinux.com>
|
||||
Vlad Dogaru <ddvlad@gmail.com> <vlad.dogaru@intel.com>
|
||||
Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@parallels.com>
|
||||
|
||||
@ -1,3 +1,10 @@
|
||||
What: /sys/bus/vmbus/hibernation
|
||||
Date: Jan 2021
|
||||
KernelVersion: 5.12
|
||||
Contact: Dexuan Cui <decui@microsoft.com>
|
||||
Description: Whether the host supports hibernation for the VM.
|
||||
Users: Daemon that sets up swap partition/file for hibernation.
|
||||
|
||||
What: /sys/bus/vmbus/devices/<UUID>/id
|
||||
Date: Jul 2009
|
||||
KernelVersion: 2.6.31
|
||||
|
||||
@ -198,6 +198,7 @@ Description:
|
||||
Units after application of scale and offset are m/s^2.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_angl_raw
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_anglY_raw
|
||||
KernelVersion: 4.17
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
@ -1812,3 +1813,13 @@ Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Unscaled light intensity according to CIE 1931/DIN 5033 color space.
|
||||
Units after application of scale are nano nanowatts per square meter.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_anglY_label
|
||||
KernelVersion: 5.12
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Optional symbolic label for channel Y.
|
||||
For Intel hid hinge sensor, the label values are:
|
||||
hinge, keyboard, screen. It means the three channels
|
||||
each correspond respectively to hinge angle, keyboard angle,
|
||||
and screen angle.
|
||||
|
||||
31
Documentation/ABI/testing/sysfs-bus-iio-dac-ad5766
Normal file
31
Documentation/ABI/testing/sysfs-bus-iio-dac-ad5766
Normal file
@ -0,0 +1,31 @@
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_dither_enable
|
||||
KernelVersion: 5.12
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Dither enable. Write 1 to enable dither or 0 to disable it.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_dither_invert
|
||||
KernelVersion: 5.12
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Inverts the dither applied to the selected DAC channel. Dither is not
|
||||
inverted by default. Write "1" to invert dither.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_dither_scale_available
|
||||
KernelVersion: 5.12
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Returns possible scalings available for the current channel.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_dither_scale
|
||||
KernelVersion: 5.12
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Scales the dither before it is applied to the selected channel.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_dither_source
|
||||
KernelVersion: 5.12
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Selects dither source applied to the selected channel. Write "0" to
|
||||
select N0 source, write "1" to select N1 source.
|
||||
@ -49,6 +49,15 @@ Description: Holds a comma separated list of device unique_ids that
|
||||
If a device is authorized automatically during boot its
|
||||
boot attribute is set to 1.
|
||||
|
||||
What: /sys/bus/thunderbolt/devices/.../domainX/deauthorization
|
||||
Date: May 2021
|
||||
KernelVersion: 5.12
|
||||
Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
|
||||
Description: This attribute tells whether the system supports
|
||||
de-authorization of devices. Value of 1 means user can
|
||||
de-authorize PCIe tunnel by writing 0 to authorized
|
||||
attribute under each device.
|
||||
|
||||
What: /sys/bus/thunderbolt/devices/.../domainX/iommu_dma_protection
|
||||
Date: Mar 2019
|
||||
KernelVersion: 4.21
|
||||
@ -76,6 +85,8 @@ Description: This attribute holds current Thunderbolt security level
|
||||
usbonly Automatically tunnel USB controller of the
|
||||
connected Thunderbolt dock (and Display Port). All
|
||||
PCIe links downstream of the dock are removed.
|
||||
nopcie USB4 system where PCIe tunneling is disabled from
|
||||
the BIOS.
|
||||
======= ==================================================
|
||||
|
||||
What: /sys/bus/thunderbolt/devices/.../authorized
|
||||
@ -84,22 +95,25 @@ KernelVersion: 4.13
|
||||
Contact: thunderbolt-software@lists.01.org
|
||||
Description: This attribute is used to authorize Thunderbolt devices
|
||||
after they have been connected. If the device is not
|
||||
authorized, no devices such as PCIe and Display port are
|
||||
available to the system.
|
||||
authorized, no PCIe devices are available to the system.
|
||||
|
||||
Contents of this attribute will be 0 when the device is not
|
||||
yet authorized.
|
||||
|
||||
Possible values are supported:
|
||||
|
||||
== ===========================================
|
||||
== ===================================================
|
||||
0 The device will be de-authorized (only supported if
|
||||
deauthorization attribute under domain contains 1)
|
||||
1 The device will be authorized and connected
|
||||
== ===========================================
|
||||
== ===================================================
|
||||
|
||||
When key attribute contains 32 byte hex string the possible
|
||||
values are:
|
||||
|
||||
== ========================================================
|
||||
0 The device will be de-authorized (only supported if
|
||||
deauthorization attribute under domain contains 1)
|
||||
1 The 32 byte hex string is added to the device NVM and
|
||||
the device is authorized.
|
||||
2 Send a challenge based on the 32 byte hex string. If the
|
||||
|
||||
6
Documentation/ABI/testing/sysfs-class-led-trigger-tty
Normal file
6
Documentation/ABI/testing/sysfs-class-led-trigger-tty
Normal file
@ -0,0 +1,6 @@
|
||||
What: /sys/class/leds/<led>/ttyname
|
||||
Date: Dec 2020
|
||||
KernelVersion: 5.10
|
||||
Contact: linux-leds@vger.kernel.org
|
||||
Description:
|
||||
Specifies the tty device name of the triggering tty
|
||||
@ -337,3 +337,18 @@ Contact: netdev@vger.kernel.org
|
||||
Description:
|
||||
32-bit unsigned integer counting the number of times the link has
|
||||
been down
|
||||
|
||||
What: /sys/class/net/<iface>/threaded
|
||||
Date: Jan 2021
|
||||
KernelVersion: 5.12
|
||||
Contact: netdev@vger.kernel.org
|
||||
Description:
|
||||
Boolean value to control the threaded mode per device. User could
|
||||
set this value to enable/disable threaded mode for all napi
|
||||
belonging to this device, without the need to do device up/down.
|
||||
|
||||
Possible values:
|
||||
== ==================================
|
||||
0 threaded mode disabled for this dev
|
||||
1 threaded mode enabled for this dev
|
||||
== ==================================
|
||||
|
||||
@ -3,5 +3,12 @@ Date: August 2018
|
||||
KernelVersion: 4.20
|
||||
Contact: netdev@vger.kernel.org
|
||||
Description:
|
||||
String indicating the type of tagging protocol used by the
|
||||
DSA slave network device.
|
||||
On read, this file returns a string indicating the type of
|
||||
tagging protocol used by the DSA network devices that are
|
||||
attached to this master interface.
|
||||
On write, this file changes the tagging protocol of the
|
||||
attached DSA switches, if this operation is supported by the
|
||||
driver. Changing the tagging protocol must be done with the DSA
|
||||
interfaces and the master interface all administratively down.
|
||||
See the "name" field of each registered struct dsa_device_ops
|
||||
for a list of valid values.
|
||||
|
||||
@ -48,3 +48,13 @@ Description:
|
||||
|
||||
Write a number ranging from 1 to 254 to delete a previously
|
||||
created qmap mux based network device.
|
||||
|
||||
What: /sys/class/net/<qmimux iface>/qmap/mux_id
|
||||
Date: January 2021
|
||||
KernelVersion: 5.12
|
||||
Contact: Daniele Palmas <dnlplm@gmail.com>
|
||||
Description:
|
||||
Unsigned integer
|
||||
|
||||
Indicates the mux id associated to the qmimux network interface
|
||||
during its creation.
|
||||
|
||||
@ -105,7 +105,25 @@ Date: April 2017
|
||||
Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>
|
||||
Description:
|
||||
Revision number of the supported USB Power Delivery
|
||||
specification, or 0 when USB Power Delivery is not supported.
|
||||
specification, or 0.0 when USB Power Delivery is not supported.
|
||||
|
||||
Example values:
|
||||
- "2.0": USB Power Delivery Release 2.0
|
||||
- "3.0": USB Power Delivery Release 3.0
|
||||
- "3.1": USB Power Delivery Release 3.1
|
||||
|
||||
What: /sys/class/typec/<port>-{partner|cable}/usb_power_delivery_revision
|
||||
Date: January 2021
|
||||
Contact: Benson Leung <bleung@chromium.org>
|
||||
Description:
|
||||
Revision number of the supported USB Power Delivery
|
||||
specification of the port partner or cable, or 0.0 when USB
|
||||
Power Delivery is not supported.
|
||||
|
||||
Example values:
|
||||
- "2.0": USB Power Delivery Release 2.0
|
||||
- "3.0": USB Power Delivery Release 3.0
|
||||
- "3.1": USB Power Delivery Release 3.1
|
||||
|
||||
What: /sys/class/typec/<port>/usb_typec_revision
|
||||
Date: April 2017
|
||||
|
||||
@ -377,3 +377,35 @@ Description: This gives a control to limit the bio size in f2fs.
|
||||
Default is zero, which will follow underlying block layer limit,
|
||||
whereas, if it has a certain bytes value, f2fs won't submit a
|
||||
bio larger than that size.
|
||||
|
||||
What: /sys/fs/f2fs/<disk>/stat/sb_status
|
||||
Date: December 2020
|
||||
Contact: "Chao Yu" <yuchao0@huawei.com>
|
||||
Description: Show status of f2fs superblock in real time.
|
||||
|
||||
====== ===================== =================================
|
||||
value sb status macro description
|
||||
0x1 SBI_IS_DIRTY dirty flag for checkpoint
|
||||
0x2 SBI_IS_CLOSE specify unmounting
|
||||
0x4 SBI_NEED_FSCK need fsck.f2fs to fix
|
||||
0x8 SBI_POR_DOING recovery is doing or not
|
||||
0x10 SBI_NEED_SB_WRITE need to recover superblock
|
||||
0x20 SBI_NEED_CP need to checkpoint
|
||||
0x40 SBI_IS_SHUTDOWN shutdown by ioctl
|
||||
0x80 SBI_IS_RECOVERED recovered orphan/data
|
||||
0x100 SBI_CP_DISABLED CP was disabled last mount
|
||||
0x200 SBI_CP_DISABLED_QUICK CP was disabled quickly
|
||||
0x400 SBI_QUOTA_NEED_FLUSH need to flush quota info in CP
|
||||
0x800 SBI_QUOTA_SKIP_FLUSH skip flushing quota in current CP
|
||||
0x1000 SBI_QUOTA_NEED_REPAIR quota file may be corrupted
|
||||
0x2000 SBI_IS_RESIZEFS resizefs is in process
|
||||
====== ===================== =================================
|
||||
|
||||
What: /sys/fs/f2fs/<disk>/ckpt_thread_ioprio
|
||||
Date: January 2021
|
||||
Contact: "Daeho Jeong" <daehojeong@google.com>
|
||||
Description: Give a way to change checkpoint merge daemon's io priority.
|
||||
Its default value is "be,3", which means "BE" I/O class and
|
||||
I/O priority "3". We can select the class between "rt" and "be",
|
||||
and set the I/O priority within valid range of it. "," delimiter
|
||||
is necessary in between I/O class and priority number.
|
||||
|
||||
24
Documentation/ABI/testing/sysfs-platform_profile
Normal file
24
Documentation/ABI/testing/sysfs-platform_profile
Normal file
@ -0,0 +1,24 @@
|
||||
What: /sys/firmware/acpi/platform_profile_choices
|
||||
Date: October 2020
|
||||
Contact: Hans de Goede <hdegoede@redhat.com>
|
||||
Description: This file contains a space-separated list of profiles supported for this device.
|
||||
|
||||
Drivers must use the following standard profile-names:
|
||||
|
||||
============ ============================================
|
||||
low-power Low power consumption
|
||||
cool Cooler operation
|
||||
quiet Quieter operation
|
||||
balanced Balance between low power consumption and performance
|
||||
performance High performance operation
|
||||
============ ============================================
|
||||
|
||||
Userspace may expect drivers to offer more than one of these
|
||||
standard profile names.
|
||||
|
||||
What: /sys/firmware/acpi/platform_profile
|
||||
Date: October 2020
|
||||
Contact: Hans de Goede <hdegoede@redhat.com>
|
||||
Description: Reading this file gives the current selected profile for this
|
||||
device. Writing this file with one of the strings from
|
||||
platform_profile_choices changes the profile to the new value.
|
||||
@ -75,7 +75,7 @@ quiet_cmd_sphinx = SPHINX $@ --> file://$(abspath $(BUILDDIR)/$3/$4)
|
||||
cmd_sphinx = $(MAKE) BUILDDIR=$(abspath $(BUILDDIR)) $(build)=Documentation/userspace-api/media $2 && \
|
||||
PYTHONDONTWRITEBYTECODE=1 \
|
||||
BUILDDIR=$(abspath $(BUILDDIR)) SPHINX_CONF=$(abspath $(srctree)/$(src)/$5/$(SPHINX_CONF)) \
|
||||
$(PYTHON) $(srctree)/scripts/jobserver-exec \
|
||||
$(PYTHON3) $(srctree)/scripts/jobserver-exec \
|
||||
$(SHELL) $(srctree)/Documentation/sphinx/parallel-wrapper.sh \
|
||||
$(SPHINXBUILD) \
|
||||
-b $2 \
|
||||
|
||||
@ -38,7 +38,7 @@ sections.
|
||||
RCU-preempt Expedited Grace Periods
|
||||
===================================
|
||||
|
||||
``CONFIG_PREEMPT=y`` kernels implement RCU-preempt.
|
||||
``CONFIG_PREEMPTION=y`` kernels implement RCU-preempt.
|
||||
The overall flow of the handling of a given CPU by an RCU-preempt
|
||||
expedited grace period is shown in the following diagram:
|
||||
|
||||
@ -112,7 +112,7 @@ things.
|
||||
RCU-sched Expedited Grace Periods
|
||||
---------------------------------
|
||||
|
||||
``CONFIG_PREEMPT=n`` kernels implement RCU-sched. The overall flow of
|
||||
``CONFIG_PREEMPTION=n`` kernels implement RCU-sched. The overall flow of
|
||||
the handling of a given CPU by an RCU-sched expedited grace period is
|
||||
shown in the following diagram:
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -8,8 +8,7 @@ Although RCU is usually used to protect read-mostly data structures,
|
||||
it is possible to use RCU to provide dynamic non-maskable interrupt
|
||||
handlers, as well as dynamic irq handlers. This document describes
|
||||
how to do this, drawing loosely from Zwane Mwaikambo's NMI-timer
|
||||
work in "arch/x86/oprofile/nmi_timer_int.c" and in
|
||||
"arch/x86/kernel/traps.c".
|
||||
work in "arch/x86/kernel/traps.c".
|
||||
|
||||
The relevant pieces of code are listed below, each followed by a
|
||||
brief explanation::
|
||||
|
||||
@ -70,7 +70,7 @@ over a rather long period of time, but improvements are always welcome!
|
||||
is less readable and prevents lockdep from detecting locking issues.
|
||||
|
||||
Letting RCU-protected pointers "leak" out of an RCU read-side
|
||||
critical section is every bid as bad as letting them leak out
|
||||
critical section is every bit as bad as letting them leak out
|
||||
from under a lock. Unless, of course, you have arranged some
|
||||
other means of protection, such as a lock or a reference count
|
||||
-before- letting them out of the RCU read-side critical section.
|
||||
@ -129,9 +129,7 @@ over a rather long period of time, but improvements are always welcome!
|
||||
accesses. The rcu_dereference() primitive ensures that
|
||||
the CPU picks up the pointer before it picks up the data
|
||||
that the pointer points to. This really is necessary
|
||||
on Alpha CPUs. If you don't believe me, see:
|
||||
|
||||
http://www.openvms.compaq.com/wizard/wiz_2637.html
|
||||
on Alpha CPUs.
|
||||
|
||||
The rcu_dereference() primitive is also an excellent
|
||||
documentation aid, letting the person reading the
|
||||
@ -214,9 +212,9 @@ over a rather long period of time, but improvements are always welcome!
|
||||
the rest of the system.
|
||||
|
||||
7. As of v4.20, a given kernel implements only one RCU flavor,
|
||||
which is RCU-sched for PREEMPT=n and RCU-preempt for PREEMPT=y.
|
||||
which is RCU-sched for PREEMPTION=n and RCU-preempt for PREEMPTION=y.
|
||||
If the updater uses call_rcu() or synchronize_rcu(),
|
||||
then the corresponding readers my use rcu_read_lock() and
|
||||
then the corresponding readers may use rcu_read_lock() and
|
||||
rcu_read_unlock(), rcu_read_lock_bh() and rcu_read_unlock_bh(),
|
||||
or any pair of primitives that disables and re-enables preemption,
|
||||
for example, rcu_read_lock_sched() and rcu_read_unlock_sched().
|
||||
|
||||
@ -9,7 +9,7 @@ RCU (read-copy update) is a synchronization mechanism that can be thought
|
||||
of as a replacement for read-writer locking (among other things), but with
|
||||
very low-overhead readers that are immune to deadlock, priority inversion,
|
||||
and unbounded latency. RCU read-side critical sections are delimited
|
||||
by rcu_read_lock() and rcu_read_unlock(), which, in non-CONFIG_PREEMPT
|
||||
by rcu_read_lock() and rcu_read_unlock(), which, in non-CONFIG_PREEMPTION
|
||||
kernels, generate no code whatsoever.
|
||||
|
||||
This means that RCU writers are unaware of the presence of concurrent
|
||||
@ -329,10 +329,10 @@ Answer: This cannot happen. The reason is that on_each_cpu() has its last
|
||||
to smp_call_function() and further to smp_call_function_on_cpu(),
|
||||
causing this latter to spin until the cross-CPU invocation of
|
||||
rcu_barrier_func() has completed. This by itself would prevent
|
||||
a grace period from completing on non-CONFIG_PREEMPT kernels,
|
||||
a grace period from completing on non-CONFIG_PREEMPTION kernels,
|
||||
since each CPU must undergo a context switch (or other quiescent
|
||||
state) before the grace period can complete. However, this is
|
||||
of no use in CONFIG_PREEMPT kernels.
|
||||
of no use in CONFIG_PREEMPTION kernels.
|
||||
|
||||
Therefore, on_each_cpu() disables preemption across its call
|
||||
to smp_call_function() and also across the local call to
|
||||
|
||||
@ -25,7 +25,7 @@ warnings:
|
||||
|
||||
- A CPU looping with bottom halves disabled.
|
||||
|
||||
- For !CONFIG_PREEMPT kernels, a CPU looping anywhere in the kernel
|
||||
- For !CONFIG_PREEMPTION kernels, a CPU looping anywhere in the kernel
|
||||
without invoking schedule(). If the looping in the kernel is
|
||||
really expected and desirable behavior, you might need to add
|
||||
some calls to cond_resched().
|
||||
@ -44,7 +44,7 @@ warnings:
|
||||
result in the ``rcu_.*kthread starved for`` console-log message,
|
||||
which will include additional debugging information.
|
||||
|
||||
- A CPU-bound real-time task in a CONFIG_PREEMPT kernel, which might
|
||||
- A CPU-bound real-time task in a CONFIG_PREEMPTION kernel, which might
|
||||
happen to preempt a low-priority task in the middle of an RCU
|
||||
read-side critical section. This is especially damaging if
|
||||
that low-priority task is not permitted to run on any other CPU,
|
||||
@ -92,7 +92,9 @@ warnings:
|
||||
buggy timer hardware through bugs in the interrupt or exception
|
||||
path (whether hardware, firmware, or software) through bugs
|
||||
in Linux's timer subsystem through bugs in the scheduler, and,
|
||||
yes, even including bugs in RCU itself.
|
||||
yes, even including bugs in RCU itself. It can also result in
|
||||
the ``rcu_.*timer wakeup didn't happen for`` console-log message,
|
||||
which will include additional debugging information.
|
||||
|
||||
- A bug in the RCU implementation.
|
||||
|
||||
@ -292,6 +294,25 @@ kthread is waiting for a short timeout, the "state" precedes value of the
|
||||
task_struct ->state field, and the "cpu" indicates that the grace-period
|
||||
kthread last ran on CPU 5.
|
||||
|
||||
If the relevant grace-period kthread does not wake from FQS wait in a
|
||||
reasonable time, then the following additional line is printed::
|
||||
|
||||
kthread timer wakeup didn't happen for 23804 jiffies! g7076 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x402
|
||||
|
||||
The "23804" indicates that kthread's timer expired more than 23 thousand
|
||||
jiffies ago. The rest of the line has meaning similar to the kthread
|
||||
starvation case.
|
||||
|
||||
Additionally, the following line is printed::
|
||||
|
||||
Possible timer handling issue on cpu=4 timer-softirq=11142
|
||||
|
||||
Here "cpu" indicates that the grace-period kthread last ran on CPU 4,
|
||||
where it queued the fqs timer. The number following the "timer-softirq"
|
||||
is the current ``TIMER_SOFTIRQ`` count on cpu 4. If this value does not
|
||||
change on successive RCU CPU stall warnings, there is further reason to
|
||||
suspect a timer problem.
|
||||
|
||||
|
||||
Multiple Warnings From One Stall
|
||||
================================
|
||||
|
||||
@ -683,7 +683,7 @@ Quick Quiz #1:
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
This section presents a "toy" RCU implementation that is based on
|
||||
"classic RCU". It is also short on performance (but only for updates) and
|
||||
on features such as hotplug CPU and the ability to run in CONFIG_PREEMPT
|
||||
on features such as hotplug CPU and the ability to run in CONFIG_PREEMPTION
|
||||
kernels. The definitions of rcu_dereference() and rcu_assign_pointer()
|
||||
are the same as those shown in the preceding section, so they are omitted.
|
||||
::
|
||||
@ -739,7 +739,7 @@ Quick Quiz #2:
|
||||
Quick Quiz #3:
|
||||
If it is illegal to block in an RCU read-side
|
||||
critical section, what the heck do you do in
|
||||
PREEMPT_RT, where normal spinlocks can block???
|
||||
CONFIG_PREEMPT_RT, where normal spinlocks can block???
|
||||
|
||||
:ref:`Answers to Quick Quiz <8_whatisRCU>`
|
||||
|
||||
@ -1093,7 +1093,7 @@ Quick Quiz #2:
|
||||
overhead is **negative**.
|
||||
|
||||
Answer:
|
||||
Imagine a single-CPU system with a non-CONFIG_PREEMPT
|
||||
Imagine a single-CPU system with a non-CONFIG_PREEMPTION
|
||||
kernel where a routing table is used by process-context
|
||||
code, but can be updated by irq-context code (for example,
|
||||
by an "ICMP REDIRECT" packet). The usual way of handling
|
||||
@ -1120,10 +1120,10 @@ Answer:
|
||||
Quick Quiz #3:
|
||||
If it is illegal to block in an RCU read-side
|
||||
critical section, what the heck do you do in
|
||||
PREEMPT_RT, where normal spinlocks can block???
|
||||
CONFIG_PREEMPT_RT, where normal spinlocks can block???
|
||||
|
||||
Answer:
|
||||
Just as PREEMPT_RT permits preemption of spinlock
|
||||
Just as CONFIG_PREEMPT_RT permits preemption of spinlock
|
||||
critical sections, it permits preemption of RCU
|
||||
read-side critical sections. It also permits
|
||||
spinlocks blocking while in RCU read-side critical
|
||||
|
||||
@ -1029,7 +1029,7 @@ All time durations are in microseconds.
|
||||
one number is written, $MAX is updated.
|
||||
|
||||
cpu.pressure
|
||||
A read-only nested-key file which exists on non-root cgroups.
|
||||
A read-write nested-keyed file.
|
||||
|
||||
Shows pressure stall information for CPU. See
|
||||
:ref:`Documentation/accounting/psi.rst <psi>` for details.
|
||||
@ -1475,7 +1475,7 @@ PAGE_SIZE multiple when read back.
|
||||
reduces the impact on the workload and memory management.
|
||||
|
||||
memory.pressure
|
||||
A read-only nested-key file which exists on non-root cgroups.
|
||||
A read-only nested-keyed file.
|
||||
|
||||
Shows pressure stall information for memory. See
|
||||
:ref:`Documentation/accounting/psi.rst <psi>` for details.
|
||||
@ -1714,7 +1714,7 @@ IO Interface Files
|
||||
8:16 rbps=2097152 wbps=max riops=max wiops=max
|
||||
|
||||
io.pressure
|
||||
A read-only nested-key file which exists on non-root cgroups.
|
||||
A read-only nested-keyed file.
|
||||
|
||||
Shows pressure stall information for IO. See
|
||||
:ref:`Documentation/accounting/psi.rst <psi>` for details.
|
||||
|
||||
@ -373,6 +373,12 @@
|
||||
arcrimi= [HW,NET] ARCnet - "RIM I" (entirely mem-mapped) cards
|
||||
Format: <io>,<irq>,<nodeID>
|
||||
|
||||
arm64.nobti [ARM64] Unconditionally disable Branch Target
|
||||
Identification support
|
||||
|
||||
arm64.nopauth [ARM64] Unconditionally disable Pointer Authentication
|
||||
support
|
||||
|
||||
ataflop= [HW,M68k]
|
||||
|
||||
atarimouse= [HW,MOUSE] Atari Mouse
|
||||
@ -802,13 +808,14 @@
|
||||
insecure, please do not use on production kernels.
|
||||
|
||||
debug_locks_verbose=
|
||||
[KNL] verbose self-tests
|
||||
Format=<0|1>
|
||||
[KNL] verbose locking self-tests
|
||||
Format: <int>
|
||||
Print debugging info while doing the locking API
|
||||
self-tests.
|
||||
We default to 0 (no extra messages), setting it to
|
||||
1 will print _a lot_ more information - normally
|
||||
only useful to kernel developers.
|
||||
Bitmask for the various LOCKTYPE_ tests. Defaults to 0
|
||||
(no extra messages), setting it to -1 (all bits set)
|
||||
will print _a_lot_ more information - normally only
|
||||
useful to lockdep developers.
|
||||
|
||||
debug_objects [KNL] Enable object debugging
|
||||
|
||||
@ -944,12 +951,6 @@
|
||||
causing system reset or hang due to sending
|
||||
INIT from AP to BSP.
|
||||
|
||||
perf_v4_pmi= [X86,INTEL]
|
||||
Format: <bool>
|
||||
Disable Intel PMU counter freezing feature.
|
||||
The feature only exists starting from
|
||||
Arch Perfmon v4 (Skylake and newer).
|
||||
|
||||
disable_ddw [PPC/PSERIES]
|
||||
Disable Dynamic DMA Window support. Use this
|
||||
to workaround buggy firmware.
|
||||
@ -2257,6 +2258,9 @@
|
||||
kvm-arm.mode=
|
||||
[KVM,ARM] Select one of KVM/arm64's modes of operation.
|
||||
|
||||
nvhe: Standard nVHE-based mode, without support for
|
||||
protected guests.
|
||||
|
||||
protected: nVHE-based mode with support for guests whose
|
||||
state is kept private from the host.
|
||||
Not valid if the kernel is running in EL2.
|
||||
@ -3458,20 +3462,6 @@
|
||||
For example, to override I2C bus2:
|
||||
omap_mux=i2c2_scl.i2c2_scl=0x100,i2c2_sda.i2c2_sda=0x100
|
||||
|
||||
oprofile.timer= [HW]
|
||||
Use timer interrupt instead of performance counters
|
||||
|
||||
oprofile.cpu_type= Force an oprofile cpu type
|
||||
This might be useful if you have an older oprofile
|
||||
userland or if you want common events.
|
||||
Format: { arch_perfmon }
|
||||
arch_perfmon: [X86] Force use of architectural
|
||||
perfmon on Intel CPUs instead of the
|
||||
CPU specific event set.
|
||||
timer: [X86] Force use of architectural NMI
|
||||
timer mode (see also oprofile.timer
|
||||
for generic hr timer mode)
|
||||
|
||||
oops=panic Always panic on oopses. Default is to just kill the
|
||||
process, but there is a small probability of
|
||||
deadlocking the machine.
|
||||
@ -3916,6 +3906,13 @@
|
||||
Format: {"off"}
|
||||
Disable Hardware Transactional Memory
|
||||
|
||||
preempt= [KNL]
|
||||
Select preemption mode if you have CONFIG_PREEMPT_DYNAMIC
|
||||
none - Limited to cond_resched() calls
|
||||
voluntary - Limited to cond_resched() and might_sleep() calls
|
||||
full - Any section that isn't explicitly preempt disabled
|
||||
can be preempted anytime.
|
||||
|
||||
print-fatal-signals=
|
||||
[KNL] debug: print fatal signals
|
||||
|
||||
@ -4092,6 +4089,10 @@
|
||||
value, meaning that RCU_SOFTIRQ is used by default.
|
||||
Specify rcutree.use_softirq=0 to use rcuc kthreads.
|
||||
|
||||
But note that CONFIG_PREEMPT_RT=y kernels disable
|
||||
this kernel boot parameter, forcibly setting it
|
||||
to zero.
|
||||
|
||||
rcutree.rcu_fanout_exact= [KNL]
|
||||
Disable autobalancing of the rcu_node combining
|
||||
tree. This is used by rcutorture, and might
|
||||
@ -4179,12 +4180,6 @@
|
||||
Set wakeup interval for idle CPUs that have
|
||||
RCU callbacks (RCU_FAST_NO_HZ=y).
|
||||
|
||||
rcutree.rcu_idle_lazy_gp_delay= [KNL]
|
||||
Set wakeup interval for idle CPUs that have
|
||||
only "lazy" RCU callbacks (RCU_FAST_NO_HZ=y).
|
||||
Lazy RCU callbacks are those which RCU can
|
||||
prove do nothing more than free memory.
|
||||
|
||||
rcutree.rcu_kick_kthreads= [KNL]
|
||||
Cause the grace-period kthread to get an extra
|
||||
wake_up() if it sleeps three times longer than
|
||||
@ -4338,6 +4333,14 @@
|
||||
stress RCU, they don't participate in the actual
|
||||
test, hence the "fake".
|
||||
|
||||
rcutorture.nocbs_nthreads= [KNL]
|
||||
Set number of RCU callback-offload togglers.
|
||||
Zero (the default) disables toggling.
|
||||
|
||||
rcutorture.nocbs_toggle= [KNL]
|
||||
Set the delay in milliseconds between successive
|
||||
callback-offload toggling attempts.
|
||||
|
||||
rcutorture.nreaders= [KNL]
|
||||
Set number of RCU readers. The value -1 selects
|
||||
N-1, where N is the number of CPUs. A value
|
||||
@ -4470,6 +4473,13 @@
|
||||
only normal grace-period primitives. No effect
|
||||
on CONFIG_TINY_RCU kernels.
|
||||
|
||||
But note that CONFIG_PREEMPT_RT=y kernels enables
|
||||
this kernel boot parameter, forcibly setting
|
||||
it to the value one, that is, converting any
|
||||
post-boot attempt at an expedited RCU grace
|
||||
period to instead use normal non-expedited
|
||||
grace-period processing.
|
||||
|
||||
rcupdate.rcu_task_ipi_delay= [KNL]
|
||||
Set time in jiffies during which RCU tasks will
|
||||
avoid sending IPIs, starting with the beginning
|
||||
@ -4557,6 +4567,12 @@
|
||||
refscale.verbose= [KNL]
|
||||
Enable additional printk() statements.
|
||||
|
||||
refscale.verbose_batched= [KNL]
|
||||
Batch the additional printk() statements. If zero
|
||||
(the default) or negative, print everything. Otherwise,
|
||||
print every Nth verbose statement, where N is the value
|
||||
specified.
|
||||
|
||||
relax_domain_level=
|
||||
[KNL, SMP] Set scheduler's default relax_domain_level.
|
||||
See Documentation/admin-guide/cgroup-v1/cpusets.rst.
|
||||
@ -5331,6 +5347,14 @@
|
||||
are running concurrently, especially on systems
|
||||
with rotating-rust storage.
|
||||
|
||||
torture.verbose_sleep_frequency= [KNL]
|
||||
Specifies how many verbose printk()s should be
|
||||
emitted between each sleep. The default of zero
|
||||
disables verbose-printk() sleeping.
|
||||
|
||||
torture.verbose_sleep_duration= [KNL]
|
||||
Duration of each verbose-printk() sleep in jiffies.
|
||||
|
||||
tp720= [HW,PS2]
|
||||
|
||||
tpm_suspend_pcr=[HW,TPM]
|
||||
|
||||
@ -13,6 +13,22 @@ This file documents the driver for the Rockchip ISP1 that is part of RK3288
|
||||
and RK3399 SoCs. The driver is located under drivers/staging/media/rkisp1
|
||||
and uses the Media-Controller API.
|
||||
|
||||
Revisions
|
||||
=========
|
||||
|
||||
There exist multiple smaller revisions to this ISP that got introduced in
|
||||
later SoCs. Revisions can be found in the enum :c:type:`rkisp1_cif_isp_version`
|
||||
in the UAPI and the revision of the ISP inside the running SoC can be read
|
||||
in the field hw_revision of struct media_device_info as returned by
|
||||
ioctl MEDIA_IOC_DEVICE_INFO.
|
||||
|
||||
Versions in use are:
|
||||
|
||||
- RKISP1_V10: used at least in rk3288 and rk3399
|
||||
- RKISP1_V11: declared in the original vendor code, but not used
|
||||
- RKISP1_V12: used at least in rk3326 and px30
|
||||
- RKISP1_V13: used at least in rk1808
|
||||
|
||||
Topology
|
||||
========
|
||||
.. _rkisp1_topology_graph:
|
||||
|
||||
@ -17,7 +17,7 @@ PMU events
|
||||
----------
|
||||
|
||||
The PMU driver registers a single PMU device for the whole interconnect,
|
||||
see /sys/bus/event_source/devices/arm_cmn. Multi-chip systems may link
|
||||
see /sys/bus/event_source/devices/arm_cmn_0. Multi-chip systems may link
|
||||
more than one CMN together via external CCIX links - in this situation,
|
||||
each mesh counts its own events entirely independently, and additional
|
||||
PMU devices will be named arm_cmn_{1..n}.
|
||||
|
||||
@ -70,8 +70,8 @@ trampoline code on the vDSO, that trampoline is never intercepted.
|
||||
[selector] is a pointer to a char-sized region in the process memory
|
||||
region, that provides a quick way to enable disable syscall redirection
|
||||
thread-wide, without the need to invoke the kernel directly. selector
|
||||
can be set to PR_SYS_DISPATCH_ON or PR_SYS_DISPATCH_OFF. Any other
|
||||
value should terminate the program with a SIGSYS.
|
||||
can be set to SYSCALL_DISPATCH_FILTER_ALLOW or SYSCALL_DISPATCH_FILTER_BLOCK.
|
||||
Any other value should terminate the program with a SIGSYS.
|
||||
|
||||
Security Notes
|
||||
--------------
|
||||
|
||||
@ -47,6 +47,9 @@ be DMA masters and thus read contents of the host memory without CPU and OS
|
||||
knowing about it. There are ways to prevent this by setting up an IOMMU but
|
||||
it is not always available for various reasons.
|
||||
|
||||
Some USB4 systems have a BIOS setting to disable PCIe tunneling. This is
|
||||
treated as another security level (nopcie).
|
||||
|
||||
The security levels are as follows:
|
||||
|
||||
none
|
||||
@ -77,6 +80,10 @@ The security levels are as follows:
|
||||
Display Port in a dock. All PCIe links downstream of the dock are
|
||||
removed.
|
||||
|
||||
nopcie
|
||||
PCIe tunneling is disabled/forbidden from the BIOS. Available in some
|
||||
USB4 systems.
|
||||
|
||||
The current security level can be read from
|
||||
``/sys/bus/thunderbolt/devices/domainX/security`` where ``domainX`` is
|
||||
the Thunderbolt domain the host controller manages. There is typically
|
||||
@ -153,6 +160,22 @@ If the user still wants to connect the device they can either approve
|
||||
the device without a key or write a new key and write 1 to the
|
||||
``authorized`` file to get the new key stored on the device NVM.
|
||||
|
||||
De-authorizing devices
|
||||
----------------------
|
||||
It is possible to de-authorize devices by writing ``0`` to their
|
||||
``authorized`` attribute. This requires support from the connection
|
||||
manager implementation and can be checked by reading domain
|
||||
``deauthorization`` attribute. If it reads ``1`` then the feature is
|
||||
supported.
|
||||
|
||||
When a device is de-authorized the PCIe tunnel from the parent device
|
||||
PCIe downstream (or root) port to the device PCIe upstream port is torn
|
||||
down. This is essentially the same thing as PCIe hot-remove and the PCIe
|
||||
toplogy in question will not be accessible anymore until the device is
|
||||
authorized again. If there is storage such as NVMe or similar involved,
|
||||
there is a risk for data loss if the filesystem on that storage is not
|
||||
properly shut down. You have been warned!
|
||||
|
||||
DMA protection utilizing IOMMU
|
||||
------------------------------
|
||||
Recent systems from 2018 and forward with Thunderbolt ports may natively
|
||||
|
||||
@ -495,3 +495,45 @@ the class and error context. For example, the default values for
|
||||
"metadata/ENODEV" are "0" rather than "-1" so that this error handler defaults
|
||||
to "fail immediately" behaviour. This is done because ENODEV is a fatal,
|
||||
unrecoverable error no matter how many times the metadata IO is retried.
|
||||
|
||||
Workqueue Concurrency
|
||||
=====================
|
||||
|
||||
XFS uses kernel workqueues to parallelize metadata update processes. This
|
||||
enables it to take advantage of storage hardware that can service many IO
|
||||
operations simultaneously. This interface exposes internal implementation
|
||||
details of XFS, and as such is explicitly not part of any userspace API/ABI
|
||||
guarantee the kernel may give userspace. These are undocumented features of
|
||||
the generic workqueue implementation XFS uses for concurrency, and they are
|
||||
provided here purely for diagnostic and tuning purposes and may change at any
|
||||
time in the future.
|
||||
|
||||
The control knobs for a filesystem's workqueues are organized by task at hand
|
||||
and the short name of the data device. They all can be found in:
|
||||
|
||||
/sys/bus/workqueue/devices/${task}!${device}
|
||||
|
||||
================ ===========
|
||||
Task Description
|
||||
================ ===========
|
||||
xfs_iwalk-$pid Inode scans of the entire filesystem. Currently limited to
|
||||
mount time quotacheck.
|
||||
xfs-blockgc Background garbage collection of disk space that have been
|
||||
speculatively allocated beyond EOF or for staging copy on
|
||||
write operations.
|
||||
================ ===========
|
||||
|
||||
For example, the knobs for the quotacheck workqueue for /dev/nvme0n1 would be
|
||||
found in /sys/bus/workqueue/devices/xfs_iwalk-1111!nvme0n1/.
|
||||
|
||||
The interesting knobs for XFS workqueues are as follows:
|
||||
|
||||
============ ===========
|
||||
Knob Description
|
||||
============ ===========
|
||||
max_active Maximum number of background threads that can be started to
|
||||
run the work.
|
||||
cpumask CPUs upon which the threads are allowed to run.
|
||||
nice Relative priority of scheduling the threads. These are the
|
||||
same nice levels that can be applied to userspace processes.
|
||||
============ ===========
|
||||
|
||||
@ -40,6 +40,8 @@ normal code doesn't have to deal with bi_bvec_done.
|
||||
There is a lower level advance function - bvec_iter_advance() - which takes
|
||||
a pointer to a biovec, not a bio; this is used by the bio integrity code.
|
||||
|
||||
As of 5.12 bvec segments with zero bv_len are not supported.
|
||||
|
||||
What's all this get us?
|
||||
=======================
|
||||
|
||||
|
||||
@ -261,6 +261,12 @@ For block drivers that support REQ_OP_WRITE_ZEROES, the maximum number of
|
||||
bytes that can be zeroed at once. The value 0 means that REQ_OP_WRITE_ZEROES
|
||||
is not supported.
|
||||
|
||||
zone_append_max_bytes (RO)
|
||||
--------------------------
|
||||
This is the maximum number of bytes that can be written to a sequential
|
||||
zone of a zoned block device using a zone append write operation
|
||||
(REQ_OP_ZONE_APPEND). This value is always 0 for regular block devices.
|
||||
|
||||
zoned (RO)
|
||||
----------
|
||||
This indicates if the device is a zoned block device and the zone model of the
|
||||
@ -273,4 +279,11 @@ devices are described in the ZBC (Zoned Block Commands) and ZAC
|
||||
do not support zone commands, they will be treated as regular block devices
|
||||
and zoned will report "none".
|
||||
|
||||
zone_write_granularity (RO)
|
||||
---------------------------
|
||||
This indicates the alignment constraint, in bytes, for write operations in
|
||||
sequential zones of zoned block devices (devices with a zoned attributed
|
||||
that reports "host-managed" or "host-aware"). This value is always 0 for
|
||||
regular block devices.
|
||||
|
||||
Jens Axboe <jens.axboe@oracle.com>, February 2009
|
||||
|
||||
@ -208,6 +208,12 @@ data structures and compile with kernel internal headers. Both of these
|
||||
kernel internals are subject to change and can break with newer kernels
|
||||
such that the program needs to be adapted accordingly.
|
||||
|
||||
Q: Are tracepoints part of the stable ABI?
|
||||
------------------------------------------
|
||||
A: NO. Tracepoints are tied to internal implementation details hence they are
|
||||
subject to change and can break with newer kernels. BPF programs need to change
|
||||
accordingly when this happens.
|
||||
|
||||
Q: How much stack space a BPF program uses?
|
||||
-------------------------------------------
|
||||
A: Currently all program types are limited to 512 bytes of stack
|
||||
|
||||
@ -501,16 +501,19 @@ All LLVM releases can be found at: http://releases.llvm.org/
|
||||
|
||||
Q: Got it, so how do I build LLVM manually anyway?
|
||||
--------------------------------------------------
|
||||
A: You need cmake and gcc-c++ as build requisites for LLVM. Once you have
|
||||
that set up, proceed with building the latest LLVM and clang version
|
||||
A: We recommend that developers who want the fastest incremental builds
|
||||
use the Ninja build system, you can find it in your system's package
|
||||
manager, usually the package is ninja or ninja-build.
|
||||
|
||||
You need ninja, cmake and gcc-c++ as build requisites for LLVM. Once you
|
||||
have that set up, proceed with building the latest LLVM and clang version
|
||||
from the git repositories::
|
||||
|
||||
$ git clone https://github.com/llvm/llvm-project.git
|
||||
$ mkdir -p llvm-project/llvm/build/install
|
||||
$ mkdir -p llvm-project/llvm/build
|
||||
$ cd llvm-project/llvm/build
|
||||
$ cmake .. -G "Ninja" -DLLVM_TARGETS_TO_BUILD="BPF;X86" \
|
||||
-DLLVM_ENABLE_PROJECTS="clang" \
|
||||
-DBUILD_SHARED_LIBS=OFF \
|
||||
-DCMAKE_BUILD_TYPE=Release \
|
||||
-DLLVM_BUILD_RUNTIME=OFF
|
||||
$ ninja
|
||||
|
||||
@ -163,8 +163,7 @@ particular KASAN features.
|
||||
- ``kasan=off`` or ``=on`` controls whether KASAN is enabled (default: ``on``).
|
||||
|
||||
- ``kasan.stacktrace=off`` or ``=on`` disables or enables alloc and free stack
|
||||
traces collection (default: ``on`` for ``CONFIG_DEBUG_KERNEL=y``, otherwise
|
||||
``off``).
|
||||
traces collection (default: ``on``).
|
||||
|
||||
- ``kasan.fault=report`` or ``=panic`` controls whether to only print a KASAN
|
||||
report or also panic the kernel (default: ``report``).
|
||||
|
||||
@ -151,6 +151,7 @@ properties:
|
||||
- description: Boards with the Amlogic Meson G12B S922X SoC
|
||||
items:
|
||||
- enum:
|
||||
- azw,gsking-x
|
||||
- azw,gtking
|
||||
- azw,gtking-pro
|
||||
- hardkernel,odroid-n2
|
||||
@ -163,9 +164,10 @@ properties:
|
||||
- description: Boards with the Amlogic Meson SM1 S905X3/D3/Y3 SoC
|
||||
items:
|
||||
- enum:
|
||||
- seirobotics,sei610
|
||||
- khadas,vim3l
|
||||
- hardkernel,odroid-c4
|
||||
- hardkernel,odroid-hc4
|
||||
- khadas,vim3l
|
||||
- seirobotics,sei610
|
||||
- const: amlogic,sm1
|
||||
|
||||
- description: Boards with the Amlogic Meson A1 A113L SoC
|
||||
|
||||
@ -0,0 +1,42 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface
|
||||
|
||||
maintainers:
|
||||
- Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
|
||||
description: |
|
||||
The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which
|
||||
contains registers for various IP blocks such as pin-controller bits for
|
||||
the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits.
|
||||
The registers can be accessed directly when not running in "secure mode".
|
||||
When "secure mode" is enabled then these registers have to be accessed
|
||||
through secure monitor calls.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,meson8-secbus2
|
||||
- amlogic,meson8b-secbus2
|
||||
- const: syscon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
secbus2: system-controller@4000 {
|
||||
compatible = "amlogic,meson8-secbus2", "syscon";
|
||||
reg = <0x4000 0x2000>;
|
||||
};
|
||||
@ -31,6 +31,14 @@ Optional properties:
|
||||
|
||||
- mbox-names: shall be "tx" or "rx" depending on mboxes entries.
|
||||
|
||||
- interrupts : when using smc or hvc transports, this optional
|
||||
property indicates that msg completion by the platform is indicated
|
||||
by an interrupt rather than by the return of the smc call. This
|
||||
should not be used except when the platform requires such behavior.
|
||||
|
||||
- interrupt-names : if "interrupts" is present, interrupt-names must also
|
||||
be present and have the value "a2p".
|
||||
|
||||
See Documentation/devicetree/bindings/mailbox/mailbox.txt for more details
|
||||
about the generic mailbox controller and client driver bindings.
|
||||
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
Atmel system registers
|
||||
|
||||
Chipid required properties:
|
||||
- compatible: Should be "atmel,sama5d2-chipid"
|
||||
- compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
|
||||
- reg : Should contain registers location and length
|
||||
|
||||
PIT Timer required properties:
|
||||
|
||||
@ -19,6 +19,8 @@ properties:
|
||||
oneOf:
|
||||
- description: BCM4906 based boards
|
||||
items:
|
||||
- enum:
|
||||
- netgear,r8000p
|
||||
- const: brcm,bcm4906
|
||||
- const: brcm,bcm4908
|
||||
|
||||
|
||||
@ -169,6 +169,7 @@ properties:
|
||||
- qcom,kryo385
|
||||
- qcom,kryo468
|
||||
- qcom,kryo485
|
||||
- qcom,kryo685
|
||||
- qcom,scorpion
|
||||
|
||||
enable-method:
|
||||
|
||||
@ -210,6 +210,7 @@ properties:
|
||||
- kiebackpeter,imx6q-tpc # K+P i.MX6 Quad TPC Board
|
||||
- kontron,imx6q-samx6i # Kontron i.MX6 Dual/Quad SMARC Module
|
||||
- kosagi,imx6q-novena # Kosagi Novena Dual/Quad
|
||||
- kvg,vicut1q # Kverneland UT1Q board
|
||||
- logicpd,imx6q-logicpd
|
||||
- lwn,display5 # Liebherr Display5 i.MX6 Quad Board
|
||||
- lwn,mccmon6 # Liebherr Monitor6 i.MX6 Quad Board
|
||||
@ -331,6 +332,7 @@ properties:
|
||||
- fsl,imx6qp-sabreauto # i.MX6 Quad Plus SABRE Automotive Board
|
||||
- fsl,imx6qp-sabresd # i.MX6 Quad Plus SABRE Smart Device Board
|
||||
- karo,imx6qp-tx6qp # Ka-Ro electronics TX6QP-8037 Module
|
||||
- kvg,vicutp # Kverneland UT1P board
|
||||
- prt,prtwd3 # Protonic WD3 board
|
||||
- wand,imx6qp-wandboard # Wandboard i.MX6 QuadPlus Board
|
||||
- zii,imx6qp-zii-rdu2 # ZII RDU2+ Board
|
||||
@ -364,7 +366,12 @@ properties:
|
||||
- fsl,imx6dl-sabresd # i.MX6 DualLite SABRE Smart Device Board
|
||||
- karo,imx6dl-tx6dl # Ka-Ro electronics TX6U Modules
|
||||
- kontron,imx6dl-samx6i # Kontron i.MX6 Solo SMARC Module
|
||||
- kvg,victgo # Kverneland TGO
|
||||
- kvg,vicut1 # Kverneland UT1 board
|
||||
- ply,plybas # Plymovent BAS board
|
||||
- ply,plym2m # Plymovent M2M board
|
||||
- poslab,imx6dl-savageboard # Poslab SavageBoard Dual
|
||||
- prt,prtmvt # Protonic MVT board
|
||||
- prt,prtrvt # Protonic RVT board
|
||||
- prt,prtvt7 # Protonic VT7 board
|
||||
- rex,imx6dl-rex-basic # Rex Basic i.MX6 Dual Lite Board
|
||||
@ -488,6 +495,7 @@ properties:
|
||||
- karo,imx6ul-tx6ul # Ka-Ro electronics TXUL-0010 Module
|
||||
- kontron,imx6ul-n6310-som # Kontron N6310 SOM
|
||||
- kontron,imx6ul-n6311-som # Kontron N6311 SOM
|
||||
- prt,prti6g # Protonic PRTI6G Board
|
||||
- technexion,imx6ul-pico-dwarf # TechNexion i.MX6UL Pico-Dwarf
|
||||
- technexion,imx6ul-pico-hobbit # TechNexion i.MX6UL Pico-Hobbit
|
||||
- technexion,imx6ul-pico-pi # TechNexion i.MX6UL Pico-Pi
|
||||
@ -670,8 +678,12 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit
|
||||
- boundary,imx8mm-nitrogen8mm # i.MX8MM Nitrogen Board
|
||||
- fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board
|
||||
- fsl,imx8mm-evk # i.MX8MM EVK Board
|
||||
- gw,imx8mm-gw71xx-0x # i.MX8MM Gateworks Development Kit
|
||||
- gw,imx8mm-gw72xx-0x # i.MX8MM Gateworks Development Kit
|
||||
- gw,imx8mm-gw73xx-0x # i.MX8MM Gateworks Development Kit
|
||||
- kontron,imx8mm-n801x-som # i.MX8MM Kontron SL (N801X) SOM
|
||||
- variscite,var-som-mx8mm # i.MX8MM Variscite VAR-SOM-MX8MM module
|
||||
- const: fsl,imx8mm
|
||||
@ -691,6 +703,7 @@ properties:
|
||||
- description: i.MX8MN based Boards
|
||||
items:
|
||||
- enum:
|
||||
- beacon,imx8mn-beacon-kit # i.MX8MN Beacon Development Kit
|
||||
- fsl,imx8mn-ddr4-evk # i.MX8MN DDR4 EVK Board
|
||||
- fsl,imx8mn-evk # i.MX8MN LPDDR4 EVK Board
|
||||
- const: fsl,imx8mn
|
||||
@ -707,6 +720,12 @@ properties:
|
||||
- fsl,imx8mp-evk # i.MX8MP EVK Board
|
||||
- const: fsl,imx8mp
|
||||
|
||||
- description: PHYTEC phyCORE-i.MX8MP SoM based boards
|
||||
items:
|
||||
- const: phytec,imx8mp-phyboard-pollux-rdk # phyBOARD-Pollux RDK
|
||||
- const: phytec,imx8mp-phycore-som # phyCORE-i.MX8MP SoM
|
||||
- const: fsl,imx8mp
|
||||
|
||||
- description: i.MX8MQ based Boards
|
||||
items:
|
||||
- enum:
|
||||
@ -724,6 +743,7 @@ properties:
|
||||
- enum:
|
||||
- purism,librem5r2 # Purism Librem5 phone "Chestnut"
|
||||
- purism,librem5r3 # Purism Librem5 phone "Dogwood"
|
||||
- purism,librem5r4 # Purism Librem5 phone "Evergreen"
|
||||
- const: purism,librem5
|
||||
- const: fsl,imx8mq
|
||||
|
||||
@ -834,10 +854,12 @@ properties:
|
||||
Kontron SMARC-sAL28 board on the SMARC Eval Carrier 2.0
|
||||
items:
|
||||
- enum:
|
||||
- kontron,sl28-var1-ads2
|
||||
- kontron,sl28-var2-ads2
|
||||
- kontron,sl28-var3-ads2
|
||||
- kontron,sl28-var4-ads2
|
||||
- enum:
|
||||
- kontron,sl28-var1
|
||||
- kontron,sl28-var2
|
||||
- kontron,sl28-var3
|
||||
- kontron,sl28-var4
|
||||
@ -848,6 +870,7 @@ properties:
|
||||
Kontron SMARC-sAL28 board (on a generic/undefined carrier)
|
||||
items:
|
||||
- enum:
|
||||
- kontron,sl28-var1
|
||||
- kontron,sl28-var2
|
||||
- kontron,sl28-var3
|
||||
- kontron,sl28-var4
|
||||
|
||||
@ -120,7 +120,9 @@ properties:
|
||||
- const: mediatek,mt8183
|
||||
- description: Google Krane (Lenovo IdeaPad Duet, 10e,...)
|
||||
items:
|
||||
- const: google,krane-sku176
|
||||
- enum:
|
||||
- google,krane-sku0
|
||||
- google,krane-sku176
|
||||
- const: google,krane
|
||||
- const: mediatek,mt8183
|
||||
|
||||
|
||||
@ -24,6 +24,7 @@ properties:
|
||||
- qcom,sc7180-llcc
|
||||
- qcom,sdm845-llcc
|
||||
- qcom,sm8150-llcc
|
||||
- qcom,sm8250-llcc
|
||||
|
||||
reg:
|
||||
items:
|
||||
|
||||
@ -43,6 +43,7 @@ properties:
|
||||
- arm,cortex-a75-pmu
|
||||
- arm,cortex-a76-pmu
|
||||
- arm,cortex-a77-pmu
|
||||
- arm,cortex-a78-pmu
|
||||
- arm,neoverse-e1-pmu
|
||||
- arm,neoverse-n1-pmu
|
||||
- brcm,vulcan-pmu
|
||||
|
||||
@ -40,7 +40,9 @@ description: |
|
||||
sdm630
|
||||
sdm660
|
||||
sdm845
|
||||
sdx55
|
||||
sm8250
|
||||
sm8350
|
||||
|
||||
The 'board' element must be one of the following strings:
|
||||
|
||||
@ -167,6 +169,11 @@ properties:
|
||||
- xiaomi,lavender
|
||||
- const: qcom,sdm660
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,sdx55-mtp
|
||||
- const: qcom,sdx55
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,ipq6018-cp01-c1
|
||||
@ -178,6 +185,11 @@ properties:
|
||||
- qcom,sm8250-mtp
|
||||
- const: qcom,sm8250
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,sm8350-mtp
|
||||
- const: qcom,sm8350
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
|
||||
@ -130,6 +130,7 @@ properties:
|
||||
- description: RZ/G2N (R8A774B1)
|
||||
items:
|
||||
- enum:
|
||||
- beacon,beacon-rzg2n # Beacon EmbeddedWorks RZ/G2N Kit
|
||||
- hoperun,hihope-rzg2n # HopeRun HiHope RZ/G2N platform
|
||||
- const: renesas,r8a774b1
|
||||
|
||||
@ -154,6 +155,7 @@ properties:
|
||||
- description: RZ/G2H (R8A774E1)
|
||||
items:
|
||||
- enum:
|
||||
- beacon,beacon-rzg2h # Beacon EmbeddedWorks RZ/G2H Kit
|
||||
- hoperun,hihope-rzg2h # HopeRun HiHope RZ/G2H platform
|
||||
- const: renesas,r8a774e1
|
||||
|
||||
|
||||
@ -467,6 +467,11 @@ properties:
|
||||
- const: radxa,rockpi4
|
||||
- const: rockchip,rk3399
|
||||
|
||||
- description: Radxa ROCK Pi E
|
||||
items:
|
||||
- const: radxa,rockpi-e
|
||||
- const: rockchip,rk3328
|
||||
|
||||
- description: Radxa ROCK Pi N8
|
||||
items:
|
||||
- const: radxa,rockpi-n8
|
||||
|
||||
@ -1,30 +0,0 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/sirf.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: CSR SiRFprimaII and SiRFmarco device tree bindings.
|
||||
|
||||
maintainers:
|
||||
- Binghua Duan <binghua.duan@csr.com>
|
||||
- Barry Song <Baohua.Song@csr.com>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: sirf,atlas6-cb
|
||||
- const: sirf,atlas6
|
||||
- items:
|
||||
- const: sirf,atlas7-cb
|
||||
- const: sirf,atlas7
|
||||
- items:
|
||||
- const: sirf,prima2-cb
|
||||
- const: sirf,prima2
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
@ -1,46 +0,0 @@
|
||||
ST-Ericsson U300 Device Tree Bindings
|
||||
|
||||
For various board the "board" node may contain specific properties
|
||||
that pertain to this particular board, such as board-specific GPIOs
|
||||
or board power regulator supplies.
|
||||
|
||||
Required root node property:
|
||||
|
||||
compatible="stericsson,u300";
|
||||
|
||||
Required node: syscon
|
||||
This contains the system controller.
|
||||
- compatible: must be "stericsson,u300-syscon".
|
||||
- reg: the base address and size of the system controller.
|
||||
|
||||
Boards with the U300 SoC include:
|
||||
|
||||
S365 "Small Board U365":
|
||||
|
||||
Required node: s365
|
||||
This contains the board-specific information.
|
||||
- compatible: must be "stericsson,s365".
|
||||
- vana15-supply: the regulator supplying the 1.5V to drive the
|
||||
board.
|
||||
- syscon: a pointer to the syscon node so we can access the
|
||||
syscon registers to set the board as self-powered.
|
||||
|
||||
Example:
|
||||
|
||||
/ {
|
||||
model = "ST-Ericsson U300";
|
||||
compatible = "stericsson,u300";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
s365 {
|
||||
compatible = "stericsson,s365";
|
||||
vana15-supply = <&ab3100_ldo_d_reg>;
|
||||
syscon = <&syscon>;
|
||||
};
|
||||
|
||||
syscon: syscon@c0011000 {
|
||||
compatible = "stericsson,u300-syscon";
|
||||
reg = <0xc0011000 0x1000>;
|
||||
};
|
||||
};
|
||||
@ -657,7 +657,8 @@ properties:
|
||||
- description: Pine64 PineCube
|
||||
items:
|
||||
- const: pine64,pinecube
|
||||
- const: allwinner,sun8i-s3
|
||||
- const: sochip,s3
|
||||
- const: allwinner,sun8i-v3
|
||||
|
||||
- description: Pine64 PineH64 model A
|
||||
items:
|
||||
@ -683,23 +684,31 @@ properties:
|
||||
- description: Pine64 PinePhone Developer Batch (1.0)
|
||||
items:
|
||||
- const: pine64,pinephone-1.0
|
||||
- const: pine64,pinephone
|
||||
- const: allwinner,sun50i-a64
|
||||
|
||||
- description: Pine64 PinePhone Braveheart (1.1)
|
||||
items:
|
||||
- const: pine64,pinephone-1.1
|
||||
- const: pine64,pinephone
|
||||
- const: allwinner,sun50i-a64
|
||||
|
||||
- description: Pine64 PinePhone (1.2)
|
||||
items:
|
||||
- const: pine64,pinephone-1.2
|
||||
- const: pine64,pinephone
|
||||
- const: allwinner,sun50i-a64
|
||||
|
||||
- description: Pine64 PineTab
|
||||
- description: Pine64 PineTab, Development Sample
|
||||
items:
|
||||
- const: pine64,pinetab
|
||||
- const: allwinner,sun50i-a64
|
||||
|
||||
- description: Pine64 PineTab, Early Adopter's batch (and maybe later ones)
|
||||
items:
|
||||
- const: pine64,pinetab-early-adopter
|
||||
- const: allwinner,sun50i-a64
|
||||
|
||||
- description: Pine64 SoPine Baseboard
|
||||
items:
|
||||
- const: pine64,sopine-baseboard
|
||||
@ -777,6 +786,12 @@ properties:
|
||||
- const: sinlinx,sina33
|
||||
- const: allwinner,sun8i-a33
|
||||
|
||||
- description: SL631 Action Camera with IMX179
|
||||
items:
|
||||
- const: allwinner,sl631-imx179
|
||||
- const: allwinner,sl631
|
||||
- const: allwinner,sun8i-v3
|
||||
|
||||
- description: Tanix TX6
|
||||
items:
|
||||
- const: oranth,tanix-tx6
|
||||
|
||||
@ -120,10 +120,18 @@ properties:
|
||||
items:
|
||||
- const: nvidia,p3668-0000
|
||||
- const: nvidia,tegra194
|
||||
- description: Jetson Xavier NX (eMMC)
|
||||
items:
|
||||
- const: nvidia,p3668-0001
|
||||
- const: nvidia,tegra194
|
||||
- description: Jetson Xavier NX Developer Kit
|
||||
items:
|
||||
- const: nvidia,p3509-0000+p3668-0000
|
||||
- const: nvidia,tegra194
|
||||
- description: Jetson Xavier NX Developer Kit (eMMC)
|
||||
items:
|
||||
- const: nvidia,p3509-0000+p3668-0001
|
||||
- const: nvidia,tegra194
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,tegra234-vdk
|
||||
|
||||
@ -22,6 +22,9 @@ properties:
|
||||
- adapteva,parallella
|
||||
- digilent,zynq-zybo
|
||||
- digilent,zynq-zybo-z7
|
||||
- ebang,ebaz4205
|
||||
- myir,zynq-zturn-v5
|
||||
- myir,zynq-zturn
|
||||
- xlnx,zynq-cc108
|
||||
- xlnx,zynq-zc702
|
||||
- xlnx,zynq-zc706
|
||||
@ -91,6 +94,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- xlnx,zynqmp-zcu104-revA
|
||||
- xlnx,zynqmp-zcu104-revC
|
||||
- xlnx,zynqmp-zcu104-rev1.0
|
||||
- const: xlnx,zynqmp-zcu104
|
||||
- const: xlnx,zynqmp
|
||||
@ -107,7 +111,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- xlnx,zynqmp-zcu111-revA
|
||||
- xlnx,zynqmp-zcu11-rev1.0
|
||||
- xlnx,zynqmp-zcu111-rev1.0
|
||||
- const: xlnx,zynqmp-zcu111
|
||||
- const: xlnx,zynqmp
|
||||
|
||||
|
||||
@ -1,30 +0,0 @@
|
||||
ZTE sysctrl Registers
|
||||
|
||||
Registers for 'zte,zx296702' SoC:
|
||||
|
||||
System management required properties:
|
||||
- compatible = "zte,sysctrl"
|
||||
|
||||
Low power management required properties:
|
||||
- compatible = "zte,zx296702-pcu"
|
||||
|
||||
Bus matrix required properties:
|
||||
- compatible = "zte,zx-bus-matrix"
|
||||
|
||||
|
||||
Registers for 'zte,zx296718' SoC:
|
||||
|
||||
System management required properties:
|
||||
- compatible = "zte,zx296718-aon-sysctrl"
|
||||
- compatible = "zte,zx296718-sysctrl"
|
||||
|
||||
Example:
|
||||
aon_sysctrl: aon-sysctrl@116000 {
|
||||
compatible = "zte,zx296718-aon-sysctrl", "syscon";
|
||||
reg = <0x116000 0x1000>;
|
||||
};
|
||||
|
||||
sysctrl: sysctrl@1463000 {
|
||||
compatible = "zte,zx296718-sysctrl", "syscon";
|
||||
reg = <0x1463000 0x1000>;
|
||||
};
|
||||
@ -1,28 +0,0 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/zte.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ZTE platforms device tree bindings
|
||||
|
||||
maintainers:
|
||||
- Jun Nie <jun.nie@linaro.org>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- zte,zx296702-ad1
|
||||
- const: zte,zx296702
|
||||
- items:
|
||||
- enum:
|
||||
- zte,zx296718-evb
|
||||
- const: zte,zx296718
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
@ -21,7 +21,9 @@ properties:
|
||||
oneOf:
|
||||
- const: allwinner,sun8i-a23-rsb
|
||||
- items:
|
||||
- const: allwinner,sun8i-a83t-rsb
|
||||
- enum:
|
||||
- allwinner,sun8i-a83t-rsb
|
||||
- allwinner,sun50i-h616-rsb
|
||||
- const: allwinner,sun8i-a23-rsb
|
||||
|
||||
reg:
|
||||
|
||||
@ -1,40 +0,0 @@
|
||||
C6X PLL Clock Controllers
|
||||
-------------------------
|
||||
|
||||
This is a first-cut support for the SoC clock controllers. This is still
|
||||
under development and will probably change as the common device tree
|
||||
clock support is added to the kernel.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: "ti,c64x+pll"
|
||||
May also have SoC-specific value to support SoC-specific initialization
|
||||
in the driver. One of:
|
||||
"ti,c6455-pll"
|
||||
"ti,c6457-pll"
|
||||
"ti,c6472-pll"
|
||||
"ti,c6474-pll"
|
||||
|
||||
- reg: base address and size of register area
|
||||
- clock-frequency: input clock frequency in hz
|
||||
|
||||
|
||||
Optional properties:
|
||||
|
||||
- ti,c64x+pll-bypass-delay: CPU cycles to delay when entering bypass mode
|
||||
|
||||
- ti,c64x+pll-reset-delay: CPU cycles to delay after PLL reset
|
||||
|
||||
- ti,c64x+pll-lock-delay: CPU cycles to delay after PLL frequency change
|
||||
|
||||
Example:
|
||||
|
||||
clock-controller@29a0000 {
|
||||
compatible = "ti,c6472-pll", "ti,c64x+pll";
|
||||
reg = <0x029a0000 0x200>;
|
||||
clock-frequency = <25000000>;
|
||||
|
||||
ti,c64x+pll-bypass-delay = <200>;
|
||||
ti,c64x+pll-reset-delay = <12000>;
|
||||
ti,c64x+pll-lock-delay = <80000>;
|
||||
};
|
||||
@ -1,127 +0,0 @@
|
||||
Device State Configuration Registers
|
||||
------------------------------------
|
||||
|
||||
TI C6X SoCs contain a region of miscellaneous registers which provide various
|
||||
function for SoC control or status. Details vary considerably among from SoC
|
||||
to SoC with no two being alike.
|
||||
|
||||
In general, the Device State Configuration Registers (DSCR) will provide one or
|
||||
more configuration registers often protected by a lock register where one or
|
||||
more key values must be written to a lock register in order to unlock the
|
||||
configuration register for writes. These configuration register may be used to
|
||||
enable (and disable in some cases) SoC pin drivers, select peripheral clock
|
||||
sources (internal or pin), etc. In some cases, a configuration register is
|
||||
write once or the individual bits are write once. In addition to device config,
|
||||
the DSCR block may provide registers which are used to reset peripherals,
|
||||
provide device ID information, provide ethernet MAC addresses, as well as other
|
||||
miscellaneous functions.
|
||||
|
||||
For device state control (enable/disable), each device control is assigned an
|
||||
id which is used by individual device drivers to control the state as needed.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: must be "ti,c64x+dscr"
|
||||
- reg: register area base and size
|
||||
|
||||
Optional properties:
|
||||
|
||||
NOTE: These are optional in that not all SoCs will have all properties. For
|
||||
SoCs which do support a given property, leaving the property out of the
|
||||
device tree will result in reduced functionality or possibly driver
|
||||
failure.
|
||||
|
||||
- ti,dscr-devstat
|
||||
offset of the devstat register
|
||||
|
||||
- ti,dscr-silicon-rev
|
||||
offset, start bit, and bitsize of silicon revision field
|
||||
|
||||
- ti,dscr-rmii-resets
|
||||
offset and bitmask of RMII reset field. May have multiple tuples if more
|
||||
than one ethernet port is available.
|
||||
|
||||
- ti,dscr-locked-regs
|
||||
possibly multiple tuples describing registers which are write protected by
|
||||
a lock register. Each tuple consists of the register offset, lock register
|
||||
offsset, and the key value used to unlock the register.
|
||||
|
||||
- ti,dscr-kick-regs
|
||||
offset and key values of two "kick" registers used to write protect other
|
||||
registers in DSCR. On SoCs using kick registers, the first key must be
|
||||
written to the first kick register and the second key must be written to
|
||||
the second register before other registers in the area are write-enabled.
|
||||
|
||||
- ti,dscr-mac-fuse-regs
|
||||
MAC addresses are contained in two registers. Each element of a MAC address
|
||||
is contained in a single byte. This property has two tuples. Each tuple has
|
||||
a register offset and four cells representing bytes in the register from
|
||||
most significant to least. The value of these four cells is the MAC byte
|
||||
index (1-6) of the byte within the register. A value of 0 means the byte
|
||||
is unused in the MAC address.
|
||||
|
||||
- ti,dscr-devstate-ctl-regs
|
||||
This property describes the bitfields used to control the state of devices.
|
||||
Each tuple describes a range of identical bitfields used to control one or
|
||||
more devices (one bitfield per device). The layout of each tuple is:
|
||||
|
||||
start_id num_ids reg enable disable start_bit nbits
|
||||
|
||||
Where:
|
||||
start_id is device id for the first device control in the range
|
||||
num_ids is the number of device controls in the range
|
||||
reg is the offset of the register holding the control bits
|
||||
enable is the value to enable a device
|
||||
disable is the value to disable a device (0xffffffff if cannot disable)
|
||||
start_bit is the bit number of the first bit in the range
|
||||
nbits is the number of bits per device control
|
||||
|
||||
- ti,dscr-devstate-stat-regs
|
||||
This property describes the bitfields used to provide device state status
|
||||
for device states controlled by the DSCR. Each tuple describes a range of
|
||||
identical bitfields used to provide status for one or more devices (one
|
||||
bitfield per device). The layout of each tuple is:
|
||||
|
||||
start_id num_ids reg enable disable start_bit nbits
|
||||
|
||||
Where:
|
||||
start_id is device id for the first device status in the range
|
||||
num_ids is the number of devices covered by the range
|
||||
reg is the offset of the register holding the status bits
|
||||
enable is the value indicating device is enabled
|
||||
disable is the value indicating device is disabled
|
||||
start_bit is the bit number of the first bit in the range
|
||||
nbits is the number of bits per device status
|
||||
|
||||
- ti,dscr-privperm
|
||||
Offset and default value for register used to set access privilege for
|
||||
some SoC devices.
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
device-state-config-regs@2a80000 {
|
||||
compatible = "ti,c64x+dscr";
|
||||
reg = <0x02a80000 0x41000>;
|
||||
|
||||
ti,dscr-devstat = <0>;
|
||||
ti,dscr-silicon-rev = <8 28 0xf>;
|
||||
ti,dscr-rmii-resets = <0x40020 0x00040000>;
|
||||
|
||||
ti,dscr-locked-regs = <0x40008 0x40004 0x0f0a0b00>;
|
||||
ti,dscr-devstate-ctl-regs =
|
||||
<0 12 0x40008 1 0 0 2
|
||||
12 1 0x40008 3 0 30 2
|
||||
13 2 0x4002c 1 0xffffffff 0 1>;
|
||||
ti,dscr-devstate-stat-regs =
|
||||
<0 10 0x40014 1 0 0 3
|
||||
10 2 0x40018 1 0 0 3>;
|
||||
|
||||
ti,dscr-mac-fuse-regs = <0x700 1 2 3 4
|
||||
0x704 5 6 0 0>;
|
||||
|
||||
ti,dscr-privperm = <0x41c 0xaaaaaaaa>;
|
||||
|
||||
ti,dscr-kick-regs = <0x38 0x83E70B13
|
||||
0x3c 0x95A4F1E0>;
|
||||
};
|
||||
@ -1,62 +0,0 @@
|
||||
External Memory Interface
|
||||
-------------------------
|
||||
|
||||
The emifa node describes a simple external bus controller found on some C6X
|
||||
SoCs. This interface provides external busses with a number of chip selects.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: must be "ti,c64x+emifa", "simple-bus"
|
||||
- reg: register area base and size
|
||||
- #address-cells: must be 2 (chip-select + offset)
|
||||
- #size-cells: must be 1
|
||||
- ranges: mapping from EMIFA space to parent space
|
||||
|
||||
|
||||
Optional properties:
|
||||
|
||||
- ti,dscr-dev-enable: Device ID if EMIF is enabled/disabled from DSCR
|
||||
|
||||
- ti,emifa-burst-priority:
|
||||
Number of memory transfers after which the EMIF will elevate the priority
|
||||
of the oldest command in the command FIFO. Setting this field to 255
|
||||
disables this feature, thereby allowing old commands to stay in the FIFO
|
||||
indefinitely.
|
||||
|
||||
- ti,emifa-ce-config:
|
||||
Configuration values for each of the supported chip selects.
|
||||
|
||||
Example:
|
||||
|
||||
emifa@70000000 {
|
||||
compatible = "ti,c64x+emifa", "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x70000000 0x100>;
|
||||
ranges = <0x2 0x0 0xa0000000 0x00000008
|
||||
0x3 0x0 0xb0000000 0x00400000
|
||||
0x4 0x0 0xc0000000 0x10000000
|
||||
0x5 0x0 0xD0000000 0x10000000>;
|
||||
|
||||
ti,dscr-dev-enable = <13>;
|
||||
ti,emifa-burst-priority = <255>;
|
||||
ti,emifa-ce-config = <0x00240120
|
||||
0x00240120
|
||||
0x00240122
|
||||
0x00240122>;
|
||||
|
||||
flash@3,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x3 0x0 0x400000>;
|
||||
bank-width = <1>;
|
||||
device-width = <1>;
|
||||
partition@0 {
|
||||
reg = <0x0 0x400000>;
|
||||
label = "NOR";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
This shows a flash chip attached to chip select 3.
|
||||
@ -1,28 +0,0 @@
|
||||
C6X System-on-Chip
|
||||
------------------
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: "simple-bus"
|
||||
- #address-cells: must be 1
|
||||
- #size-cells: must be 1
|
||||
- ranges
|
||||
|
||||
Optional properties:
|
||||
|
||||
- model: specific SoC model
|
||||
|
||||
- nodes for IP blocks within SoC
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
model = "tms320c6455";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
...
|
||||
};
|
||||
@ -137,6 +137,18 @@ properties:
|
||||
maxItems: 7
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
|
||||
sink-vdos:
|
||||
description: An array of u32 with each entry, a Vendor Defined Message Object (VDO),
|
||||
providing additional information corresponding to the product, the detailed bit
|
||||
definitions and the order of each VDO can be found in
|
||||
"USB Power Delivery Specification Revision 3.0, Version 2.0 + ECNs 2020-12-10"
|
||||
chapter 6.4.4.3.1 Discover Identity. User can specify the VDO array via
|
||||
VDO_IDH/_CERT/_PRODUCT/_UFP/_DFP/_PCABLE/_ACABLE(1/2)/_VPD() defined in
|
||||
dt-bindings/usb/pd.h.
|
||||
minItems: 3
|
||||
maxItems: 6
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
|
||||
op-sink-microwatt:
|
||||
description: Sink required operating power in microwatt, if source can't
|
||||
offer the power, Capability Mismatch is set. Required for power sink and
|
||||
|
||||
@ -105,26 +105,27 @@ properties:
|
||||
- dlc,dlc1010gig
|
||||
# Emerging Display Technology Corp. 3.5" QVGA TFT LCD panel
|
||||
- edt,et035012dm6
|
||||
# Emerging Display Technology Corp. 5.7" VGA TFT LCD panel
|
||||
- edt,et057090dhu
|
||||
- edt,et070080dh6
|
||||
# Emerging Display Technology Corp. 480x272 TFT Display with capacitive touch
|
||||
- edt,etm043080dh6gp
|
||||
# Emerging Display Technology Corp. 480x272 TFT Display
|
||||
- edt,etm0430g0dh6
|
||||
# Emerging Display Technology Corp. 5.7" VGA TFT LCD panel
|
||||
- edt,et057090dhu
|
||||
# Emerging Display Technology Corp. WVGA TFT Display with capacitive touch
|
||||
- edt,etm070080dh6
|
||||
# Emerging Display Technology Corp. WVGA TFT Display with capacitive touch
|
||||
- edt,etm0700g0dh6
|
||||
# Emerging Display Technology Corp. WVGA TFT Display with capacitive touch
|
||||
# Same as ETM0700G0DH6 but with inverted pixel clock.
|
||||
- edt,etm070080bdh6
|
||||
# Emerging Display Technology Corp. WVGA TFT Display with capacitive touch
|
||||
# Same timings as the ETM0700G0DH6, but with resistive touch.
|
||||
- edt,etm070080dh6
|
||||
# Emerging Display Technology Corp. WVGA TFT Display with capacitive touch
|
||||
# Same display as the ETM0700G0BDH6, but with changed hardware for the
|
||||
# backlight and the touch interface.
|
||||
- edt,etm070080edh6
|
||||
- edt,etm0700g0bdh6
|
||||
# Emerging Display Technology Corp. WVGA TFT Display with capacitive touch
|
||||
# Same timings as the ETM0700G0DH6, but with resistive touch.
|
||||
- edt,etm070080dh6
|
||||
- edt,etm0700g0dh6
|
||||
- edt,etm0700g0edh6
|
||||
# Evervision Electronics Co. Ltd. VGG804821 5.0" WVGA TFT LCD Panel
|
||||
- evervision,vgg804821
|
||||
# Foxlink Group 5" WVGA TFT LCD panel
|
||||
@ -173,6 +174,8 @@ properties:
|
||||
- koe,tx26d202vm0bwa
|
||||
# Kaohsiung Opto-Electronics. TX31D200VM0BAA 12.3" HSXGA LVDS panel
|
||||
- koe,tx31d200vm0baa
|
||||
# Kyocera Corporation 7" WVGA (800x480) transmissive color TFT
|
||||
- kyo,tcg070wvlq
|
||||
# Kyocera Corporation 12.1" XGA (1024x768) TFT LCD panel
|
||||
- kyo,tcg121xglp
|
||||
# LeMaker BL035-RGB-002 3.5" QVGA TFT LCD panel
|
||||
|
||||
@ -22,6 +22,8 @@ Required properties:
|
||||
* "qcom,scm-sc7180"
|
||||
* "qcom,scm-sdm845"
|
||||
* "qcom,scm-sm8150"
|
||||
* "qcom,scm-sm8250"
|
||||
* "qcom,scm-sm8350"
|
||||
and:
|
||||
* "qcom,scm"
|
||||
- clocks: Specifies clocks needed by the SCM interface, if any:
|
||||
|
||||
@ -82,8 +82,7 @@ properties:
|
||||
'#gpio-cells':
|
||||
const: 2
|
||||
|
||||
gpio-ranges:
|
||||
maxItems: 1
|
||||
gpio-ranges: true
|
||||
|
||||
interrupts: true
|
||||
|
||||
|
||||
@ -20,6 +20,9 @@ properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
vdd-supply: true
|
||||
vddio-supply: true
|
||||
|
||||
mount-matrix:
|
||||
description: an optional 3x3 mounting rotation matrix.
|
||||
|
||||
|
||||
@ -46,10 +46,14 @@ description: |
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- x-powers,axp209-adc
|
||||
- x-powers,axp221-adc
|
||||
- x-powers,axp813-adc
|
||||
oneOf:
|
||||
- const: x-powers,axp209-adc
|
||||
- const: x-powers,axp221-adc
|
||||
- const: x-powers,axp813-adc
|
||||
|
||||
- items:
|
||||
- const: x-powers,axp803-adc
|
||||
- const: x-powers,axp813-adc
|
||||
|
||||
"#io-channel-cells":
|
||||
const: 1
|
||||
|
||||
@ -1,13 +1,22 @@
|
||||
Xilinx XADC device driver
|
||||
|
||||
This binding document describes the bindings for both of them since the
|
||||
bindings are very similar. The Xilinx XADC is a ADC that can be found in the
|
||||
series 7 FPGAs from Xilinx. The XADC has a DRP interface for communication.
|
||||
Currently two different frontends for the DRP interface exist. One that is only
|
||||
available on the ZYNQ family as a hardmacro in the SoC portion of the ZYNQ. The
|
||||
other one is available on all series 7 platforms and is a softmacro with a AXI
|
||||
interface. This binding document describes the bindings for both of them since
|
||||
the bindings are very similar.
|
||||
This binding document describes the bindings for the Xilinx 7 Series XADC as well
|
||||
as the UltraScale/UltraScale+ System Monitor.
|
||||
|
||||
The Xilinx XADC is an ADC that can be found in the Series 7 FPGAs from Xilinx.
|
||||
The XADC has a DRP interface for communication. Currently two different
|
||||
frontends for the DRP interface exist. One that is only available on the ZYNQ
|
||||
family as a hardmacro in the SoC portion of the ZYNQ. The other one is available
|
||||
on all series 7 platforms and is a softmacro with a AXI interface. This binding
|
||||
document describes the bindings for both of them since the bindings are very
|
||||
similar.
|
||||
|
||||
The Xilinx System Monitor is an ADC that is found in the UltraScale and
|
||||
UltraScale+ FPGAs from Xilinx. The System Monitor provides a DRP interface for
|
||||
communication. Xilinx provides a standard IP core that can be used to access the
|
||||
System Monitor through an AXI interface in the FPGA fabric. This IP core is
|
||||
called the Xilinx System Management Wizard. This document describes the bindings
|
||||
for this IP.
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be one of
|
||||
@ -15,11 +24,14 @@ Required properties:
|
||||
configuration interface to interface to the XADC hardmacro.
|
||||
* "xlnx,axi-xadc-1.00.a": When using the axi-xadc pcore to
|
||||
interface to the XADC hardmacro.
|
||||
* "xlnx,system-management-wiz-1.3": When using the
|
||||
Xilinx System Management Wizard fabric IP core to access the
|
||||
UltraScale and UltraScale+ System Monitor.
|
||||
- reg: Address and length of the register set for the device
|
||||
- interrupts: Interrupt for the XADC control interface.
|
||||
- clocks: When using the ZYNQ this must be the ZYNQ PCAP clock,
|
||||
when using the AXI-XADC pcore this must be the clock that provides the
|
||||
clock to the AXI bus interface of the core.
|
||||
when using the axi-xadc or the axi-system-management-wizard this must be
|
||||
the clock that provides the clock to the AXI bus interface of the core.
|
||||
|
||||
Optional properties:
|
||||
- xlnx,external-mux:
|
||||
@ -110,3 +122,20 @@ Examples:
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
adc@80000000 {
|
||||
compatible = "xlnx,system-management-wiz-1.3";
|
||||
reg = <0x80000000 0x1000>;
|
||||
interrupts = <0 81 4>;
|
||||
interrupt-parent = <&gic>;
|
||||
clocks = <&fpga1_clk>;
|
||||
|
||||
xlnx,channels {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
channel@0 {
|
||||
reg = <0>;
|
||||
xlnx,bipolar;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
63
Documentation/devicetree/bindings/iio/dac/adi,ad5766.yaml
Normal file
63
Documentation/devicetree/bindings/iio/dac/adi,ad5766.yaml
Normal file
@ -0,0 +1,63 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
# Copyright 2020 Analog Devices Inc.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/dac/adi,ad5766.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices AD5766 DAC device driver
|
||||
|
||||
maintainers:
|
||||
- Cristian Pop <cristian.pop@analog.com>
|
||||
|
||||
description: |
|
||||
Bindings for the Analog Devices AD5766 current DAC device. Datasheet can be
|
||||
found here:
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad5766-5767.pdf
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad5766
|
||||
- adi,ad5767
|
||||
|
||||
output-range-microvolts:
|
||||
description: Select converter output range.
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 1000000
|
||||
|
||||
spi-cpol: true
|
||||
|
||||
reset-gpios:
|
||||
description: GPIO spec for the RESET pin. As the line is active low, it
|
||||
should be marked GPIO_ACTIVE_LOW.
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- output-range-microvolts
|
||||
- reg
|
||||
- spi-max-frequency
|
||||
- spi-cpol
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ad5766@0 {
|
||||
compatible = "adi,ad5766";
|
||||
output-range-microvolts = <(-5000) 5000>;
|
||||
reg = <0>;
|
||||
spi-cpol;
|
||||
spi-max-frequency = <1000000>;
|
||||
reset-gpios = <&gpio 22 0>;
|
||||
};
|
||||
};
|
||||
@ -39,20 +39,39 @@ properties:
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
not:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: microchip,mcp4726
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: microchip,mcp4725
|
||||
then:
|
||||
properties:
|
||||
vref-supply: false
|
||||
required:
|
||||
- vdd-supply
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: microchip,mcp4726
|
||||
then:
|
||||
anyOf:
|
||||
- required:
|
||||
- vdd-supply
|
||||
- required:
|
||||
- vref-supply
|
||||
|
||||
- if:
|
||||
not:
|
||||
required:
|
||||
- vref-supply
|
||||
then:
|
||||
properties:
|
||||
microchip,vref-buffered: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- vdd-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
||||
@ -19,6 +19,9 @@ properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
vdd-supply: true
|
||||
vddio-supply: true
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
description:
|
||||
|
||||
@ -1,45 +0,0 @@
|
||||
Invensense MPU-3050 Gyroscope device tree bindings
|
||||
|
||||
Required properties:
|
||||
- compatible : should be "invensense,mpu3050"
|
||||
- reg : the I2C address of the sensor
|
||||
|
||||
Optional properties:
|
||||
- interrupts : interrupt mapping for the trigger interrupt from the
|
||||
internal oscillator. The following IRQ modes are supported:
|
||||
IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_HIGH and
|
||||
IRQ_TYPE_LEVEL_LOW. The driver should detect and configure the hardware
|
||||
for the desired interrupt type.
|
||||
- vdd-supply : supply regulator for the main power voltage.
|
||||
- vlogic-supply : supply regulator for the signal voltage.
|
||||
- mount-matrix : see iio/mount-matrix.txt
|
||||
|
||||
Optional subnodes:
|
||||
- The MPU-3050 will pass through and forward the I2C signals from the
|
||||
incoming I2C bus, alternatively drive traffic to a slave device (usually
|
||||
an accelerometer) on its own initiative. Therefore is supports a subnode
|
||||
i2c gate node. For details see: i2c/i2c-gate.txt
|
||||
|
||||
Example:
|
||||
|
||||
mpu3050@68 {
|
||||
compatible = "invensense,mpu3050";
|
||||
reg = <0x68>;
|
||||
interrupt-parent = <&foo>;
|
||||
interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
|
||||
vdd-supply = <&bar>;
|
||||
vlogic-supply = <&baz>;
|
||||
|
||||
/* External I2C interface */
|
||||
i2c-gate {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
fnord@18 {
|
||||
compatible = "fnord";
|
||||
reg = <0x18>;
|
||||
interrupt-parent = <&foo>;
|
||||
interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,70 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/gyroscope/invensense,mpu3050.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Invensense MPU-3050 Gyroscope
|
||||
|
||||
maintainers:
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: invensense,mpu3050
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
vdd-supply: true
|
||||
|
||||
vlogic-supply: true
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
description:
|
||||
Interrupt mapping for the trigger interrupt from the internal oscillator.
|
||||
|
||||
mount-matrix: true
|
||||
|
||||
i2c-gate:
|
||||
$ref: /schemas/i2c/i2c-controller.yaml
|
||||
unevaluatedProperties: false
|
||||
description: |
|
||||
The MPU-3050 will pass through and forward the I2C signals from the
|
||||
incoming I2C bus, alternatively drive traffic to a slave device (usually
|
||||
an accelerometer) on its own initiative. Therefore is supports an
|
||||
i2c-gate subnode.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gyroscope@68 {
|
||||
compatible = "invensense,mpu3050";
|
||||
reg = <0x68>;
|
||||
interrupt-parent = <&foo>;
|
||||
interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
|
||||
vdd-supply = <&bar>;
|
||||
vlogic-supply = <&baz>;
|
||||
|
||||
i2c-gate {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
magnetometer@c {
|
||||
compatible = "ak,ak8975";
|
||||
reg = <0x0c>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
@ -1,67 +0,0 @@
|
||||
InvenSense MPU-6050 Six-Axis (Gyro + Accelerometer) MEMS MotionTracking Device
|
||||
|
||||
http://www.invensense.com/mems/gyro/mpu6050.html
|
||||
|
||||
Required properties:
|
||||
- compatible : should be one of
|
||||
"invensense,mpu6000"
|
||||
"invensense,mpu6050"
|
||||
"invensense,mpu6500"
|
||||
"invensense,mpu6515"
|
||||
"invensense,mpu9150"
|
||||
"invensense,mpu9250"
|
||||
"invensense,mpu9255"
|
||||
"invensense,icm20608"
|
||||
"invensense,icm20609"
|
||||
"invensense,icm20689"
|
||||
"invensense,icm20602"
|
||||
"invensense,icm20690"
|
||||
"invensense,iam20680"
|
||||
- reg : the I2C address of the sensor
|
||||
- interrupts: interrupt mapping for IRQ. It should be configured with flags
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or
|
||||
IRQ_TYPE_EDGE_FALLING.
|
||||
|
||||
Refer to interrupt-controller/interrupts.txt for generic interrupt client node
|
||||
bindings.
|
||||
|
||||
Optional properties:
|
||||
- vdd-supply: regulator phandle for VDD supply
|
||||
- vddio-supply: regulator phandle for VDDIO supply
|
||||
- mount-matrix: an optional 3x3 mounting rotation matrix
|
||||
- i2c-gate node. These devices also support an auxiliary i2c bus. This is
|
||||
simple enough to be described using the i2c-gate binding. See
|
||||
i2c/i2c-gate.txt for more details.
|
||||
|
||||
Example:
|
||||
mpu6050@68 {
|
||||
compatible = "invensense,mpu6050";
|
||||
reg = <0x68>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <18 IRQ_TYPE_EDGE_RISING>;
|
||||
mount-matrix = "-0.984807753012208", /* x0 */
|
||||
"0", /* y0 */
|
||||
"-0.173648177666930", /* z0 */
|
||||
"0", /* x1 */
|
||||
"-1", /* y1 */
|
||||
"0", /* z1 */
|
||||
"-0.173648177666930", /* x2 */
|
||||
"0", /* y2 */
|
||||
"0.984807753012208"; /* z2 */
|
||||
};
|
||||
|
||||
|
||||
mpu9250@68 {
|
||||
compatible = "invensense,mpu9250";
|
||||
reg = <0x68>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
i2c-gate {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ax8975@c {
|
||||
compatible = "ak,ak8975";
|
||||
reg = <0x0c>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -0,0 +1,104 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/imu/invensense,mpu6050.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: InvenSense MPU-6050 Six-Axis (Gyro + Accelerometer) MEMS MotionTracking Device
|
||||
|
||||
maintainers:
|
||||
- Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
|
||||
|
||||
description: |
|
||||
These devices support both I2C and SPI bus interfaces.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- invensense,iam20680
|
||||
- invensense,icm20608
|
||||
- invensense,icm20609
|
||||
- invensense,icm20689
|
||||
- invensense,icm20602
|
||||
- invensense,icm20690
|
||||
- invensense,mpu6000
|
||||
- invensense,mpu6050
|
||||
- invensense,mpu6500
|
||||
- invensense,mpu6515
|
||||
- invensense,mpu6880
|
||||
- invensense,mpu9150
|
||||
- invensense,mpu9250
|
||||
- invensense,mpu9255
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency: true
|
||||
|
||||
vdd-supply: true
|
||||
vddio-supply: true
|
||||
|
||||
mount-matrix: true
|
||||
|
||||
i2c-gate:
|
||||
$ref: /schemas/i2c/i2c-controller.yaml
|
||||
unevaluatedProperties: false
|
||||
description: |
|
||||
These devices also support an auxiliary i2c bus via an i2c-gate.
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
not:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- invensense,mpu9150
|
||||
- invensense,mpu9250
|
||||
- invensense,mpu9255
|
||||
then:
|
||||
properties:
|
||||
i2c-gate: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
imu@68 {
|
||||
compatible = "invensense,mpu9250";
|
||||
reg = <0x68>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
mount-matrix = "-0.984807753012208", /* x0 */
|
||||
"0", /* y0 */
|
||||
"-0.173648177666930", /* z0 */
|
||||
"0", /* x1 */
|
||||
"-1", /* y1 */
|
||||
"0", /* z1 */
|
||||
"-0.173648177666930", /* x2 */
|
||||
"0", /* y2 */
|
||||
"0.984807753012208"; /* z2 */
|
||||
i2c-gate {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
magnetometer@c {
|
||||
compatible = "ak,ak8975";
|
||||
reg = <0x0c>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
@ -30,6 +30,9 @@ properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
vdd-supply: true
|
||||
vddio-supply: true
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
|
||||
@ -0,0 +1,112 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/magnetometer/yamaha,yas530.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Yamaha YAS530 family of magnetometer sensors
|
||||
|
||||
maintainers:
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
description:
|
||||
The Yamaha YAS530 magnetometers is a line of 3-axis magnetometers
|
||||
first introduced by Yamaha in 2009 with the YAS530. They are successors
|
||||
of Yamaha's first magnetometer YAS529. Over the years this magnetometer
|
||||
has been miniaturized and appeared in a number of different variants.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: '^magnetometer@[0-9a-f]+$'
|
||||
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- yamaha,yas530
|
||||
- yamaha,yas532
|
||||
- yamaha,yas533
|
||||
- yamaha,yas535
|
||||
- yamaha,yas536
|
||||
- yamaha,yas537
|
||||
- yamaha,yas539
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
description: The YAS530 sensor has a RSTN pin used to reset
|
||||
the logic inside the sensor. This GPIO line should connect
|
||||
to that pin and be marked as GPIO_ACTIVE_LOW.
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
description: Interrupt for INT pin for interrupt generation.
|
||||
The polarity, whether the interrupt is active on the rising
|
||||
or the falling edge, is software-configurable in the hardware.
|
||||
|
||||
vdd-supply:
|
||||
description: An optional regulator providing core power supply
|
||||
on the VDD pin, typically 1.8 V or 3.0 V.
|
||||
|
||||
iovdd-supply:
|
||||
description: An optional regulator providing I/O power supply
|
||||
for the I2C interface on the IOVDD pin, typically 1.8 V.
|
||||
|
||||
mount-matrix:
|
||||
description: An optional 3x3 mounting rotation matrix.
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
not:
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
const: yamaha,yas530
|
||||
then:
|
||||
properties:
|
||||
reset-gpios: false
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
const: yamaha,yas539
|
||||
then:
|
||||
properties:
|
||||
interrupts: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
i2c-0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
magnetometer@2e {
|
||||
compatible = "yamaha,yas530";
|
||||
reg = <0x2e>;
|
||||
vdd-supply = <&ldo1_reg>;
|
||||
iovdd-supply = <&ldo2_reg>;
|
||||
reset-gpios = <&gpio6 12 GPIO_ACTIVE_LOW>;
|
||||
interrupts = <&gpio6 13 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c-1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
magnetometer@2e {
|
||||
compatible = "yamaha,yas539";
|
||||
reg = <0x2e>;
|
||||
vdd-supply = <&ldo1_reg>;
|
||||
};
|
||||
};
|
||||
@ -5,7 +5,8 @@ Required properties:
|
||||
- compatible: "adc-keys"
|
||||
- io-channels: Phandle to an ADC channel
|
||||
- io-channel-names = "buttons";
|
||||
- keyup-threshold-microvolt: Voltage at which all the keys are considered up.
|
||||
- keyup-threshold-microvolt: Voltage above or equal to which all the keys are
|
||||
considered up.
|
||||
|
||||
Optional properties:
|
||||
- poll-interval: Poll interval time in milliseconds
|
||||
@ -17,7 +18,12 @@ Each button (key) is represented as a sub-node of "adc-keys":
|
||||
Required subnode-properties:
|
||||
- label: Descriptive name of the key.
|
||||
- linux,code: Keycode to emit.
|
||||
- press-threshold-microvolt: Voltage ADC input when this key is pressed.
|
||||
- press-threshold-microvolt: voltage above or equal to which this key is
|
||||
considered pressed.
|
||||
|
||||
No two values of press-threshold-microvolt may be the same.
|
||||
All values of press-threshold-microvolt must be less than
|
||||
keyup-threshold-microvolt.
|
||||
|
||||
Example:
|
||||
|
||||
@ -47,3 +53,15 @@ Example:
|
||||
press-threshold-microvolt = <500000>;
|
||||
};
|
||||
};
|
||||
|
||||
+--------------------------------+------------------------+
|
||||
| 2.000.000 <= value | no key pressed |
|
||||
+--------------------------------+------------------------+
|
||||
| 1.500.000 <= value < 2.000.000 | KEY_VOLUMEUP pressed |
|
||||
+--------------------------------+------------------------+
|
||||
| 1.000.000 <= value < 1.500.000 | KEY_VOLUMEDOWN pressed |
|
||||
+--------------------------------+------------------------+
|
||||
| 500.000 <= value < 1.000.000 | KEY_ENTER pressed |
|
||||
+--------------------------------+------------------------+
|
||||
| value < 500.000 | no key pressed |
|
||||
+--------------------------------+------------------------+
|
||||
|
||||
@ -26,6 +26,7 @@ properties:
|
||||
- goodix,gt927
|
||||
- goodix,gt9271
|
||||
- goodix,gt928
|
||||
- goodix,gt9286
|
||||
- goodix,gt967
|
||||
|
||||
reg:
|
||||
|
||||
@ -0,0 +1,67 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Allwinner A31 NMI/Wakeup Interrupt Controller Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Chen-Yu Tsai <wens@csie.org>
|
||||
- Maxime Ripard <mripard@kernel.org>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/interrupt-controller.yaml#
|
||||
|
||||
properties:
|
||||
"#interrupt-cells":
|
||||
const: 3
|
||||
description:
|
||||
The first cell is GIC_SPI (0), the second cell is the IRQ number, and
|
||||
the third cell is the trigger type as defined in interrupt.txt in this
|
||||
directory.
|
||||
|
||||
compatible:
|
||||
oneOf:
|
||||
- const: allwinner,sun6i-a31-r-intc
|
||||
- items:
|
||||
- enum:
|
||||
- allwinner,sun8i-a83t-r-intc
|
||||
- allwinner,sun8i-h3-r-intc
|
||||
- allwinner,sun50i-a64-r-intc
|
||||
- const: allwinner,sun6i-a31-r-intc
|
||||
- const: allwinner,sun50i-h6-r-intc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
description:
|
||||
The GIC interrupt labeled as "External NMI".
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
required:
|
||||
- "#interrupt-cells"
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-controller
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
r_intc: interrupt-controller@1f00c00 {
|
||||
compatible = "allwinner,sun50i-a64-r-intc",
|
||||
"allwinner,sun6i-a31-r-intc";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
reg = <0x01f00c00 0x400>;
|
||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
...
|
||||
@ -22,23 +22,16 @@ properties:
|
||||
|
||||
compatible:
|
||||
oneOf:
|
||||
- const: allwinner,sun6i-a31-r-intc
|
||||
- const: allwinner,sun6i-a31-sc-nmi
|
||||
deprecated: true
|
||||
- const: allwinner,sun7i-a20-sc-nmi
|
||||
- items:
|
||||
- const: allwinner,sun8i-a83t-r-intc
|
||||
- const: allwinner,sun6i-a31-r-intc
|
||||
- const: allwinner,sun8i-v3s-nmi
|
||||
- const: allwinner,sun9i-a80-nmi
|
||||
- const: allwinner,sun9i-a80-nmi
|
||||
- items:
|
||||
- const: allwinner,sun50i-a64-r-intc
|
||||
- const: allwinner,sun6i-a31-r-intc
|
||||
- items:
|
||||
- const: allwinner,sun50i-a100-nmi
|
||||
- const: allwinner,sun9i-a80-nmi
|
||||
- items:
|
||||
- const: allwinner,sun50i-h6-r-intc
|
||||
- const: allwinner,sun6i-a31-r-intc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@ -20,6 +20,8 @@ Properties:
|
||||
Definition: Should contain "qcom,<soc>-pdc" and "qcom,pdc"
|
||||
- "qcom,sc7180-pdc": For SC7180
|
||||
- "qcom,sdm845-pdc": For SDM845
|
||||
- "qcom,sdm8250-pdc": For SM8250
|
||||
- "qcom,sdm8350-pdc": For SM8350
|
||||
|
||||
- reg:
|
||||
Usage: required
|
||||
|
||||
@ -0,0 +1,57 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interrupt-controller/realtek,rtl-intc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Realtek RTL SoC interrupt controller devicetree bindings
|
||||
|
||||
maintainers:
|
||||
- Birger Koblitz <mail@birger-koblitz.de>
|
||||
- Bert Vermeulen <bert@biot.com>
|
||||
- John Crispin <john@phrozen.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: realtek,rtl-intc
|
||||
|
||||
"#interrupt-cells":
|
||||
const: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
"#address-cells":
|
||||
const: 0
|
||||
|
||||
interrupt-map:
|
||||
description: Describes mapping from SoC interrupts to CPU interrupts
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#interrupt-cells"
|
||||
- interrupt-controller
|
||||
- "#address-cells"
|
||||
- interrupt-map
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
intc: interrupt-controller@3000 {
|
||||
compatible = "realtek,rtl-intc";
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
reg = <0x3000 0x20>;
|
||||
#address-cells = <0>;
|
||||
interrupt-map =
|
||||
<31 &cpuintc 2>,
|
||||
<30 &cpuintc 1>,
|
||||
<29 &cpuintc 5>;
|
||||
};
|
||||
@ -1,48 +0,0 @@
|
||||
Sigma Designs SMP86xx/SMP87xx secondary interrupt controller
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "sigma,smp8642-intc"
|
||||
- reg: physical address of MMIO region
|
||||
- ranges: address space mapping of child nodes
|
||||
- interrupt-controller: boolean
|
||||
- #address-cells: should be <1>
|
||||
- #size-cells: should be <1>
|
||||
|
||||
One child node per control block with properties:
|
||||
- reg: address of registers for this control block
|
||||
- interrupt-controller: boolean
|
||||
- #interrupt-cells: should be <2>, interrupt index and flags per interrupts.txt
|
||||
- interrupts: interrupt spec of primary interrupt controller
|
||||
|
||||
Example:
|
||||
|
||||
interrupt-controller@6e000 {
|
||||
compatible = "sigma,smp8642-intc";
|
||||
reg = <0x6e000 0x400>;
|
||||
ranges = <0x0 0x6e000 0x400>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupt-controller;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
irq0: interrupt-controller@0 {
|
||||
reg = <0x000 0x100>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
irq1: interrupt-controller@100 {
|
||||
reg = <0x100 0x100>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
irq2: interrupt-controller@300 {
|
||||
reg = <0x300 0x100>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
@ -1,103 +0,0 @@
|
||||
C6X Interrupt Chips
|
||||
-------------------
|
||||
|
||||
* C64X+ Core Interrupt Controller
|
||||
|
||||
The core interrupt controller provides 16 prioritized interrupts to the
|
||||
C64X+ core. Priority 0 and 1 are used for reset and NMI respectively.
|
||||
Priority 2 and 3 are reserved. Priority 4-15 are used for interrupt
|
||||
sources coming from outside the core.
|
||||
|
||||
Required properties:
|
||||
--------------------
|
||||
- compatible: Should be "ti,c64x+core-pic";
|
||||
- #interrupt-cells: <1>
|
||||
|
||||
Interrupt Specifier Definition
|
||||
------------------------------
|
||||
Single cell specifying the core interrupt priority level (4-15) where
|
||||
4 is highest priority and 15 is lowest priority.
|
||||
|
||||
Example
|
||||
-------
|
||||
core_pic: interrupt-controller@0 {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "ti,c64x+core-pic";
|
||||
};
|
||||
|
||||
|
||||
|
||||
* C64x+ Megamodule Interrupt Controller
|
||||
|
||||
The megamodule PIC consists of four interrupt mupliplexers each of which
|
||||
combine up to 32 interrupt inputs into a single interrupt output which
|
||||
may be cascaded into the core interrupt controller. The megamodule PIC
|
||||
has a total of 12 outputs cascading into the core interrupt controller.
|
||||
One for each core interrupt priority level. In addition to the combined
|
||||
interrupt sources, individual megamodule interrupts may be cascaded to
|
||||
the core interrupt controller. When an individual interrupt is cascaded,
|
||||
it is no longer handled through a megamodule interrupt combiner and is
|
||||
considered to have the core interrupt controller as the parent.
|
||||
|
||||
Required properties:
|
||||
--------------------
|
||||
- compatible: "ti,c64x+megamod-pic"
|
||||
- interrupt-controller
|
||||
- #interrupt-cells: <1>
|
||||
- reg: base address and size of register area
|
||||
- interrupts: This should have four cells; one for each interrupt combiner.
|
||||
The cells contain the core priority interrupt to which the
|
||||
corresponding combiner output is wired.
|
||||
|
||||
Optional properties:
|
||||
--------------------
|
||||
- ti,c64x+megamod-pic-mux: Array of 12 cells correspnding to the 12 core
|
||||
priority interrupts. The first cell corresponds to
|
||||
core priority 4 and the last cell corresponds to
|
||||
core priority 15. The value of each cell is the
|
||||
megamodule interrupt source which is MUXed to
|
||||
the core interrupt corresponding to the cell
|
||||
position. Allowed values are 4 - 127. Mapping for
|
||||
interrupts 0 - 3 (combined interrupt sources) are
|
||||
ignored.
|
||||
|
||||
Interrupt Specifier Definition
|
||||
------------------------------
|
||||
Single cell specifying the megamodule interrupt source (4-127). Note that
|
||||
interrupts mapped directly to the core with "ti,c64x+megamod-pic-mux" will
|
||||
use the core interrupt controller as their parent and the specifier will
|
||||
be the core priority level, not the megamodule interrupt number.
|
||||
|
||||
Examples
|
||||
--------
|
||||
megamod_pic: interrupt-controller@1800000 {
|
||||
compatible = "ti,c64x+megamod-pic";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x1800000 0x1000>;
|
||||
interrupt-parent = <&core_pic>;
|
||||
interrupts = < 12 13 14 15 >;
|
||||
};
|
||||
|
||||
This is a minimal example where all individual interrupts go through a
|
||||
combiner. Combiner-0 is mapped to core interrupt 12, combiner-1 is mapped
|
||||
to interrupt 13, etc.
|
||||
|
||||
|
||||
megamod_pic: interrupt-controller@1800000 {
|
||||
compatible = "ti,c64x+megamod-pic";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x1800000 0x1000>;
|
||||
interrupt-parent = <&core_pic>;
|
||||
interrupts = < 12 13 14 15 >;
|
||||
ti,c64x+megamod-pic-mux = < 0 0 0 0
|
||||
32 0 0 0
|
||||
0 0 0 0 >;
|
||||
};
|
||||
|
||||
This the same as the first example except that megamodule interrupt 32 is
|
||||
mapped directly to core priority interrupt 8. The node using this interrupt
|
||||
must set the core controller as its interrupt parent and use 8 in the
|
||||
interrupt specifier value.
|
||||
@ -19,6 +19,9 @@ properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- const: allwinner,sun8i-h3-deinterlace
|
||||
- items:
|
||||
- const: allwinner,sun8i-r40-deinterlace
|
||||
- const: allwinner,sun8i-h3-deinterlace
|
||||
- items:
|
||||
- const: allwinner,sun50i-a64-deinterlace
|
||||
- const: allwinner,sun8i-h3-deinterlace
|
||||
|
||||
@ -23,6 +23,9 @@ properties:
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
port:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
@ -75,6 +78,7 @@ additionalProperties: false
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/marvell,mmp2.h>
|
||||
#include <dt-bindings/power/marvell,mmp2.h>
|
||||
|
||||
camera@d420a000 {
|
||||
compatible = "marvell,mmp2-ccic";
|
||||
@ -84,6 +88,7 @@ examples:
|
||||
clock-names = "axi";
|
||||
#clock-cells = <0>;
|
||||
clock-output-names = "mclk";
|
||||
power-domains = <&soc_clocks MMP3_POWER_DOMAIN_CAMERA>;
|
||||
|
||||
port {
|
||||
camera0_0: endpoint {
|
||||
|
||||
@ -26,10 +26,14 @@ properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- renesas,r8a774a1-rpc-if # RZ/G2M
|
||||
- renesas,r8a774b1-rpc-if # RZ/G2N
|
||||
- renesas,r8a774c0-rpc-if # RZ/G2E
|
||||
- renesas,r8a774e1-rpc-if # RZ/G2H
|
||||
- renesas,r8a77970-rpc-if # R-Car V3M
|
||||
- renesas,r8a77980-rpc-if # R-Car V3H
|
||||
- renesas,r8a77995-rpc-if # R-Car D3
|
||||
- const: renesas,rcar-gen3-rpc-if # a generic R-Car gen3 device
|
||||
- const: renesas,rcar-gen3-rpc-if # a generic R-Car gen3 or RZ/G2 device
|
||||
|
||||
reg:
|
||||
items:
|
||||
|
||||
@ -0,0 +1,32 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mips/lantiq/lantiq,cgu.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Lantiq Xway SoC series Clock Generation Unit (CGU)
|
||||
|
||||
maintainers:
|
||||
- John Crispin <john@phrozen.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- lantiq,cgu-xway
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
cgu@103000 {
|
||||
compatible = "lantiq,cgu-xway";
|
||||
reg = <0x103000 0x1000>;
|
||||
};
|
||||
@ -0,0 +1,32 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mips/lantiq/lantiq,dma-xway.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Lantiq Xway SoCs DMA Controller DT bindings
|
||||
|
||||
maintainers:
|
||||
- John Crispin <john@phrozen.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- lantiq,dma-xway
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
dma@e104100 {
|
||||
compatible = "lantiq,dma-xway";
|
||||
reg = <0xe104100 0x800>;
|
||||
};
|
||||
@ -0,0 +1,32 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mips/lantiq/lantiq,ebu.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Lantiq Xway SoC series External Bus Unit (EBU)
|
||||
|
||||
maintainers:
|
||||
- John Crispin <john@phrozen.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- lantiq,ebu-xway
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
ebu@105300 {
|
||||
compatible = "lantiq,ebu-xway";
|
||||
reg = <0x105300 0x100>;
|
||||
};
|
||||
@ -0,0 +1,32 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mips/lantiq/lantiq,pmu.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Lantiq Xway SoC series Power Management Unit (PMU)
|
||||
|
||||
maintainers:
|
||||
- John Crispin <john@phrozen.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- lantiq,pmu-xway
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
pmu@102000 {
|
||||
compatible = "lantiq,pmu-xway";
|
||||
reg = <0x102000 0x1000>;
|
||||
};
|
||||
24
Documentation/devicetree/bindings/mips/realtek-rtl.yaml
Normal file
24
Documentation/devicetree/bindings/mips/realtek-rtl.yaml
Normal file
@ -0,0 +1,24 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mips/realtek-rtl.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Realtek RTL83xx/93xx SoC series device tree bindings
|
||||
|
||||
maintainers:
|
||||
- Bert Vermeulen <bert@biot.com>
|
||||
- Sander Vanheule <sander@svanheule.net>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: "/"
|
||||
compatible:
|
||||
oneOf:
|
||||
# RTL8382-based boards
|
||||
- items:
|
||||
- enum:
|
||||
- cisco,sg220-26
|
||||
- const: realtek,rtl8382-soc
|
||||
|
||||
additionalProperties: true
|
||||
@ -74,17 +74,60 @@ allOf:
|
||||
Any configuration is ignored when the phy-mode is set to "rmii".
|
||||
|
||||
amlogic,rx-delay-ns:
|
||||
deprecated: true
|
||||
enum:
|
||||
- 0
|
||||
- 2
|
||||
default: 0
|
||||
description:
|
||||
The internal RGMII RX clock delay (provided by this IP block) in
|
||||
nanoseconds. When phy-mode is set to "rgmii" then the RX delay
|
||||
should be explicitly configured. When the phy-mode is set to
|
||||
either "rgmii-id" or "rgmii-rxid" the RX clock delay is already
|
||||
provided by the PHY. Any configuration is ignored when the
|
||||
phy-mode is set to "rmii".
|
||||
The internal RGMII RX clock delay in nanoseconds. Deprecated, use
|
||||
rx-internal-delay-ps instead.
|
||||
|
||||
rx-internal-delay-ps:
|
||||
default: 0
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- amlogic,meson8b-dwmac
|
||||
- amlogic,meson8m2-dwmac
|
||||
- amlogic,meson-gxbb-dwmac
|
||||
- amlogic,meson-axg-dwmac
|
||||
then:
|
||||
properties:
|
||||
rx-internal-delay-ps:
|
||||
enum:
|
||||
- 0
|
||||
- 2000
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- amlogic,meson-g12a-dwmac
|
||||
then:
|
||||
properties:
|
||||
rx-internal-delay-ps:
|
||||
enum:
|
||||
- 0
|
||||
- 200
|
||||
- 400
|
||||
- 600
|
||||
- 800
|
||||
- 1000
|
||||
- 1200
|
||||
- 1400
|
||||
- 1600
|
||||
- 1800
|
||||
- 2000
|
||||
- 2200
|
||||
- 2400
|
||||
- 2600
|
||||
- 2800
|
||||
- 3000
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
48
Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml
Normal file
48
Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml
Normal file
@ -0,0 +1,48 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/brcm,bcm4908-enet.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Broadcom BCM4908 Ethernet controller
|
||||
|
||||
description: Broadcom's Ethernet controller integrated into BCM4908 family SoCs
|
||||
|
||||
maintainers:
|
||||
- Rafał Miłecki <rafal@milecki.pl>
|
||||
|
||||
allOf:
|
||||
- $ref: ethernet-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: brcm,bcm4908-enet
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
description: RX interrupt
|
||||
|
||||
interrupt-names:
|
||||
const: rx
|
||||
|
||||
required:
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
ethernet@80002000 {
|
||||
compatible = "brcm,bcm4908-enet";
|
||||
reg = <0x80002000 0x1000>;
|
||||
|
||||
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "rx";
|
||||
};
|
||||
@ -1,108 +1,13 @@
|
||||
* Broadcom Starfighter 2 integrated swich
|
||||
|
||||
Required properties:
|
||||
See dsa/brcm,bcm7445-switch-v4.0.yaml for the documentation.
|
||||
|
||||
- compatible: should be one of
|
||||
"brcm,bcm7445-switch-v4.0"
|
||||
"brcm,bcm7278-switch-v4.0"
|
||||
"brcm,bcm7278-switch-v4.8"
|
||||
- reg: addresses and length of the register sets for the device, must be 6
|
||||
pairs of register addresses and lengths
|
||||
- interrupts: interrupts for the devices, must be two interrupts
|
||||
- #address-cells: must be 1, see dsa/dsa.txt
|
||||
- #size-cells: must be 0, see dsa/dsa.txt
|
||||
|
||||
Deprecated binding required properties:
|
||||
*Deprecated* binding required properties:
|
||||
|
||||
- dsa,mii-bus: phandle to the MDIO bus controller, see dsa/dsa.txt
|
||||
- dsa,ethernet: phandle to the CPU network interface controller, see dsa/dsa.txt
|
||||
- #address-cells: must be 2, see dsa/dsa.txt
|
||||
|
||||
Subnodes:
|
||||
|
||||
The integrated switch subnode should be specified according to the binding
|
||||
described in dsa/dsa.txt.
|
||||
|
||||
Optional properties:
|
||||
|
||||
- reg-names: litteral names for the device base register addresses, when present
|
||||
must be: "core", "reg", "intrl2_0", "intrl2_1", "fcb", "acb"
|
||||
|
||||
- interrupt-names: litternal names for the device interrupt lines, when present
|
||||
must be: "switch_0" and "switch_1"
|
||||
|
||||
- brcm,num-gphy: specify the maximum number of integrated gigabit PHYs in the
|
||||
switch
|
||||
|
||||
- brcm,num-rgmii-ports: specify the maximum number of RGMII interfaces supported
|
||||
by the switch
|
||||
|
||||
- brcm,fcb-pause-override: boolean property, if present indicates that the switch
|
||||
supports Failover Control Block pause override capability
|
||||
|
||||
- brcm,acb-packets-inflight: boolean property, if present indicates that the switch
|
||||
Admission Control Block supports reporting the number of packets in-flight in a
|
||||
switch queue
|
||||
|
||||
- resets: a single phandle and reset identifier pair. See
|
||||
Documentation/devicetree/bindings/reset/reset.txt for details.
|
||||
|
||||
- reset-names: If the "reset" property is specified, this property should have
|
||||
the value "switch" to denote the switch reset line.
|
||||
|
||||
- clocks: when provided, the first phandle is to the switch's main clock and
|
||||
is valid for both BCM7445 and BCM7278. The second phandle is only applicable
|
||||
to BCM7445 and is to support dividing the switch core clock.
|
||||
|
||||
- clock-names: when provided, the first phandle must be "sw_switch", and the
|
||||
second must be named "sw_switch_mdiv".
|
||||
|
||||
Port subnodes:
|
||||
|
||||
Optional properties:
|
||||
|
||||
- brcm,use-bcm-hdr: boolean property, if present, indicates that the switch
|
||||
port has Broadcom tags enabled (per-packet metadata)
|
||||
|
||||
Example:
|
||||
|
||||
switch_top@f0b00000 {
|
||||
compatible = "simple-bus";
|
||||
#size-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
ranges = <0 0xf0b00000 0x40804>;
|
||||
|
||||
ethernet_switch@0 {
|
||||
compatible = "brcm,bcm7445-switch-v4.0";
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
reg = <0x0 0x40000
|
||||
0x40000 0x110
|
||||
0x40340 0x30
|
||||
0x40380 0x30
|
||||
0x40400 0x34
|
||||
0x40600 0x208>;
|
||||
reg-names = "core", "reg", intrl2_0", "intrl2_1",
|
||||
"fcb, "acb";
|
||||
interrupts = <0 0x18 0
|
||||
0 0x19 0>;
|
||||
brcm,num-gphy = <1>;
|
||||
brcm,num-rgmii-ports = <2>;
|
||||
brcm,fcb-pause-override;
|
||||
brcm,acb-packets-inflight;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
label = "gphy";
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Example using the old DSA DeviceTree binding:
|
||||
|
||||
switch_top@f0b00000 {
|
||||
@ -132,7 +37,7 @@ switch_top@f0b00000 {
|
||||
switch@0 {
|
||||
reg = <0 0>;
|
||||
#size-cells = <0>;
|
||||
#address-cells <1>;
|
||||
#address-cells = <1>;
|
||||
|
||||
port@0 {
|
||||
label = "gphy";
|
||||
|
||||
@ -4,7 +4,7 @@ Generic Bluetooth controller over USB (btusb driver)
|
||||
Required properties:
|
||||
|
||||
- compatible : should comply with the format "usbVID,PID" specified in
|
||||
Documentation/devicetree/bindings/usb/usb-device.txt
|
||||
Documentation/devicetree/bindings/usb/usb-device.yaml
|
||||
At the time of writing, the only OF supported devices
|
||||
(more may be added later) are:
|
||||
|
||||
@ -38,7 +38,7 @@ Following example uses irq pin number 3 of gpio0 for out of band wake-on-bt:
|
||||
compatible = "usb1286,204e";
|
||||
reg = <1>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupt-name = "wakeup";
|
||||
interrupt-names = "wakeup";
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -110,6 +110,16 @@ properties:
|
||||
description:
|
||||
Enable CAN remote wakeup.
|
||||
|
||||
fsl,scu-index:
|
||||
description: |
|
||||
The scu index of CAN instance.
|
||||
For SoCs with SCU support, need setup stop mode via SCU firmware, so this
|
||||
property can help indicate a resource. It supports up to 3 CAN instances
|
||||
now.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
minimum: 0
|
||||
maximum: 2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
@ -137,4 +147,5 @@ examples:
|
||||
clocks = <&clks 1>, <&clks 2>;
|
||||
clock-names = "ipg", "per";
|
||||
fsl,stop-mode = <&gpr 0x34 28>;
|
||||
fsl,scu-index = /bits/ 8 <1>;
|
||||
};
|
||||
|
||||
73
Documentation/devicetree/bindings/net/dsa/arrow,xrs700x.yaml
Normal file
73
Documentation/devicetree/bindings/net/dsa/arrow,xrs700x.yaml
Normal file
@ -0,0 +1,73 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/dsa/arrow,xrs700x.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Arrow SpeedChips XRS7000 Series Switch Device Tree Bindings
|
||||
|
||||
allOf:
|
||||
- $ref: dsa.yaml#
|
||||
|
||||
maintainers:
|
||||
- George McCollister <george.mccollister@gmail.com>
|
||||
|
||||
description:
|
||||
The Arrow SpeedChips XRS7000 Series of single chip gigabit Ethernet switches
|
||||
are designed for critical networking applications. They have up to three
|
||||
RGMII ports and one RMII port and are managed via i2c or mdio.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- enum:
|
||||
- arrow,xrs7003e
|
||||
- arrow,xrs7003f
|
||||
- arrow,xrs7004e
|
||||
- arrow,xrs7004f
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
switch@8 {
|
||||
compatible = "arrow,xrs7004e";
|
||||
reg = <0x8>;
|
||||
|
||||
ethernet-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ethernet-port@1 {
|
||||
reg = <1>;
|
||||
label = "lan0";
|
||||
phy-handle = <&swphy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
ethernet-port@2 {
|
||||
reg = <2>;
|
||||
label = "lan1";
|
||||
phy-handle = <&swphy1>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
ethernet-port@3 {
|
||||
reg = <3>;
|
||||
label = "cpu";
|
||||
ethernet = <&fec1>;
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
173
Documentation/devicetree/bindings/net/dsa/brcm,sf2.yaml
Normal file
173
Documentation/devicetree/bindings/net/dsa/brcm,sf2.yaml
Normal file
@ -0,0 +1,173 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/dsa/brcm,sf2.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Broadcom Starfighter 2 integrated swich
|
||||
|
||||
maintainers:
|
||||
- Florian Fainelli <f.fainelli@gmail.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- brcm,bcm4908-switch
|
||||
- brcm,bcm7278-switch-v4.0
|
||||
- brcm,bcm7278-switch-v4.8
|
||||
- brcm,bcm7445-switch-v4.0
|
||||
|
||||
reg:
|
||||
minItems: 6
|
||||
maxItems: 6
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: core
|
||||
- const: reg
|
||||
- const: intrl2_0
|
||||
- const: intrl2_1
|
||||
- const: fcb
|
||||
- const: acb
|
||||
|
||||
interrupts:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: switch_0
|
||||
- const: switch_1
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
reset-names:
|
||||
const: switch
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
- description: switch's main clock
|
||||
- description: dividing of the switch core clock
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
- const: sw_switch
|
||||
- const: sw_switch_mdiv
|
||||
|
||||
brcm,num-gphy:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: maximum number of integrated gigabit PHYs in the switch
|
||||
|
||||
brcm,num-rgmii-ports:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: maximum number of RGMII interfaces supported by the switch
|
||||
|
||||
brcm,fcb-pause-override:
|
||||
description: if present indicates that the switch supports Failover Control
|
||||
Block pause override capability
|
||||
type: boolean
|
||||
|
||||
brcm,acb-packets-inflight:
|
||||
description: if present indicates that the switch Admission Control Block
|
||||
supports reporting the number of packets in-flight in a switch queue
|
||||
type: boolean
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
ports:
|
||||
type: object
|
||||
|
||||
properties:
|
||||
brcm,use-bcm-hdr:
|
||||
description: if present, indicates that the switch port has Broadcom
|
||||
tags enabled (per-packet metadata)
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- reg
|
||||
- interrupts
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
allOf:
|
||||
- $ref: "dsa.yaml#"
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- brcm,bcm7278-switch-v4.0
|
||||
- brcm,bcm7278-switch-v4.8
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 1
|
||||
required:
|
||||
- clocks
|
||||
- clock-names
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: brcm,bcm7445-switch-v4.0
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
clock-names:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
required:
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
switch@f0b00000 {
|
||||
compatible = "brcm,bcm7445-switch-v4.0";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0xf0b00000 0x40000>,
|
||||
<0xf0b40000 0x110>,
|
||||
<0xf0b40340 0x30>,
|
||||
<0xf0b40380 0x30>,
|
||||
<0xf0b40400 0x34>,
|
||||
<0xf0b40600 0x208>;
|
||||
reg-names = "core", "reg", "intrl2_0", "intrl2_1",
|
||||
"fcb", "acb";
|
||||
interrupts = <0 0x18 0>,
|
||||
<0 0x19 0>;
|
||||
clocks = <&sw_switch>, <&sw_switch_mdiv>;
|
||||
clock-names = "sw_switch", "sw_switch_mdiv";
|
||||
brcm,num-gphy = <1>;
|
||||
brcm,num-rgmii-ports = <2>;
|
||||
brcm,fcb-pause-override;
|
||||
brcm,acb-packets-inflight;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
label = "gphy";
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -76,6 +76,12 @@ phy-mode must be set, see also example 2 below!
|
||||
* mt7621: phy-mode = "rgmii-txid";
|
||||
* mt7623: phy-mode = "rgmii";
|
||||
|
||||
Optional properties:
|
||||
|
||||
- gpio-controller: Boolean; if defined, MT7530's LED controller will run on
|
||||
GPIO mode.
|
||||
- #gpio-cells: Must be 2 if gpio-controller is defined.
|
||||
|
||||
See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional
|
||||
required, optional properties and how the integrated switch subnodes must
|
||||
be specified.
|
||||
|
||||
@ -89,6 +89,7 @@ properties:
|
||||
- trgmii
|
||||
- 1000base-x
|
||||
- 2500base-x
|
||||
- 5gbase-r
|
||||
- rxaui
|
||||
- xaui
|
||||
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
* Marvell Armada 375 Ethernet Controller (PPv2.1)
|
||||
Marvell Armada 7K/8K Ethernet Controller (PPv2.2)
|
||||
Marvell CN913X Ethernet Controller (PPv2.3)
|
||||
|
||||
Required properties:
|
||||
|
||||
@ -12,10 +13,11 @@ Required properties:
|
||||
- common controller registers
|
||||
- LMS registers
|
||||
- one register area per Ethernet port
|
||||
For "marvell,armada-7k-pp2", must contain the following register
|
||||
For "marvell,armada-7k-pp2" used by 7K/8K and CN913X, must contain the following register
|
||||
sets:
|
||||
- packet processor registers
|
||||
- networking interfaces registers
|
||||
- CM3 address space used for TX Flow Control
|
||||
|
||||
- clocks: pointers to the reference clocks for this device, consequently:
|
||||
- main controller clock (for both armada-375-pp2 and armada-7k-pp2)
|
||||
@ -81,7 +83,7 @@ Example for marvell,armada-7k-pp2:
|
||||
|
||||
cpm_ethernet: ethernet@0 {
|
||||
compatible = "marvell,armada-7k-pp22";
|
||||
reg = <0x0 0x100000>, <0x129000 0xb000>;
|
||||
reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>;
|
||||
clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>,
|
||||
<&cpm_syscon0 1 5>, <&cpm_syscon0 1 6>, <&cpm_syscon0 1 18>;
|
||||
clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk";
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
x
Reference in New Issue
Block a user