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ARM: l2c: omap2: remove explicit non-secure access bits

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Since we now always enable NS access to the unlock registers, this can
be removed from OMAP4.  Remove the NS access bit for the interrupt
registers from OMAP4 as well - nothing in the kernel accesses that yet,
and we can add it in core code when we have the need.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2014-04-11 00:48:25 +01:00
parent deb125abad
commit 72ecbed1c5
1 changed files with 2 additions and 4 deletions
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6
arch/arm/mach-omap2/omap4-common.c
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@ -214,17 +214,15 @@ static int __init omap_l2_cache_init(void)
/* 16-way associativity, parity disabled, way size - 64KB (es2.0 +) */
aux_ctrl = L310_AUX_CTRL_CACHE_REPLACE_RR |
L310_AUX_CTRL_NS_LOCKDOWN |
L310_AUX_CTRL_NS_INT_CTRL |
L2C_AUX_CTRL_SHARED_OVERRIDE |
L310_AUX_CTRL_DATA_PREFETCH |
L310_AUX_CTRL_INSTR_PREFETCH;
outer_cache.write_sec = omap4_l2c310_write_sec;
if (of_have_populated_dt())
l2x0_of_init(aux_ctrl, 0xc19fffff);
l2x0_of_init(aux_ctrl, 0xcd9fffff);
else
l2x0_init(l2cache_base, aux_ctrl, 0xc19fffff);
l2x0_init(l2cache_base, aux_ctrl, 0xcd9fffff);
return 0;
}