powerpc/64s: guard optional TIDR SPR with CPU ftr test

The TIDR SPR only exists on POWER9. Avoid accessing it when the
feature bit for it is not set.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20211123095231.1036501-3-npiggin@gmail.com
This commit is contained in:
Nicholas Piggin 2021-11-23 19:51:40 +10:00 committed by Michael Ellerman
parent f53884b1bf
commit 736df58fd5
2 changed files with 16 additions and 6 deletions

View File

@ -3780,7 +3780,8 @@ static void load_spr_state(struct kvm_vcpu *vcpu)
mtspr(SPRN_EBBHR, vcpu->arch.ebbhr); mtspr(SPRN_EBBHR, vcpu->arch.ebbhr);
mtspr(SPRN_EBBRR, vcpu->arch.ebbrr); mtspr(SPRN_EBBRR, vcpu->arch.ebbrr);
mtspr(SPRN_BESCR, vcpu->arch.bescr); mtspr(SPRN_BESCR, vcpu->arch.bescr);
mtspr(SPRN_TIDR, vcpu->arch.tid); if (cpu_has_feature(CPU_FTR_P9_TIDR))
mtspr(SPRN_TIDR, vcpu->arch.tid);
mtspr(SPRN_AMR, vcpu->arch.amr); mtspr(SPRN_AMR, vcpu->arch.amr);
mtspr(SPRN_UAMOR, vcpu->arch.uamor); mtspr(SPRN_UAMOR, vcpu->arch.uamor);
@ -3806,7 +3807,8 @@ static void store_spr_state(struct kvm_vcpu *vcpu)
vcpu->arch.ebbhr = mfspr(SPRN_EBBHR); vcpu->arch.ebbhr = mfspr(SPRN_EBBHR);
vcpu->arch.ebbrr = mfspr(SPRN_EBBRR); vcpu->arch.ebbrr = mfspr(SPRN_EBBRR);
vcpu->arch.bescr = mfspr(SPRN_BESCR); vcpu->arch.bescr = mfspr(SPRN_BESCR);
vcpu->arch.tid = mfspr(SPRN_TIDR); if (cpu_has_feature(CPU_FTR_P9_TIDR))
vcpu->arch.tid = mfspr(SPRN_TIDR);
vcpu->arch.amr = mfspr(SPRN_AMR); vcpu->arch.amr = mfspr(SPRN_AMR);
vcpu->arch.uamor = mfspr(SPRN_UAMOR); vcpu->arch.uamor = mfspr(SPRN_UAMOR);
vcpu->arch.dscr = mfspr(SPRN_DSCR); vcpu->arch.dscr = mfspr(SPRN_DSCR);
@ -3826,7 +3828,8 @@ struct p9_host_os_sprs {
static void save_p9_host_os_sprs(struct p9_host_os_sprs *host_os_sprs) static void save_p9_host_os_sprs(struct p9_host_os_sprs *host_os_sprs)
{ {
host_os_sprs->dscr = mfspr(SPRN_DSCR); host_os_sprs->dscr = mfspr(SPRN_DSCR);
host_os_sprs->tidr = mfspr(SPRN_TIDR); if (cpu_has_feature(CPU_FTR_P9_TIDR))
host_os_sprs->tidr = mfspr(SPRN_TIDR);
host_os_sprs->iamr = mfspr(SPRN_IAMR); host_os_sprs->iamr = mfspr(SPRN_IAMR);
host_os_sprs->amr = mfspr(SPRN_AMR); host_os_sprs->amr = mfspr(SPRN_AMR);
host_os_sprs->fscr = mfspr(SPRN_FSCR); host_os_sprs->fscr = mfspr(SPRN_FSCR);
@ -3840,7 +3843,8 @@ static void restore_p9_host_os_sprs(struct kvm_vcpu *vcpu,
mtspr(SPRN_UAMOR, 0); mtspr(SPRN_UAMOR, 0);
mtspr(SPRN_DSCR, host_os_sprs->dscr); mtspr(SPRN_DSCR, host_os_sprs->dscr);
mtspr(SPRN_TIDR, host_os_sprs->tidr); if (cpu_has_feature(CPU_FTR_P9_TIDR))
mtspr(SPRN_TIDR, host_os_sprs->tidr);
mtspr(SPRN_IAMR, host_os_sprs->iamr); mtspr(SPRN_IAMR, host_os_sprs->iamr);
if (host_os_sprs->amr != vcpu->arch.amr) if (host_os_sprs->amr != vcpu->arch.amr)

View File

@ -2107,8 +2107,14 @@ static void dump_300_sprs(void)
if (!cpu_has_feature(CPU_FTR_ARCH_300)) if (!cpu_has_feature(CPU_FTR_ARCH_300))
return; return;
printf("pidr = %.16lx tidr = %.16lx\n", if (cpu_has_feature(CPU_FTR_P9_TIDR)) {
mfspr(SPRN_PID), mfspr(SPRN_TIDR)); printf("pidr = %.16lx tidr = %.16lx\n",
mfspr(SPRN_PID), mfspr(SPRN_TIDR));
} else {
printf("pidr = %.16lx\n",
mfspr(SPRN_PID));
}
printf("psscr = %.16lx\n", printf("psscr = %.16lx\n",
hv ? mfspr(SPRN_PSSCR) : mfspr(SPRN_PSSCR_PR)); hv ? mfspr(SPRN_PSSCR) : mfspr(SPRN_PSSCR_PR));