[ARM] Add support for ICSIDE interface on RiscPC
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
Russell King
parent
a17dba8df9
commit
73b6a2be8b
@ -552,6 +552,14 @@ config PATA_PLATFORM
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If unsure, say N.
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config PATA_ICSIDE
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tristate "Acorn ICS PATA support"
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depends on ARM && ARCH_ACORN
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help
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On Acorn systems, say Y here if you wish to use the ICS PATA
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interface card. This is not required for ICS partition support.
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If you are unsure, say N to this.
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config PATA_IXP4XX_CF
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tristate "IXP4XX Compact Flash support"
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depends on ARCH_IXP4XX
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@ -61,6 +61,7 @@ obj-$(CONFIG_PATA_TRIFLEX) += pata_triflex.o
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obj-$(CONFIG_PATA_IXP4XX_CF) += pata_ixp4xx_cf.o
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obj-$(CONFIG_PATA_SCC) += pata_scc.o
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obj-$(CONFIG_PATA_PLATFORM) += pata_platform.o
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obj-$(CONFIG_PATA_ICSIDE) += pata_icside.o
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# Should be last but one libata driver
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obj-$(CONFIG_ATA_GENERIC) += ata_generic.o
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# Should be last libata driver
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686
drivers/ata/pata_icside.c
Normal file
686
drivers/ata/pata_icside.c
Normal file
@ -0,0 +1,686 @@
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <scsi/scsi_host.h>
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#include <linux/ata.h>
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#include <linux/libata.h>
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#include <asm/dma.h>
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#include <asm/ecard.h>
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#define DRV_NAME "pata_icside"
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#define ICS_IDENT_OFFSET 0x2280
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#define ICS_ARCIN_V5_INTRSTAT 0x0000
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#define ICS_ARCIN_V5_INTROFFSET 0x0004
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#define ICS_ARCIN_V6_INTROFFSET_1 0x2200
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#define ICS_ARCIN_V6_INTRSTAT_1 0x2290
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#define ICS_ARCIN_V6_INTROFFSET_2 0x3200
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#define ICS_ARCIN_V6_INTRSTAT_2 0x3290
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struct portinfo {
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unsigned int dataoffset;
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unsigned int ctrloffset;
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unsigned int stepping;
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};
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static const struct portinfo pata_icside_portinfo_v5 = {
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.dataoffset = 0x2800,
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.ctrloffset = 0x2b80,
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.stepping = 6,
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};
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static const struct portinfo pata_icside_portinfo_v6_1 = {
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.dataoffset = 0x2000,
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.ctrloffset = 0x2380,
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.stepping = 6,
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};
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static const struct portinfo pata_icside_portinfo_v6_2 = {
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.dataoffset = 0x3000,
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.ctrloffset = 0x3380,
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.stepping = 6,
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};
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#define PATA_ICSIDE_MAX_SG 128
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struct pata_icside_state {
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void __iomem *irq_port;
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void __iomem *ioc_base;
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unsigned int type;
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unsigned int dma;
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struct {
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u8 port_sel;
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u8 disabled;
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unsigned int speed[ATA_MAX_DEVICES];
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} port[2];
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struct scatterlist sg[PATA_ICSIDE_MAX_SG];
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};
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#define ICS_TYPE_A3IN 0
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#define ICS_TYPE_A3USER 1
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#define ICS_TYPE_V6 3
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#define ICS_TYPE_V5 15
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#define ICS_TYPE_NOTYPE ((unsigned int)-1)
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/* ---------------- Version 5 PCB Support Functions --------------------- */
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/* Prototype: pata_icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
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* Purpose : enable interrupts from card
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*/
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static void pata_icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
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{
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struct pata_icside_state *state = ec->irq_data;
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writeb(0, state->irq_port + ICS_ARCIN_V5_INTROFFSET);
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}
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/* Prototype: pata_icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
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* Purpose : disable interrupts from card
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*/
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static void pata_icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
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{
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struct pata_icside_state *state = ec->irq_data;
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readb(state->irq_port + ICS_ARCIN_V5_INTROFFSET);
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}
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static const expansioncard_ops_t pata_icside_ops_arcin_v5 = {
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.irqenable = pata_icside_irqenable_arcin_v5,
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.irqdisable = pata_icside_irqdisable_arcin_v5,
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};
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/* ---------------- Version 6 PCB Support Functions --------------------- */
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/* Prototype: pata_icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
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* Purpose : enable interrupts from card
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*/
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static void pata_icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
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{
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struct pata_icside_state *state = ec->irq_data;
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void __iomem *base = state->irq_port;
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if (!state->port[0].disabled)
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writeb(0, base + ICS_ARCIN_V6_INTROFFSET_1);
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if (!state->port[1].disabled)
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writeb(0, base + ICS_ARCIN_V6_INTROFFSET_2);
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}
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/* Prototype: pata_icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
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* Purpose : disable interrupts from card
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*/
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static void pata_icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
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{
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struct pata_icside_state *state = ec->irq_data;
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readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1);
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readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2);
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}
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/* Prototype: pata_icside_irqprobe(struct expansion_card *ec)
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* Purpose : detect an active interrupt from card
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*/
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static int pata_icside_irqpending_arcin_v6(struct expansion_card *ec)
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{
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struct pata_icside_state *state = ec->irq_data;
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return readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_1) & 1 ||
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readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_2) & 1;
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}
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static const expansioncard_ops_t pata_icside_ops_arcin_v6 = {
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.irqenable = pata_icside_irqenable_arcin_v6,
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.irqdisable = pata_icside_irqdisable_arcin_v6,
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.irqpending = pata_icside_irqpending_arcin_v6,
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};
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/*
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* SG-DMA support.
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*
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* Similar to the BM-DMA, but we use the RiscPCs IOMD DMA controllers.
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* There is only one DMA controller per card, which means that only
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* one drive can be accessed at one time. NOTE! We do not enforce that
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* here, but we rely on the main IDE driver spotting that both
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* interfaces use the same IRQ, which should guarantee this.
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*/
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/*
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* Configure the IOMD to give the appropriate timings for the transfer
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* mode being requested. We take the advice of the ATA standards, and
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* calculate the cycle time based on the transfer mode, and the EIDE
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* MW DMA specs that the drive provides in the IDENTIFY command.
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*
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* We have the following IOMD DMA modes to choose from:
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*
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* Type Active Recovery Cycle
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* A 250 (250) 312 (550) 562 (800)
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* B 187 (200) 250 (550) 437 (750)
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* C 125 (125) 125 (375) 250 (500)
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* D 62 (50) 125 (375) 187 (425)
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*
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* (figures in brackets are actual measured timings on DIOR/DIOW)
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*
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* However, we also need to take care of the read/write active and
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* recovery timings:
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*
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* Read Write
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* Mode Active -- Recovery -- Cycle IOMD type
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* MW0 215 50 215 480 A
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* MW1 80 50 50 150 C
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* MW2 70 25 25 120 C
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*/
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static void pata_icside_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pata_icside_state *state = ap->host->private_data;
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struct ata_timing t;
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unsigned int cycle;
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char iomd_type;
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/*
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* DMA is based on a 16MHz clock
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*/
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if (ata_timing_compute(adev, adev->dma_mode, &t, 1000, 1))
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return;
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/*
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* Choose the IOMD cycle timing which ensure that the interface
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* satisfies the measured active, recovery and cycle times.
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*/
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if (t.active <= 50 && t.recover <= 375 && t.cycle <= 425)
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iomd_type = 'D', cycle = 187;
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else if (t.active <= 125 && t.recover <= 375 && t.cycle <= 500)
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iomd_type = 'C', cycle = 250;
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else if (t.active <= 200 && t.recover <= 550 && t.cycle <= 750)
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iomd_type = 'B', cycle = 437;
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else
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iomd_type = 'A', cycle = 562;
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ata_dev_printk(adev, KERN_INFO, "timings: act %dns rec %dns cyc %dns (%c)\n",
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t.active, t.recover, t.cycle, iomd_type);
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state->port[ap->port_no].speed[adev->devno] = cycle;
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}
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static void pata_icside_bmdma_setup(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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struct pata_icside_state *state = ap->host->private_data;
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struct scatterlist *sg, *rsg = state->sg;
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unsigned int write = qc->tf.flags & ATA_TFLAG_WRITE;
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/*
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* We are simplex; BUG if we try to fiddle with DMA
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* while it's active.
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*/
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BUG_ON(dma_channel_active(state->dma));
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/*
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* Copy ATAs scattered sg list into a contiguous array of sg
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*/
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ata_for_each_sg(sg, qc) {
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memcpy(rsg, sg, sizeof(*sg));
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rsg++;
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}
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/*
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* Route the DMA signals to the correct interface
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*/
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writeb(state->port[ap->port_no].port_sel, state->ioc_base);
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set_dma_speed(state->dma, state->port[ap->port_no].speed[qc->dev->devno]);
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set_dma_sg(state->dma, state->sg, rsg - state->sg);
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set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ);
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/* issue r/w command */
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ap->ops->exec_command(ap, &qc->tf);
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}
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static void pata_icside_bmdma_start(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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struct pata_icside_state *state = ap->host->private_data;
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BUG_ON(dma_channel_active(state->dma));
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enable_dma(state->dma);
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}
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static void pata_icside_bmdma_stop(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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struct pata_icside_state *state = ap->host->private_data;
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disable_dma(state->dma);
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/* see ata_bmdma_stop */
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ata_altstatus(ap);
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}
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static u8 pata_icside_bmdma_status(struct ata_port *ap)
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{
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struct pata_icside_state *state = ap->host->private_data;
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void __iomem *irq_port;
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irq_port = state->irq_port + (ap->port_no ? ICS_ARCIN_V6_INTRSTAT_2 :
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ICS_ARCIN_V6_INTRSTAT_1);
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return readb(irq_port) & 1 ? ATA_DMA_INTR : 0;
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}
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static int icside_dma_init(struct ata_probe_ent *ae, struct expansion_card *ec)
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{
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struct pata_icside_state *state = ae->private_data;
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int i;
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for (i = 0; i < ATA_MAX_DEVICES; i++) {
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state->port[0].speed[i] = 480;
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state->port[1].speed[i] = 480;
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}
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if (ec->dma != NO_DMA && !request_dma(ec->dma, DRV_NAME)) {
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state->dma = ec->dma;
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ae->mwdma_mask = 0x07; /* MW0..2 */
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}
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return 0;
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}
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static int pata_icside_port_start(struct ata_port *ap)
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{
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/* No PRD to alloc */
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return ata_pad_alloc(ap, ap->dev);
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}
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static struct scsi_host_template pata_icside_sht = {
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.module = THIS_MODULE,
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.name = DRV_NAME,
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.ioctl = ata_scsi_ioctl,
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.queuecommand = ata_scsi_queuecmd,
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.can_queue = ATA_DEF_QUEUE,
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.this_id = ATA_SHT_THIS_ID,
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.sg_tablesize = PATA_ICSIDE_MAX_SG,
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.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
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.emulated = ATA_SHT_EMULATED,
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.use_clustering = ATA_SHT_USE_CLUSTERING,
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.proc_name = DRV_NAME,
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.dma_boundary = ~0, /* no dma boundaries */
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.slave_configure = ata_scsi_slave_config,
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.slave_destroy = ata_scsi_slave_destroy,
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.bios_param = ata_std_bios_param,
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};
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/* wish this was exported from libata-core */
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static void ata_dummy_noret(struct ata_port *port)
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{
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}
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/*
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* We need to shut down unused ports to prevent spurious interrupts.
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* FIXME: the libata core doesn't call this function for PATA interfaces.
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*/
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static void pata_icside_port_disable(struct ata_port *ap)
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{
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struct pata_icside_state *state = ap->host->private_data;
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ata_port_printk(ap, KERN_ERR, "disabling icside port\n");
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ata_port_disable(ap);
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state->port[ap->port_no].disabled = 1;
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if (state->type == ICS_TYPE_V6) {
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/*
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* Disable interrupts from this port, otherwise we
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* receive spurious interrupts from the floating
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* interrupt line.
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*/
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void __iomem *irq_port = state->irq_port +
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(ap->port_no ? ICS_ARCIN_V6_INTROFFSET_2 : ICS_ARCIN_V6_INTROFFSET_1);
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readb(irq_port);
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}
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}
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static u8 pata_icside_irq_ack(struct ata_port *ap, unsigned int chk_drq)
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{
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unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
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u8 status;
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status = ata_busy_wait(ap, bits, 1000);
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if (status & bits)
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if (ata_msg_err(ap))
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printk(KERN_ERR "abnormal status 0x%X\n", status);
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if (ata_msg_intr(ap))
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printk(KERN_INFO "%s: irq ack: drv_stat 0x%X\n",
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__FUNCTION__, status);
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return status;
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}
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static struct ata_port_operations pata_icside_port_ops = {
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.port_disable = pata_icside_port_disable,
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.set_dmamode = pata_icside_set_dmamode,
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.tf_load = ata_tf_load,
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.tf_read = ata_tf_read,
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.exec_command = ata_exec_command,
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.check_status = ata_check_status,
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.dev_select = ata_std_dev_select,
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.bmdma_setup = pata_icside_bmdma_setup,
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.bmdma_start = pata_icside_bmdma_start,
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.data_xfer = ata_data_xfer_noirq,
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/* no need to build any PRD tables for DMA */
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.qc_prep = ata_noop_qc_prep,
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.qc_issue = ata_qc_issue_prot,
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.freeze = ata_bmdma_freeze,
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.thaw = ata_bmdma_thaw,
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.error_handler = ata_bmdma_error_handler,
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.post_internal_cmd = pata_icside_bmdma_stop,
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.irq_handler = ata_interrupt,
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.irq_clear = ata_dummy_noret,
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.irq_on = ata_irq_on,
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.irq_ack = pata_icside_irq_ack,
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.port_start = pata_icside_port_start,
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.bmdma_stop = pata_icside_bmdma_stop,
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.bmdma_status = pata_icside_bmdma_status,
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};
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static void
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pata_icside_add_port(struct ata_probe_ent *ae, void __iomem *base,
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const struct portinfo *info)
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{
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struct ata_ioports *ioaddr = &ae->port[ae->n_ports++];
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void __iomem *cmd = base + info->dataoffset;
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ioaddr->cmd_addr = cmd;
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ioaddr->data_addr = cmd + (ATA_REG_DATA << info->stepping);
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ioaddr->error_addr = cmd + (ATA_REG_ERR << info->stepping);
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ioaddr->feature_addr = cmd + (ATA_REG_FEATURE << info->stepping);
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ioaddr->nsect_addr = cmd + (ATA_REG_NSECT << info->stepping);
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ioaddr->lbal_addr = cmd + (ATA_REG_LBAL << info->stepping);
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ioaddr->lbam_addr = cmd + (ATA_REG_LBAM << info->stepping);
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ioaddr->lbah_addr = cmd + (ATA_REG_LBAH << info->stepping);
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ioaddr->device_addr = cmd + (ATA_REG_DEVICE << info->stepping);
|
||||
ioaddr->status_addr = cmd + (ATA_REG_STATUS << info->stepping);
|
||||
ioaddr->command_addr = cmd + (ATA_REG_CMD << info->stepping);
|
||||
|
||||
ioaddr->ctl_addr = base + info->ctrloffset;
|
||||
ioaddr->altstatus_addr = ioaddr->ctl_addr;
|
||||
}
|
||||
|
||||
static int __init
|
||||
pata_icside_register_v5(struct ata_probe_ent *ae, struct expansion_card *ec)
|
||||
{
|
||||
struct pata_icside_state *state = ae->private_data;
|
||||
void __iomem *base;
|
||||
|
||||
base = ioremap(ecard_resource_start(ec, ECARD_RES_MEMC),
|
||||
ecard_resource_len(ec, ECARD_RES_MEMC));
|
||||
if (!base)
|
||||
return -ENOMEM;
|
||||
|
||||
state->irq_port = base;
|
||||
|
||||
ec->irqaddr = base + ICS_ARCIN_V5_INTRSTAT;
|
||||
ec->irqmask = 1;
|
||||
ec->irq_data = state;
|
||||
ec->ops = &pata_icside_ops_arcin_v5;
|
||||
|
||||
/*
|
||||
* Be on the safe side - disable interrupts
|
||||
*/
|
||||
ec->ops->irqdisable(ec, ec->irq);
|
||||
|
||||
pata_icside_add_port(ae, base, &pata_icside_portinfo_v5);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init
|
||||
pata_icside_register_v6(struct ata_probe_ent *ae, struct expansion_card *ec)
|
||||
{
|
||||
struct pata_icside_state *state = ae->private_data;
|
||||
void __iomem *ioc_base, *easi_base;
|
||||
unsigned int sel = 0;
|
||||
int ret;
|
||||
|
||||
ioc_base = ioremap(ecard_resource_start(ec, ECARD_RES_IOCFAST),
|
||||
ecard_resource_len(ec, ECARD_RES_IOCFAST));
|
||||
if (!ioc_base) {
|
||||
ret = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
|
||||
easi_base = ioc_base;
|
||||
|
||||
if (ecard_resource_flags(ec, ECARD_RES_EASI)) {
|
||||
easi_base = ioremap(ecard_resource_start(ec, ECARD_RES_EASI),
|
||||
ecard_resource_len(ec, ECARD_RES_EASI));
|
||||
if (!easi_base) {
|
||||
ret = -ENOMEM;
|
||||
goto unmap_slot;
|
||||
}
|
||||
|
||||
/*
|
||||
* Enable access to the EASI region.
|
||||
*/
|
||||
sel = 1 << 5;
|
||||
}
|
||||
|
||||
writeb(sel, ioc_base);
|
||||
|
||||
ec->irq_data = state;
|
||||
ec->ops = &pata_icside_ops_arcin_v6;
|
||||
|
||||
state->irq_port = easi_base;
|
||||
state->ioc_base = ioc_base;
|
||||
state->port[0].port_sel = sel;
|
||||
state->port[1].port_sel = sel | 1;
|
||||
|
||||
/*
|
||||
* Be on the safe side - disable interrupts
|
||||
*/
|
||||
ec->ops->irqdisable(ec, ec->irq);
|
||||
|
||||
/*
|
||||
* Find and register the interfaces.
|
||||
*/
|
||||
pata_icside_add_port(ae, easi_base, &pata_icside_portinfo_v6_1);
|
||||
pata_icside_add_port(ae, easi_base, &pata_icside_portinfo_v6_2);
|
||||
|
||||
/*
|
||||
* FIXME: work around libata's aversion to calling port_disable.
|
||||
* This permanently disables interrupts on port 0 - bad luck if
|
||||
* you have a drive on that port.
|
||||
*/
|
||||
state->port[0].disabled = 1;
|
||||
|
||||
return icside_dma_init(ae, ec);
|
||||
|
||||
unmap_slot:
|
||||
iounmap(ioc_base);
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __devinit
|
||||
pata_icside_probe(struct expansion_card *ec, const struct ecard_id *id)
|
||||
{
|
||||
struct pata_icside_state *state;
|
||||
struct ata_probe_ent ae;
|
||||
void __iomem *idmem;
|
||||
int ret;
|
||||
|
||||
ret = ecard_request_resources(ec);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
state = kzalloc(sizeof(struct pata_icside_state), GFP_KERNEL);
|
||||
if (!state) {
|
||||
ret = -ENOMEM;
|
||||
goto release;
|
||||
}
|
||||
|
||||
state->type = ICS_TYPE_NOTYPE;
|
||||
state->dma = NO_DMA;
|
||||
|
||||
idmem = ioremap(ecard_resource_start(ec, ECARD_RES_IOCFAST),
|
||||
ecard_resource_len(ec, ECARD_RES_IOCFAST));
|
||||
if (idmem) {
|
||||
unsigned int type;
|
||||
|
||||
type = readb(idmem + ICS_IDENT_OFFSET) & 1;
|
||||
type |= (readb(idmem + ICS_IDENT_OFFSET + 4) & 1) << 1;
|
||||
type |= (readb(idmem + ICS_IDENT_OFFSET + 8) & 1) << 2;
|
||||
type |= (readb(idmem + ICS_IDENT_OFFSET + 12) & 1) << 3;
|
||||
iounmap(idmem);
|
||||
|
||||
state->type = type;
|
||||
}
|
||||
|
||||
memset(&ae, 0, sizeof(ae));
|
||||
INIT_LIST_HEAD(&ae.node);
|
||||
ae.dev = &ec->dev;
|
||||
ae.port_ops = &pata_icside_port_ops;
|
||||
ae.sht = &pata_icside_sht;
|
||||
ae.pio_mask = 0x1f;
|
||||
ae.irq = ec->irq;
|
||||
ae.port_flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST;
|
||||
ae._host_flags = ATA_HOST_SIMPLEX;
|
||||
ae.private_data = state;
|
||||
|
||||
switch (state->type) {
|
||||
case ICS_TYPE_A3IN:
|
||||
dev_warn(&ec->dev, "A3IN unsupported\n");
|
||||
ret = -ENODEV;
|
||||
break;
|
||||
|
||||
case ICS_TYPE_A3USER:
|
||||
dev_warn(&ec->dev, "A3USER unsupported\n");
|
||||
ret = -ENODEV;
|
||||
break;
|
||||
|
||||
case ICS_TYPE_V5:
|
||||
ret = pata_icside_register_v5(&ae, ec);
|
||||
break;
|
||||
|
||||
case ICS_TYPE_V6:
|
||||
ret = pata_icside_register_v6(&ae, ec);
|
||||
break;
|
||||
|
||||
default:
|
||||
dev_warn(&ec->dev, "unknown interface type\n");
|
||||
ret = -ENODEV;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret == 0)
|
||||
ret = ata_device_add(&ae) == 0 ? -ENODEV : 0;
|
||||
|
||||
if (ret == 0)
|
||||
goto out;
|
||||
|
||||
kfree(state);
|
||||
release:
|
||||
ecard_release_resources(ec);
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void pata_icside_shutdown(struct expansion_card *ec)
|
||||
{
|
||||
struct ata_host *host = ecard_get_drvdata(ec);
|
||||
unsigned long flags;
|
||||
|
||||
/*
|
||||
* Disable interrupts from this card. We need to do
|
||||
* this before disabling EASI since we may be accessing
|
||||
* this register via that region.
|
||||
*/
|
||||
local_irq_save(flags);
|
||||
if (ec->ops)
|
||||
ec->ops->irqdisable(ec, ec->irq);
|
||||
local_irq_restore(flags);
|
||||
|
||||
/*
|
||||
* Reset the ROM pointer so that we can read the ROM
|
||||
* after a soft reboot. This also disables access to
|
||||
* the IDE taskfile via the EASI region.
|
||||
*/
|
||||
if (host) {
|
||||
struct pata_icside_state *state = host->private_data;
|
||||
if (state->ioc_base)
|
||||
writeb(0, state->ioc_base);
|
||||
}
|
||||
}
|
||||
|
||||
static void __devexit pata_icside_remove(struct expansion_card *ec)
|
||||
{
|
||||
struct ata_host *host = ecard_get_drvdata(ec);
|
||||
struct pata_icside_state *state = host->private_data;
|
||||
|
||||
ata_host_detach(host);
|
||||
|
||||
pata_icside_shutdown(ec);
|
||||
|
||||
/*
|
||||
* don't NULL out the drvdata - devres/libata wants it
|
||||
* to free the ata_host structure.
|
||||
*/
|
||||
ec->ops = NULL;
|
||||
ec->irq_data = NULL;
|
||||
|
||||
if (state->dma != NO_DMA)
|
||||
free_dma(state->dma);
|
||||
if (state->ioc_base)
|
||||
iounmap(state->ioc_base);
|
||||
if (state->ioc_base != state->irq_port)
|
||||
iounmap(state->irq_port);
|
||||
|
||||
kfree(state);
|
||||
ecard_release_resources(ec);
|
||||
}
|
||||
|
||||
static const struct ecard_id pata_icside_ids[] = {
|
||||
{ MANU_ICS, PROD_ICS_IDE },
|
||||
{ MANU_ICS2, PROD_ICS2_IDE },
|
||||
{ 0xffff, 0xffff }
|
||||
};
|
||||
|
||||
static struct ecard_driver pata_icside_driver = {
|
||||
.probe = pata_icside_probe,
|
||||
.remove = __devexit_p(pata_icside_remove),
|
||||
.shutdown = pata_icside_shutdown,
|
||||
.id_table = pata_icside_ids,
|
||||
.drv = {
|
||||
.name = DRV_NAME,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init pata_icside_init(void)
|
||||
{
|
||||
return ecard_register_driver(&pata_icside_driver);
|
||||
}
|
||||
|
||||
static void __exit pata_icside_exit(void)
|
||||
{
|
||||
ecard_remove_driver(&pata_icside_driver);
|
||||
}
|
||||
|
||||
MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("ICS PATA driver");
|
||||
|
||||
module_init(pata_icside_init);
|
||||
module_exit(pata_icside_exit);
|
||||
Loading…
Reference in New Issue
Block a user