Merge branch 'cmpxchg_user_key' into features
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
This commit is contained in:
Heiko Carstens
commit
740d63b5a0
@ -12,6 +12,7 @@
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#define EX_TYPE_UA_STORE 3
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#define EX_TYPE_UA_LOAD_MEM 4
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#define EX_TYPE_UA_LOAD_REG 5
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#define EX_TYPE_UA_LOAD_REGPAIR 6
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#define EX_DATA_REG_ERR_SHIFT 0
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#define EX_DATA_REG_ERR GENMASK(3, 0)
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@ -85,4 +86,7 @@
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#define EX_TABLE_UA_LOAD_REG(_fault, _target, _regerr, _regzero) \
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__EX_TABLE_UA(__ex_table, _fault, _target, EX_TYPE_UA_LOAD_REG, _regerr, _regzero, 0)
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#define EX_TABLE_UA_LOAD_REGPAIR(_fault, _target, _regerr, _regzero) \
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__EX_TABLE_UA(__ex_table, _fault, _target, EX_TYPE_UA_LOAD_REGPAIR, _regerr, _regzero, 0)
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#endif /* __ASM_EXTABLE_H */
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@ -88,67 +88,90 @@ static __always_inline unsigned long __cmpxchg(unsigned long address,
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unsigned long old,
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unsigned long new, int size)
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{
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unsigned long prev, tmp;
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int shift;
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switch (size) {
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case 1:
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case 1: {
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unsigned int prev, shift, mask;
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shift = (3 ^ (address & 3)) << 3;
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address ^= address & 3;
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old = (old & 0xff) << shift;
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new = (new & 0xff) << shift;
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mask = ~(0xff << shift);
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asm volatile(
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" l %0,%2\n"
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"0: nr %0,%5\n"
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" lr %1,%0\n"
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" or %0,%3\n"
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" or %1,%4\n"
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" cs %0,%1,%2\n"
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" jnl 1f\n"
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" xr %1,%0\n"
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" nr %1,%5\n"
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" jnz 0b\n"
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" l %[prev],%[address]\n"
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" nr %[prev],%[mask]\n"
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" xilf %[mask],0xffffffff\n"
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" or %[new],%[prev]\n"
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" or %[prev],%[tmp]\n"
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"0: lr %[tmp],%[prev]\n"
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" cs %[prev],%[new],%[address]\n"
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" jnl 1f\n"
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" xr %[tmp],%[prev]\n"
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" xr %[new],%[tmp]\n"
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" nr %[tmp],%[mask]\n"
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" jz 0b\n"
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"1:"
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: "=&d" (prev), "=&d" (tmp), "+Q" (*(int *) address)
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: "d" ((old & 0xff) << shift),
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"d" ((new & 0xff) << shift),
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"d" (~(0xff << shift))
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: "memory", "cc");
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: [prev] "=&d" (prev),
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[address] "+Q" (*(int *)address),
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[tmp] "+&d" (old),
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[new] "+&d" (new),
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[mask] "+&d" (mask)
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:: "memory", "cc");
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return prev >> shift;
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case 2:
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}
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case 2: {
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unsigned int prev, shift, mask;
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shift = (2 ^ (address & 2)) << 3;
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address ^= address & 2;
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old = (old & 0xffff) << shift;
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new = (new & 0xffff) << shift;
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mask = ~(0xffff << shift);
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asm volatile(
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" l %0,%2\n"
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"0: nr %0,%5\n"
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" lr %1,%0\n"
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" or %0,%3\n"
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" or %1,%4\n"
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" cs %0,%1,%2\n"
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" jnl 1f\n"
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" xr %1,%0\n"
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" nr %1,%5\n"
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" jnz 0b\n"
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" l %[prev],%[address]\n"
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" nr %[prev],%[mask]\n"
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" xilf %[mask],0xffffffff\n"
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" or %[new],%[prev]\n"
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" or %[prev],%[tmp]\n"
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"0: lr %[tmp],%[prev]\n"
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" cs %[prev],%[new],%[address]\n"
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" jnl 1f\n"
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" xr %[tmp],%[prev]\n"
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" xr %[new],%[tmp]\n"
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" nr %[tmp],%[mask]\n"
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" jz 0b\n"
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"1:"
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: "=&d" (prev), "=&d" (tmp), "+Q" (*(int *) address)
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: "d" ((old & 0xffff) << shift),
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"d" ((new & 0xffff) << shift),
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"d" (~(0xffff << shift))
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: "memory", "cc");
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: [prev] "=&d" (prev),
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[address] "+Q" (*(int *)address),
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[tmp] "+&d" (old),
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[new] "+&d" (new),
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[mask] "+&d" (mask)
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:: "memory", "cc");
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return prev >> shift;
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case 4:
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}
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case 4: {
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unsigned int prev = old;
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asm volatile(
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" cs %0,%3,%1\n"
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: "=&d" (prev), "+Q" (*(int *) address)
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: "0" (old), "d" (new)
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" cs %[prev],%[new],%[address]\n"
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: [prev] "+&d" (prev),
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[address] "+Q" (*(int *)address)
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: [new] "d" (new)
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: "memory", "cc");
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return prev;
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case 8:
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}
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case 8: {
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unsigned long prev = old;
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asm volatile(
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" csg %0,%3,%1\n"
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: "=&d" (prev), "+QS" (*(long *) address)
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: "0" (old), "d" (new)
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" csg %[prev],%[new],%[address]\n"
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: [prev] "+&d" (prev),
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[address] "+QS" (*(long *)address)
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: [new] "d" (new)
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: "memory", "cc");
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return prev;
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}
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}
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__cmpxchg_called_with_bad_pointer();
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return old;
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}
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@ -390,4 +390,212 @@ do { \
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goto err_label; \
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} while (0)
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void __cmpxchg_user_key_called_with_bad_pointer(void);
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#define CMPXCHG_USER_KEY_MAX_LOOPS 128
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static __always_inline int __cmpxchg_user_key(unsigned long address, void *uval,
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__uint128_t old, __uint128_t new,
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unsigned long key, int size)
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{
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int rc = 0;
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switch (size) {
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case 1: {
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unsigned int prev, shift, mask, _old, _new;
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unsigned long count;
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shift = (3 ^ (address & 3)) << 3;
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address ^= address & 3;
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_old = ((unsigned int)old & 0xff) << shift;
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_new = ((unsigned int)new & 0xff) << shift;
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mask = ~(0xff << shift);
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asm volatile(
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" spka 0(%[key])\n"
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" sacf 256\n"
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" llill %[count],%[max_loops]\n"
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"0: l %[prev],%[address]\n"
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"1: nr %[prev],%[mask]\n"
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" xilf %[mask],0xffffffff\n"
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" or %[new],%[prev]\n"
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" or %[prev],%[tmp]\n"
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"2: lr %[tmp],%[prev]\n"
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"3: cs %[prev],%[new],%[address]\n"
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"4: jnl 5f\n"
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" xr %[tmp],%[prev]\n"
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" xr %[new],%[tmp]\n"
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" nr %[tmp],%[mask]\n"
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" jnz 5f\n"
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" brct %[count],2b\n"
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"5: sacf 768\n"
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" spka %[default_key]\n"
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EX_TABLE_UA_LOAD_REG(0b, 5b, %[rc], %[prev])
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EX_TABLE_UA_LOAD_REG(1b, 5b, %[rc], %[prev])
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EX_TABLE_UA_LOAD_REG(3b, 5b, %[rc], %[prev])
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EX_TABLE_UA_LOAD_REG(4b, 5b, %[rc], %[prev])
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: [rc] "+&d" (rc),
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[prev] "=&d" (prev),
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[address] "+Q" (*(int *)address),
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[tmp] "+&d" (_old),
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[new] "+&d" (_new),
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[mask] "+&d" (mask),
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[count] "=a" (count)
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: [key] "%[count]" (key << 4),
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[default_key] "J" (PAGE_DEFAULT_KEY),
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[max_loops] "J" (CMPXCHG_USER_KEY_MAX_LOOPS)
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: "memory", "cc");
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*(unsigned char *)uval = prev >> shift;
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if (!count)
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rc = -EAGAIN;
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return rc;
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}
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case 2: {
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unsigned int prev, shift, mask, _old, _new;
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unsigned long count;
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shift = (2 ^ (address & 2)) << 3;
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address ^= address & 2;
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_old = ((unsigned int)old & 0xffff) << shift;
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_new = ((unsigned int)new & 0xffff) << shift;
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mask = ~(0xffff << shift);
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asm volatile(
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" spka 0(%[key])\n"
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" sacf 256\n"
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" llill %[count],%[max_loops]\n"
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"0: l %[prev],%[address]\n"
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"1: nr %[prev],%[mask]\n"
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" xilf %[mask],0xffffffff\n"
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" or %[new],%[prev]\n"
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" or %[prev],%[tmp]\n"
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"2: lr %[tmp],%[prev]\n"
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"3: cs %[prev],%[new],%[address]\n"
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"4: jnl 5f\n"
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" xr %[tmp],%[prev]\n"
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" xr %[new],%[tmp]\n"
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" nr %[tmp],%[mask]\n"
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" jnz 5f\n"
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" brct %[count],2b\n"
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"5: sacf 768\n"
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" spka %[default_key]\n"
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EX_TABLE_UA_LOAD_REG(0b, 5b, %[rc], %[prev])
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EX_TABLE_UA_LOAD_REG(1b, 5b, %[rc], %[prev])
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EX_TABLE_UA_LOAD_REG(3b, 5b, %[rc], %[prev])
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EX_TABLE_UA_LOAD_REG(4b, 5b, %[rc], %[prev])
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: [rc] "+&d" (rc),
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[prev] "=&d" (prev),
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[address] "+Q" (*(int *)address),
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[tmp] "+&d" (_old),
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[new] "+&d" (_new),
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[mask] "+&d" (mask),
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[count] "=a" (count)
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: [key] "%[count]" (key << 4),
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[default_key] "J" (PAGE_DEFAULT_KEY),
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[max_loops] "J" (CMPXCHG_USER_KEY_MAX_LOOPS)
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: "memory", "cc");
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*(unsigned short *)uval = prev >> shift;
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if (!count)
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rc = -EAGAIN;
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return rc;
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}
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case 4: {
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unsigned int prev = old;
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asm volatile(
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" spka 0(%[key])\n"
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" sacf 256\n"
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"0: cs %[prev],%[new],%[address]\n"
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"1: sacf 768\n"
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" spka %[default_key]\n"
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EX_TABLE_UA_LOAD_REG(0b, 1b, %[rc], %[prev])
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EX_TABLE_UA_LOAD_REG(1b, 1b, %[rc], %[prev])
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: [rc] "+&d" (rc),
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[prev] "+&d" (prev),
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[address] "+Q" (*(int *)address)
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: [new] "d" ((unsigned int)new),
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[key] "a" (key << 4),
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[default_key] "J" (PAGE_DEFAULT_KEY)
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: "memory", "cc");
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*(unsigned int *)uval = prev;
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return rc;
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}
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case 8: {
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unsigned long prev = old;
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asm volatile(
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" spka 0(%[key])\n"
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" sacf 256\n"
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"0: csg %[prev],%[new],%[address]\n"
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"1: sacf 768\n"
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" spka %[default_key]\n"
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EX_TABLE_UA_LOAD_REG(0b, 1b, %[rc], %[prev])
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EX_TABLE_UA_LOAD_REG(1b, 1b, %[rc], %[prev])
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: [rc] "+&d" (rc),
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[prev] "+&d" (prev),
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[address] "+QS" (*(long *)address)
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: [new] "d" ((unsigned long)new),
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[key] "a" (key << 4),
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[default_key] "J" (PAGE_DEFAULT_KEY)
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: "memory", "cc");
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*(unsigned long *)uval = prev;
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return rc;
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}
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case 16: {
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__uint128_t prev = old;
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asm volatile(
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" spka 0(%[key])\n"
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" sacf 256\n"
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"0: cdsg %[prev],%[new],%[address]\n"
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"1: sacf 768\n"
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" spka %[default_key]\n"
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EX_TABLE_UA_LOAD_REGPAIR(0b, 1b, %[rc], %[prev])
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EX_TABLE_UA_LOAD_REGPAIR(1b, 1b, %[rc], %[prev])
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: [rc] "+&d" (rc),
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[prev] "+&d" (prev),
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[address] "+QS" (*(__int128_t *)address)
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: [new] "d" (new),
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[key] "a" (key << 4),
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[default_key] "J" (PAGE_DEFAULT_KEY)
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: "memory", "cc");
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*(__uint128_t *)uval = prev;
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return rc;
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}
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}
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__cmpxchg_user_key_called_with_bad_pointer();
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return rc;
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}
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/**
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* cmpxchg_user_key() - cmpxchg with user space target, honoring storage keys
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* @ptr: User space address of value to compare to @old and exchange with
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* @new. Must be aligned to sizeof(*@ptr).
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* @uval: Address where the old value of *@ptr is written to.
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* @old: Old value. Compared to the content pointed to by @ptr in order to
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* determine if the exchange occurs. The old value read from *@ptr is
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* written to *@uval.
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* @new: New value to place at *@ptr.
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* @key: Access key to use for checking storage key protection.
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*
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* Perform a cmpxchg on a user space target, honoring storage key protection.
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* @key alone determines how key checking is performed, neither
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* storage-protection-override nor fetch-protection-override apply.
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* The caller must compare *@uval and @old to determine if values have been
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* exchanged. In case of an exception *@uval is set to zero.
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*
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* Return: 0: cmpxchg executed
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* -EFAULT: an exception happened when trying to access *@ptr
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* -EAGAIN: maxed out number of retries (byte and short only)
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*/
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#define cmpxchg_user_key(ptr, uval, old, new, key) \
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({ \
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__typeof__(ptr) __ptr = (ptr); \
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__typeof__(uval) __uval = (uval); \
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\
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BUILD_BUG_ON(sizeof(*(__ptr)) != sizeof(*(__uval))); \
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might_fault(); \
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__chk_user_ptr(__ptr); \
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__cmpxchg_user_key((unsigned long)(__ptr), (void *)(__uval), \
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(old), (new), (key), sizeof(*(__ptr))); \
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})
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#endif /* __S390_UACCESS_H */
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@ -47,13 +47,16 @@ static bool ex_handler_ua_load_mem(const struct exception_table_entry *ex, struc
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return true;
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}
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static bool ex_handler_ua_load_reg(const struct exception_table_entry *ex, struct pt_regs *regs)
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static bool ex_handler_ua_load_reg(const struct exception_table_entry *ex,
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bool pair, struct pt_regs *regs)
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{
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unsigned int reg_zero = FIELD_GET(EX_DATA_REG_ADDR, ex->data);
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unsigned int reg_err = FIELD_GET(EX_DATA_REG_ERR, ex->data);
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regs->gprs[reg_err] = -EFAULT;
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regs->gprs[reg_zero] = 0;
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if (pair)
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regs->gprs[reg_zero + 1] = 0;
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regs->psw.addr = extable_fixup(ex);
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return true;
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}
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@ -75,7 +78,9 @@ bool fixup_exception(struct pt_regs *regs)
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case EX_TYPE_UA_LOAD_MEM:
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return ex_handler_ua_load_mem(ex, regs);
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case EX_TYPE_UA_LOAD_REG:
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return ex_handler_ua_load_reg(ex, regs);
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return ex_handler_ua_load_reg(ex, false, regs);
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case EX_TYPE_UA_LOAD_REGPAIR:
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return ex_handler_ua_load_reg(ex, true, regs);
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}
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panic("invalid exception table entry");
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}
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