ARM: dts: suniv: add device tree for PopStick v1.1
PopStick is a minimal Allwinner F1C200s dongle, with its USB controller wired to a USB Type-A plug, a SD slot and a SPI NAND flash on board, and an on-board CH340 USB-UART converted connected to F1C200s's UART0. Add a device tree for it. As F1C200s is just F1C100s with a different DRAM chip co-packaged, directly use F1C100s DTSI here. This commit covers the v1.1 version of this board, which is now shipped. v1.0 is some internal sample that have not been shipped at all. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230319212936.26649-6-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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@ -1406,7 +1406,8 @@ dtb-$(CONFIG_MACH_SUN9I) += \
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sun9i-a80-optimus.dtb \
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sun9i-a80-cubieboard4.dtb
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dtb-$(CONFIG_MACH_SUNIV) += \
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suniv-f1c100s-licheepi-nano.dtb
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suniv-f1c100s-licheepi-nano.dtb \
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suniv-f1c200s-popstick-v1.1.dtb
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dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
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tegra20-acer-a500-picasso.dtb \
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tegra20-asus-tf101.dtb \
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81
arch/arm/boot/dts/suniv-f1c200s-popstick-v1.1.dts
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81
arch/arm/boot/dts/suniv-f1c200s-popstick-v1.1.dts
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@ -0,0 +1,81 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2022 Icenowy Zheng <uwu@icenowy.me>
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*/
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/dts-v1/;
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#include "suniv-f1c100s.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "Popcorn Computer PopStick v1.1";
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compatible = "sourceparts,popstick-v1.1", "sourceparts,popstick",
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"allwinner,suniv-f1c200s", "allwinner,suniv-f1c100s";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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led {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&pio 4 6 GPIO_ACTIVE_HIGH>; /* PE6 */
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linux,default-trigger = "heartbeat";
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};
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};
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reg_vcc3v3: regulator-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&mmc0 {
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cd-gpios = <&pio 4 3 GPIO_ACTIVE_LOW>; /* PE3 */
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bus-width = <4>;
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disable-wp;
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vmmc-supply = <®_vcc3v3>;
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status = "okay";
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};
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&otg_sram {
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status = "okay";
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_pc_pins>;
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status = "okay";
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flash@0 {
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <40000000>;
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pe_pins>;
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status = "okay";
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};
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&usb_otg {
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dr_mode = "peripheral";
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status = "okay";
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};
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&usbphy {
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status = "okay";
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};
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