From 745fa3e40ff5245c8551f2ec9ad9d3c77c8065e7 Mon Sep 17 00:00:00 2001 From: Meng Li Date: Wed, 3 Nov 2021 11:38:38 +0800 Subject: [PATCH] arm64: dts: fsl-ls1043a-rdb: add delay between CS and CLK signal for flash device Based on commit d59c90a2400f("spi: spi-fsl-dspi: Convert TCFQ users to XSPI FIFO mode ") and 6c1c26ecd9a3("spi: spi-fsl-dspi: Accelerate transfers using larger word size if possible"), on ls1043a-rdb platform, the spi work mode is changed from TCFQ mode to XSPI mode. In order to keep the transmission sequence matches with flash device, it is need to add delay between CS and CLK signal. The strategy of generating delay value refers to QorIQ LS1043A Reference Manual. Signed-off-by: Meng Li Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts index 3516af4726a5..b290605e92cf 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts @@ -94,6 +94,8 @@ compatible = "n25q128a13", "jedec,spi-nor"; /* 16MB */ reg = <0>; spi-max-frequency = <1000000>; /* input clock */ + fsl,spi-cs-sck-delay = <100>; + fsl,spi-sck-cs-delay = <100>; }; slic@2 {