drm/i915/display: move plane prepare/cleanup to intel_atomic_plane.c
Start to refactor more stuff out of intel_display.c. These fit better in this file. This moves the rps boosting code as well as this is the only user of it. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211012043502.1377715-2-airlied@gmail.com
This commit is contained in:
Dave Airlie
Jani Nikula
parent
5c31e9d013
commit
74a75dc908
@ -41,6 +41,7 @@
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#include "intel_display_types.h"
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#include "intel_display_types.h"
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#include "intel_pm.h"
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#include "intel_pm.h"
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#include "intel_sprite.h"
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#include "intel_sprite.h"
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#include "gt/intel_rps.h"
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static void intel_plane_state_reset(struct intel_plane_state *plane_state,
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static void intel_plane_state_reset(struct intel_plane_state *plane_state,
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struct intel_plane *plane)
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struct intel_plane *plane)
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@ -601,6 +602,213 @@ int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
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return 0;
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return 0;
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}
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}
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struct wait_rps_boost {
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struct wait_queue_entry wait;
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struct drm_crtc *crtc;
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struct i915_request *request;
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};
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static int do_rps_boost(struct wait_queue_entry *_wait,
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unsigned mode, int sync, void *key)
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{
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struct wait_rps_boost *wait = container_of(_wait, typeof(*wait), wait);
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struct i915_request *rq = wait->request;
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/*
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* If we missed the vblank, but the request is already running it
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* is reasonable to assume that it will complete before the next
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* vblank without our intervention, so leave RPS alone.
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*/
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if (!i915_request_started(rq))
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intel_rps_boost(rq);
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i915_request_put(rq);
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drm_crtc_vblank_put(wait->crtc);
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list_del(&wait->wait.entry);
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kfree(wait);
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return 1;
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}
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static void add_rps_boost_after_vblank(struct drm_crtc *crtc,
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struct dma_fence *fence)
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{
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struct wait_rps_boost *wait;
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if (!dma_fence_is_i915(fence))
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return;
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if (DISPLAY_VER(to_i915(crtc->dev)) < 6)
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return;
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if (drm_crtc_vblank_get(crtc))
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return;
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wait = kmalloc(sizeof(*wait), GFP_KERNEL);
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if (!wait) {
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drm_crtc_vblank_put(crtc);
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return;
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}
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wait->request = to_request(dma_fence_get(fence));
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wait->crtc = crtc;
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wait->wait.func = do_rps_boost;
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wait->wait.flags = 0;
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add_wait_queue(drm_crtc_vblank_waitqueue(crtc), &wait->wait);
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}
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/**
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* intel_prepare_plane_fb - Prepare fb for usage on plane
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* @_plane: drm plane to prepare for
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* @_new_plane_state: the plane state being prepared
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*
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* Prepares a framebuffer for usage on a display plane. Generally this
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* involves pinning the underlying object and updating the frontbuffer tracking
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* bits. Some older platforms need special physical address handling for
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* cursor planes.
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*
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* Returns 0 on success, negative error code on failure.
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*/
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static int
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intel_prepare_plane_fb(struct drm_plane *_plane,
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struct drm_plane_state *_new_plane_state)
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{
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struct i915_sched_attr attr = { .priority = I915_PRIORITY_DISPLAY };
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struct intel_plane *plane = to_intel_plane(_plane);
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struct intel_plane_state *new_plane_state =
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to_intel_plane_state(_new_plane_state);
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struct intel_atomic_state *state =
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to_intel_atomic_state(new_plane_state->uapi.state);
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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const struct intel_plane_state *old_plane_state =
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intel_atomic_get_old_plane_state(state, plane);
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struct drm_i915_gem_object *obj = intel_fb_obj(new_plane_state->hw.fb);
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struct drm_i915_gem_object *old_obj = intel_fb_obj(old_plane_state->hw.fb);
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int ret;
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if (old_obj) {
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const struct intel_crtc_state *crtc_state =
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intel_atomic_get_new_crtc_state(state,
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to_intel_crtc(old_plane_state->hw.crtc));
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/* Big Hammer, we also need to ensure that any pending
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* MI_WAIT_FOR_EVENT inside a user batch buffer on the
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* current scanout is retired before unpinning the old
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* framebuffer. Note that we rely on userspace rendering
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* into the buffer attached to the pipe they are waiting
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* on. If not, userspace generates a GPU hang with IPEHR
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* point to the MI_WAIT_FOR_EVENT.
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*
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* This should only fail upon a hung GPU, in which case we
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* can safely continue.
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*/
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if (intel_crtc_needs_modeset(crtc_state)) {
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ret = i915_sw_fence_await_reservation(&state->commit_ready,
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old_obj->base.resv, NULL,
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false, 0,
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GFP_KERNEL);
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if (ret < 0)
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return ret;
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}
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}
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if (new_plane_state->uapi.fence) { /* explicit fencing */
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i915_gem_fence_wait_priority(new_plane_state->uapi.fence,
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&attr);
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ret = i915_sw_fence_await_dma_fence(&state->commit_ready,
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new_plane_state->uapi.fence,
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i915_fence_timeout(dev_priv),
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GFP_KERNEL);
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if (ret < 0)
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return ret;
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}
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if (!obj)
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return 0;
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ret = intel_plane_pin_fb(new_plane_state);
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if (ret)
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return ret;
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i915_gem_object_wait_priority(obj, 0, &attr);
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if (!new_plane_state->uapi.fence) { /* implicit fencing */
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struct dma_fence *fence;
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ret = i915_sw_fence_await_reservation(&state->commit_ready,
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obj->base.resv, NULL,
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false,
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i915_fence_timeout(dev_priv),
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GFP_KERNEL);
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if (ret < 0)
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goto unpin_fb;
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fence = dma_resv_get_excl_unlocked(obj->base.resv);
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if (fence) {
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add_rps_boost_after_vblank(new_plane_state->hw.crtc,
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fence);
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dma_fence_put(fence);
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}
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} else {
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add_rps_boost_after_vblank(new_plane_state->hw.crtc,
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new_plane_state->uapi.fence);
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}
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/*
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* We declare pageflips to be interactive and so merit a small bias
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* towards upclocking to deliver the frame on time. By only changing
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* the RPS thresholds to sample more regularly and aim for higher
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* clocks we can hopefully deliver low power workloads (like kodi)
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* that are not quite steady state without resorting to forcing
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* maximum clocks following a vblank miss (see do_rps_boost()).
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*/
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if (!state->rps_interactive) {
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intel_rps_mark_interactive(&dev_priv->gt.rps, true);
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state->rps_interactive = true;
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}
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return 0;
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unpin_fb:
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intel_plane_unpin_fb(new_plane_state);
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return ret;
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}
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/**
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* intel_cleanup_plane_fb - Cleans up an fb after plane use
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* @plane: drm plane to clean up for
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* @_old_plane_state: the state from the previous modeset
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*
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* Cleans up a framebuffer that has just been removed from a plane.
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*/
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static void
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intel_cleanup_plane_fb(struct drm_plane *plane,
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struct drm_plane_state *_old_plane_state)
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{
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struct intel_plane_state *old_plane_state =
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to_intel_plane_state(_old_plane_state);
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struct intel_atomic_state *state =
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to_intel_atomic_state(old_plane_state->uapi.state);
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struct drm_i915_private *dev_priv = to_i915(plane->dev);
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struct drm_i915_gem_object *obj = intel_fb_obj(old_plane_state->hw.fb);
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if (!obj)
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return;
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if (state->rps_interactive) {
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intel_rps_mark_interactive(&dev_priv->gt.rps, false);
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state->rps_interactive = false;
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}
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/* Should only be called after a successful intel_prepare_plane_fb()! */
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intel_plane_unpin_fb(old_plane_state);
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}
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static const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
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static const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
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.prepare_fb = intel_prepare_plane_fb,
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.prepare_fb = intel_prepare_plane_fb,
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.cleanup_fb = intel_cleanup_plane_fb,
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.cleanup_fb = intel_cleanup_plane_fb,
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@ -68,7 +68,6 @@
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#include "gem/i915_gem_lmem.h"
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#include "gem/i915_gem_lmem.h"
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#include "gem/i915_gem_object.h"
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#include "gem/i915_gem_object.h"
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#include "gt/intel_rps.h"
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#include "gt/gen8_ppgtt.h"
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#include "gt/gen8_ppgtt.h"
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#include "g4x_dp.h"
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#include "g4x_dp.h"
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@ -10479,64 +10478,6 @@ static int intel_atomic_commit(struct drm_device *dev,
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return 0;
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return 0;
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}
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}
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struct wait_rps_boost {
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struct wait_queue_entry wait;
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struct drm_crtc *crtc;
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struct i915_request *request;
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};
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static int do_rps_boost(struct wait_queue_entry *_wait,
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unsigned mode, int sync, void *key)
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{
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struct wait_rps_boost *wait = container_of(_wait, typeof(*wait), wait);
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struct i915_request *rq = wait->request;
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/*
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* If we missed the vblank, but the request is already running it
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* is reasonable to assume that it will complete before the next
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* vblank without our intervention, so leave RPS alone.
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*/
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if (!i915_request_started(rq))
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intel_rps_boost(rq);
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i915_request_put(rq);
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drm_crtc_vblank_put(wait->crtc);
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list_del(&wait->wait.entry);
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kfree(wait);
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return 1;
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}
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static void add_rps_boost_after_vblank(struct drm_crtc *crtc,
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struct dma_fence *fence)
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{
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struct wait_rps_boost *wait;
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if (!dma_fence_is_i915(fence))
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return;
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if (DISPLAY_VER(to_i915(crtc->dev)) < 6)
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return;
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if (drm_crtc_vblank_get(crtc))
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return;
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wait = kmalloc(sizeof(*wait), GFP_KERNEL);
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if (!wait) {
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drm_crtc_vblank_put(crtc);
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return;
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}
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wait->request = to_request(dma_fence_get(fence));
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wait->crtc = crtc;
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wait->wait.func = do_rps_boost;
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wait->wait.flags = 0;
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add_wait_queue(drm_crtc_vblank_waitqueue(crtc), &wait->wait);
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}
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int intel_plane_pin_fb(struct intel_plane_state *plane_state)
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int intel_plane_pin_fb(struct intel_plane_state *plane_state)
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{
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{
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struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
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struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
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@ -10603,155 +10544,6 @@ void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state)
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}
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}
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}
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}
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/**
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* intel_prepare_plane_fb - Prepare fb for usage on plane
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* @_plane: drm plane to prepare for
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* @_new_plane_state: the plane state being prepared
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*
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* Prepares a framebuffer for usage on a display plane. Generally this
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* involves pinning the underlying object and updating the frontbuffer tracking
|
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* bits. Some older platforms need special physical address handling for
|
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* cursor planes.
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*
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* Returns 0 on success, negative error code on failure.
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*/
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int
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intel_prepare_plane_fb(struct drm_plane *_plane,
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struct drm_plane_state *_new_plane_state)
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{
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struct i915_sched_attr attr = { .priority = I915_PRIORITY_DISPLAY };
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struct intel_plane *plane = to_intel_plane(_plane);
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struct intel_plane_state *new_plane_state =
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to_intel_plane_state(_new_plane_state);
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struct intel_atomic_state *state =
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to_intel_atomic_state(new_plane_state->uapi.state);
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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const struct intel_plane_state *old_plane_state =
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intel_atomic_get_old_plane_state(state, plane);
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struct drm_i915_gem_object *obj = intel_fb_obj(new_plane_state->hw.fb);
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struct drm_i915_gem_object *old_obj = intel_fb_obj(old_plane_state->hw.fb);
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int ret;
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if (old_obj) {
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const struct intel_crtc_state *crtc_state =
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intel_atomic_get_new_crtc_state(state,
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to_intel_crtc(old_plane_state->hw.crtc));
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/* Big Hammer, we also need to ensure that any pending
|
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* MI_WAIT_FOR_EVENT inside a user batch buffer on the
|
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* current scanout is retired before unpinning the old
|
|
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* framebuffer. Note that we rely on userspace rendering
|
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* into the buffer attached to the pipe they are waiting
|
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* on. If not, userspace generates a GPU hang with IPEHR
|
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* point to the MI_WAIT_FOR_EVENT.
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*
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* This should only fail upon a hung GPU, in which case we
|
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* can safely continue.
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*/
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if (intel_crtc_needs_modeset(crtc_state)) {
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ret = i915_sw_fence_await_reservation(&state->commit_ready,
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old_obj->base.resv, NULL,
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false, 0,
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GFP_KERNEL);
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if (ret < 0)
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return ret;
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}
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}
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if (new_plane_state->uapi.fence) { /* explicit fencing */
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i915_gem_fence_wait_priority(new_plane_state->uapi.fence,
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&attr);
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ret = i915_sw_fence_await_dma_fence(&state->commit_ready,
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new_plane_state->uapi.fence,
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|
||||||
i915_fence_timeout(dev_priv),
|
|
||||||
GFP_KERNEL);
|
|
||||||
if (ret < 0)
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (!obj)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
|
|
||||||
ret = intel_plane_pin_fb(new_plane_state);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
i915_gem_object_wait_priority(obj, 0, &attr);
|
|
||||||
|
|
||||||
if (!new_plane_state->uapi.fence) { /* implicit fencing */
|
|
||||||
struct dma_fence *fence;
|
|
||||||
|
|
||||||
ret = i915_sw_fence_await_reservation(&state->commit_ready,
|
|
||||||
obj->base.resv, NULL,
|
|
||||||
false,
|
|
||||||
i915_fence_timeout(dev_priv),
|
|
||||||
GFP_KERNEL);
|
|
||||||
if (ret < 0)
|
|
||||||
goto unpin_fb;
|
|
||||||
|
|
||||||
fence = dma_resv_get_excl_unlocked(obj->base.resv);
|
|
||||||
if (fence) {
|
|
||||||
add_rps_boost_after_vblank(new_plane_state->hw.crtc,
|
|
||||||
fence);
|
|
||||||
dma_fence_put(fence);
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
add_rps_boost_after_vblank(new_plane_state->hw.crtc,
|
|
||||||
new_plane_state->uapi.fence);
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* We declare pageflips to be interactive and so merit a small bias
|
|
||||||
* towards upclocking to deliver the frame on time. By only changing
|
|
||||||
* the RPS thresholds to sample more regularly and aim for higher
|
|
||||||
* clocks we can hopefully deliver low power workloads (like kodi)
|
|
||||||
* that are not quite steady state without resorting to forcing
|
|
||||||
* maximum clocks following a vblank miss (see do_rps_boost()).
|
|
||||||
*/
|
|
||||||
if (!state->rps_interactive) {
|
|
||||||
intel_rps_mark_interactive(&dev_priv->gt.rps, true);
|
|
||||||
state->rps_interactive = true;
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
unpin_fb:
|
|
||||||
intel_plane_unpin_fb(new_plane_state);
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* intel_cleanup_plane_fb - Cleans up an fb after plane use
|
|
||||||
* @plane: drm plane to clean up for
|
|
||||||
* @_old_plane_state: the state from the previous modeset
|
|
||||||
*
|
|
||||||
* Cleans up a framebuffer that has just been removed from a plane.
|
|
||||||
*/
|
|
||||||
void
|
|
||||||
intel_cleanup_plane_fb(struct drm_plane *plane,
|
|
||||||
struct drm_plane_state *_old_plane_state)
|
|
||||||
{
|
|
||||||
struct intel_plane_state *old_plane_state =
|
|
||||||
to_intel_plane_state(_old_plane_state);
|
|
||||||
struct intel_atomic_state *state =
|
|
||||||
to_intel_atomic_state(old_plane_state->uapi.state);
|
|
||||||
struct drm_i915_private *dev_priv = to_i915(plane->dev);
|
|
||||||
struct drm_i915_gem_object *obj = intel_fb_obj(old_plane_state->hw.fb);
|
|
||||||
|
|
||||||
if (!obj)
|
|
||||||
return;
|
|
||||||
|
|
||||||
if (state->rps_interactive) {
|
|
||||||
intel_rps_mark_interactive(&dev_priv->gt.rps, false);
|
|
||||||
state->rps_interactive = false;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Should only be called after a successful intel_prepare_plane_fb()! */
|
|
||||||
intel_plane_unpin_fb(old_plane_state);
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* intel_plane_destroy - destroy a plane
|
* intel_plane_destroy - destroy a plane
|
||||||
* @plane: plane to destroy
|
* @plane: plane to destroy
|
||||||
|
|||||||
@ -585,10 +585,6 @@ void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags);
|
|||||||
struct drm_framebuffer *
|
struct drm_framebuffer *
|
||||||
intel_framebuffer_create(struct drm_i915_gem_object *obj,
|
intel_framebuffer_create(struct drm_i915_gem_object *obj,
|
||||||
struct drm_mode_fb_cmd2 *mode_cmd);
|
struct drm_mode_fb_cmd2 *mode_cmd);
|
||||||
int intel_prepare_plane_fb(struct drm_plane *plane,
|
|
||||||
struct drm_plane_state *new_state);
|
|
||||||
void intel_cleanup_plane_fb(struct drm_plane *plane,
|
|
||||||
struct drm_plane_state *old_state);
|
|
||||||
|
|
||||||
void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv,
|
void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv,
|
||||||
enum pipe pipe);
|
enum pipe pipe);
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user