dt-bindings: mtd: Standardize the style in the examples
As recently requested by the binding maintaines, let's use 4 spaces in the examples. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/linux-mtd/20221114090315.848208-18-miquel.raynal@bootlin.com
This commit is contained in:
Miquel Raynal
parent
d963af0b23
commit
74f4d7974d
@ -34,20 +34,20 @@ unevaluatedProperties: false
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examples:
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- |
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smcc: memory-controller@e000e000 {
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compatible = "arm,pl353-smc-r2p1", "arm,primecell";
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reg = <0xe000e000 0x0001000>;
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clock-names = "memclk", "apb_pclk";
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clocks = <&clkc 11>, <&clkc 44>;
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ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */
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0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */
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0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "arm,pl353-smc-r2p1", "arm,primecell";
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reg = <0xe000e000 0x0001000>;
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clock-names = "memclk", "apb_pclk";
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clocks = <&clkc 11>, <&clkc 44>;
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ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */
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0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */
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0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */
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#address-cells = <2>;
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#size-cells = <1>;
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nfc0: nand-controller@0,0 {
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compatible = "arm,pl353-nand-r2p1";
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reg = <0 0 0x1000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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nfc0: nand-controller@0,0 {
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compatible = "arm,pl353-nand-r2p1";
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reg = <0 0 0x1000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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@ -184,51 +184,51 @@ required:
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examples:
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- |
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nand-controller@f0442800 {
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compatible = "brcm,brcmnand-v7.0", "brcm,brcmnand";
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reg = <0xf0442800 0x600>,
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<0xf0443000 0x100>;
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reg-names = "nand", "flash-dma";
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interrupt-parent = <&hif_intr2_intc>;
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interrupts = <24>, <4>;
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compatible = "brcm,brcmnand-v7.0", "brcm,brcmnand";
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reg = <0xf0442800 0x600>,
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<0xf0443000 0x100>;
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reg-names = "nand", "flash-dma";
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interrupt-parent = <&hif_intr2_intc>;
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interrupts = <24>, <4>;
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#address-cells = <1>;
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#size-cells = <0>;
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nand@1 {
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compatible = "brcm,nandcs";
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reg = <1>; // Chip select 1
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nand-on-flash-bbt;
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nand-ecc-strength = <12>;
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nand-ecc-step-size = <512>;
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#address-cells = <1>;
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#size-cells = <0>;
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nand@1 {
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compatible = "brcm,nandcs";
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reg = <1>; // Chip select 1
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nand-on-flash-bbt;
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nand-ecc-strength = <12>;
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nand-ecc-step-size = <512>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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#size-cells = <1>;
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};
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};
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- |
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nand-controller@10000200 {
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compatible = "brcm,nand-bcm63168", "brcm,nand-bcm6368",
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"brcm,brcmnand-v4.0", "brcm,brcmnand";
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reg = <0x10000200 0x180>,
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<0x100000b0 0x10>,
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<0x10000600 0x200>;
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reg-names = "nand", "nand-int-base", "nand-cache";
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interrupt-parent = <&periph_intc>;
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interrupts = <50>;
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clocks = <&periph_clk 20>;
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clock-names = "nand";
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compatible = "brcm,nand-bcm63168", "brcm,nand-bcm6368",
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"brcm,brcmnand-v4.0", "brcm,brcmnand";
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reg = <0x10000200 0x180>,
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<0x100000b0 0x10>,
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<0x10000600 0x200>;
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reg-names = "nand", "nand-int-base", "nand-cache";
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interrupt-parent = <&periph_intc>;
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interrupts = <50>;
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clocks = <&periph_clk 20>;
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clock-names = "nand";
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#address-cells = <1>;
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#size-cells = <0>;
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nand@0 {
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compatible = "brcm,nandcs";
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reg = <0>;
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nand-on-flash-bbt;
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nand-ecc-strength = <1>;
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nand-ecc-step-size = <512>;
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#address-cells = <1>;
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#size-cells = <0>;
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nand@0 {
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compatible = "brcm,nandcs";
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reg = <0>;
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nand-on-flash-bbt;
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nand-ecc-strength = <1>;
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nand-ecc-step-size = <512>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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#size-cells = <1>;
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};
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};
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@ -145,6 +145,6 @@ examples:
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#size-cells = <0>;
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nand@0 {
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reg = <0>;
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reg = <0>;
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};
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};
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@ -58,78 +58,78 @@ examples:
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- |
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#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
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memory-controller@13410000 {
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compatible = "ingenic,jz4780-nemc";
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reg = <0x13410000 0x10000>;
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <1 0 0x1b000000 0x1000000>,
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<2 0 0x1a000000 0x1000000>,
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<3 0 0x19000000 0x1000000>,
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<4 0 0x18000000 0x1000000>,
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<5 0 0x17000000 0x1000000>,
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<6 0 0x16000000 0x1000000>;
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compatible = "ingenic,jz4780-nemc";
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reg = <0x13410000 0x10000>;
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <1 0 0x1b000000 0x1000000>,
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<2 0 0x1a000000 0x1000000>,
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<3 0 0x19000000 0x1000000>,
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<4 0 0x18000000 0x1000000>,
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<5 0 0x17000000 0x1000000>,
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<6 0 0x16000000 0x1000000>;
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clocks = <&cgu JZ4780_CLK_NEMC>;
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clocks = <&cgu JZ4780_CLK_NEMC>;
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nand-controller@1 {
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compatible = "ingenic,jz4780-nand";
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reg = <1 0 0x1000000>;
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nand-controller@1 {
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compatible = "ingenic,jz4780-nand";
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reg = <1 0 0x1000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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ecc-engine = <&bch>;
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ecc-engine = <&bch>;
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ingenic,nemc-tAS = <10>;
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ingenic,nemc-tAH = <5>;
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ingenic,nemc-tBP = <10>;
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ingenic,nemc-tAW = <15>;
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ingenic,nemc-tSTRV = <100>;
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ingenic,nemc-tAS = <10>;
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ingenic,nemc-tAH = <5>;
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ingenic,nemc-tBP = <10>;
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ingenic,nemc-tAW = <15>;
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ingenic,nemc-tSTRV = <100>;
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pinctrl-names = "default";
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pinctrl-0 = <&pins_nemc>;
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pinctrl-names = "default";
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pinctrl-0 = <&pins_nemc>;
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nand@1 {
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reg = <1>;
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nand@1 {
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reg = <1>;
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nand-ecc-step-size = <1024>;
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nand-ecc-strength = <24>;
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nand-ecc-mode = "hw";
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nand-on-flash-bbt;
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nand-ecc-step-size = <1024>;
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nand-ecc-strength = <24>;
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nand-ecc-mode = "hw";
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nand-on-flash-bbt;
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pinctrl-names = "default";
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pinctrl-0 = <&pins_nemc_cs1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pins_nemc_cs1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <2>;
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#size-cells = <2>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <2>;
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#size-cells = <2>;
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partition@0 {
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label = "u-boot-spl";
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reg = <0x0 0x0 0x0 0x800000>;
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partition@0 {
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label = "u-boot-spl";
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reg = <0x0 0x0 0x0 0x800000>;
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};
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partition@800000 {
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label = "u-boot";
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reg = <0x0 0x800000 0x0 0x200000>;
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};
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partition@a00000 {
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label = "u-boot-env";
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reg = <0x0 0xa00000 0x0 0x200000>;
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};
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partition@c00000 {
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label = "boot";
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reg = <0x0 0xc00000 0x0 0x4000000>;
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};
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partition@4c00000 {
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label = "system";
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reg = <0x0 0x4c00000 0x1 0xfb400000>;
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};
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};
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};
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partition@800000 {
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label = "u-boot";
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reg = <0x0 0x800000 0x0 0x200000>;
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};
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partition@a00000 {
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label = "u-boot-env";
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reg = <0x0 0xa00000 0x0 0x200000>;
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};
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partition@c00000 {
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label = "boot";
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reg = <0x0 0xc00000 0x0 0x4000000>;
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};
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partition@4c00000 {
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label = "system";
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reg = <0x0 0x4c00000 0x1 0xfb400000>;
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};
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};
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};
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};
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};
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@ -67,25 +67,25 @@ unevaluatedProperties: false
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examples:
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- |
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nand-controller@e0f00000 {
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compatible = "intel,lgm-ebunand";
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reg = <0xe0f00000 0x100>,
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<0xe1000000 0x300>,
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<0xe1400000 0x8000>,
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<0xe1c00000 0x1000>,
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<0x17400000 0x4>,
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<0x17c00000 0x4>;
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reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1",
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"addr_sel0", "addr_sel1";
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clocks = <&cgu0 125>;
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dmas = <&dma0 8>, <&dma0 9>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "intel,lgm-ebunand";
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reg = <0xe0f00000 0x100>,
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<0xe1000000 0x300>,
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<0xe1400000 0x8000>,
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<0xe1c00000 0x1000>,
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<0x17400000 0x4>,
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<0x17c00000 0x4>;
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reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1",
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"addr_sel0", "addr_sel1";
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clocks = <&cgu0 125>;
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dmas = <&dma0 8>, <&dma0 9>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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nand@0 {
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reg = <0>;
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nand-ecc-mode = "hw";
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};
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nand@0 {
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reg = <0>;
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nand-ecc-mode = "hw";
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};
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};
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...
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@ -34,13 +34,13 @@ unevaluatedProperties: false
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examples:
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- |
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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eeram@0 {
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compatible = "microchip,48l640";
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reg = <0>;
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spi-max-frequency = <20000000>;
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};
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eeram@0 {
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compatible = "microchip,48l640";
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reg = <0>;
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spi-max-frequency = <20000000>;
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};
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};
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...
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@ -41,22 +41,22 @@ examples:
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- |
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/* Example declaring dynamic partition */
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flash {
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partitions {
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compatible = "qcom,smem-part";
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partitions {
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compatible = "qcom,smem-part";
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partition-art {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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label = "0:art";
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partition-art {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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label = "0:art";
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macaddr_art_0: macaddr@0 {
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reg = <0x0 0x6>;
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};
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macaddr_art_0: macaddr@0 {
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reg = <0x0 0x6>;
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};
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macaddr_art_6: macaddr@6 {
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reg = <0x6 0x6>;
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};
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macaddr_art_6: macaddr@6 {
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reg = <0x6 0x6>;
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};
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};
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};
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};
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};
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@ -136,85 +136,85 @@ examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-ipq806x.h>
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nand-controller@1ac00000 {
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compatible = "qcom,ipq806x-nand";
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reg = <0x1ac00000 0x800>;
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compatible = "qcom,ipq806x-nand";
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reg = <0x1ac00000 0x800>;
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clocks = <&gcc EBI2_CLK>,
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<&gcc EBI2_AON_CLK>;
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clock-names = "core", "aon";
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clocks = <&gcc EBI2_CLK>,
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<&gcc EBI2_AON_CLK>;
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clock-names = "core", "aon";
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dmas = <&adm_dma 3>;
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dma-names = "rxtx";
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qcom,cmd-crci = <15>;
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qcom,data-crci = <3>;
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dmas = <&adm_dma 3>;
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dma-names = "rxtx";
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qcom,cmd-crci = <15>;
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qcom,data-crci = <3>;
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#address-cells = <1>;
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#size-cells = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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nand@0 {
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reg = <0>;
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nand@0 {
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reg = <0>;
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nand-ecc-strength = <4>;
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nand-bus-width = <8>;
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nand-ecc-strength = <4>;
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nand-bus-width = <8>;
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qcom,boot-partitions = <0x0 0x58a0000>;
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qcom,boot-partitions = <0x0 0x58a0000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "boot-nand";
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reg = <0 0x58a0000>;
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};
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partition@0 {
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label = "boot-nand";
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reg = <0 0x58a0000>;
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};
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partition@58a0000 {
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label = "fs-nand";
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reg = <0x58a0000 0x4000000>;
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};
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partition@58a0000 {
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label = "fs-nand";
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reg = <0x58a0000 0x4000000>;
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};
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};
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};
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};
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};
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#include <dt-bindings/clock/qcom,gcc-ipq4019.h>
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nand-controller@79b0000 {
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compatible = "qcom,ipq4019-nand";
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reg = <0x79b0000 0x1000>;
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compatible = "qcom,ipq4019-nand";
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reg = <0x79b0000 0x1000>;
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clocks = <&gcc GCC_QPIC_CLK>,
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<&gcc GCC_QPIC_AHB_CLK>;
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clock-names = "core", "aon";
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clocks = <&gcc GCC_QPIC_CLK>,
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<&gcc GCC_QPIC_AHB_CLK>;
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clock-names = "core", "aon";
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dmas = <&qpicbam 0>,
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<&qpicbam 1>,
|
||||
<&qpicbam 2>;
|
||||
dma-names = "tx", "rx", "cmd";
|
||||
dmas = <&qpicbam 0>,
|
||||
<&qpicbam 1>,
|
||||
<&qpicbam 2>;
|
||||
dma-names = "tx", "rx", "cmd";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-ecc-strength = <4>;
|
||||
nand-bus-width = <8>;
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-ecc-strength = <4>;
|
||||
nand-bus-width = <8>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "boot-nand";
|
||||
reg = <0 0x58a0000>;
|
||||
};
|
||||
partition@0 {
|
||||
label = "boot-nand";
|
||||
reg = <0 0x58a0000>;
|
||||
};
|
||||
|
||||
partition@58a0000 {
|
||||
label = "fs-nand";
|
||||
reg = <0x58a0000 0x4000000>;
|
||||
};
|
||||
partition@58a0000 {
|
||||
label = "fs-nand";
|
||||
reg = <0x58a0000 0x4000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
||||
@ -101,31 +101,32 @@ examples:
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/stm32mp1-clks.h>
|
||||
#include <dt-bindings/reset/stm32mp1-resets.h>
|
||||
nand-controller@58002000 {
|
||||
compatible = "st,stm32mp15-fmc2";
|
||||
reg = <0x58002000 0x1000>,
|
||||
<0x80000000 0x1000>,
|
||||
<0x88010000 0x1000>,
|
||||
<0x88020000 0x1000>,
|
||||
<0x81000000 0x1000>,
|
||||
<0x89010000 0x1000>,
|
||||
<0x89020000 0x1000>;
|
||||
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
|
||||
<&mdma1 20 0x2 0x12000a08 0x0 0x0>,
|
||||
<&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
|
||||
dma-names = "tx", "rx", "ecc";
|
||||
clocks = <&rcc FMC_K>;
|
||||
resets = <&rcc FMC_R>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-on-flash-bbt;
|
||||
nand-controller@58002000 {
|
||||
compatible = "st,stm32mp15-fmc2";
|
||||
reg = <0x58002000 0x1000>,
|
||||
<0x80000000 0x1000>,
|
||||
<0x88010000 0x1000>,
|
||||
<0x88020000 0x1000>,
|
||||
<0x81000000 0x1000>,
|
||||
<0x89010000 0x1000>,
|
||||
<0x89020000 0x1000>;
|
||||
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
|
||||
<&mdma1 20 0x2 0x12000a08 0x0 0x0>,
|
||||
<&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
|
||||
dma-names = "tx", "rx", "ecc";
|
||||
clocks = <&rcc FMC_K>;
|
||||
resets = <&rcc FMC_R>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
#size-cells = <0>;
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-on-flash-bbt;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
||||
@ -44,26 +44,26 @@ additionalProperties: false
|
||||
examples:
|
||||
- |
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
hbmc: memory-controller@47034000 {
|
||||
compatible = "ti,am654-hbmc";
|
||||
reg = <0x0 0x47034000 0x0 0x100>,
|
||||
<0x5 0x00000000 0x1 0x0000000>;
|
||||
ranges = <0x0 0x0 0x5 0x00000000 0x4000000>, /* CS0 - 64MB */
|
||||
<0x1 0x0 0x5 0x04000000 0x4000000>; /* CS1 - 64MB */
|
||||
clocks = <&k3_clks 102 0>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
power-domains = <&k3_pds 55>;
|
||||
mux-controls = <&hbmc_mux 0>;
|
||||
#size-cells = <2>;
|
||||
|
||||
flash@0,0 {
|
||||
compatible = "cypress,hyperflash", "cfi-flash";
|
||||
reg = <0x0 0x0 0x4000000>;
|
||||
#address-cells = <1>;
|
||||
hbmc: memory-controller@47034000 {
|
||||
compatible = "ti,am654-hbmc";
|
||||
reg = <0x0 0x47034000 0x0 0x100>,
|
||||
<0x5 0x00000000 0x1 0x0000000>;
|
||||
ranges = <0x0 0x0 0x5 0x00000000 0x4000000>, /* CS0 - 64MB */
|
||||
<0x1 0x0 0x5 0x04000000 0x4000000>; /* CS1 - 64MB */
|
||||
clocks = <&k3_clks 102 0>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
power-domains = <&k3_pds 55>;
|
||||
mux-controls = <&hbmc_mux 0>;
|
||||
|
||||
flash@0,0 {
|
||||
compatible = "cypress,hyperflash", "cfi-flash";
|
||||
reg = <0x0 0x0 0x4000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user