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x86/mm: Signal SIGSEGV with PF_SGX

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The x86 architecture has a set of page fault error codes.  These indicate
things like whether the fault occurred from a write, or whether it
originated in userspace.

The SGX hardware architecture has its own per-page memory management
metadata (EPCM) [*] and hardware which is separate from the normal x86 MMU.
The architecture has a new page fault error code: PF_SGX.  This new error
code bit is set whenever a page fault occurs as the result of the SGX MMU.

These faults occur for a variety of reasons.  For instance, an access
attempt to enclave memory from outside the enclave causes a PF_SGX fault.
PF_SGX would also be set for permission conflicts, such as if a write to an
enclave page occurs and the page is marked read-write in the x86 page
tables but is read-only in the EPCM.

These faults do not always indicate errors, though.  SGX pages are
encrypted with a key that is destroyed at hardware reset, including
suspend. Throwing a SIGSEGV allows user space software to react and recover
when these events occur.

Include PF_SGX in the PF error codes list and throw SIGSEGV when it is
encountered.

[*] Intel SDM: 36.5.1 Enclave Page Cache Map (EPCM)

 [ bp: Add bit 15 to the comment above enum x86_pf_error_code too. ]

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Jethro Beekman <jethro@fortanix.com>
Link: https://lkml.kernel.org/r/20201112220135.165028-7-jarkko@kernel.org
This commit is contained in:
Sean Christopherson
2020-11-13 00:01:17 +02:00
committed by Borislav Petkov
parent e7e0545299
commit 74faeee06d
2 changed files with 14 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/x86/include/asm/trap_pf.h
View File

@@ -11,6 +11,7 @@
* bit 3 == 1: use of reserved bit detected * bit 3 == 1: use of reserved bit detected
* bit 4 == 1: fault was an instruction fetch * bit 4 == 1: fault was an instruction fetch
* bit 5 == 1: protection keys block access * bit 5 == 1: protection keys block access
* bit 15 == 1: SGX MMU page-fault
*/ */
enum x86_pf_error_code { enum x86_pf_error_code {
X86_PF_PROT = 1 << 0, X86_PF_PROT = 1 << 0,
@@ -19,6 +20,7 @@ enum x86_pf_error_code {
X86_PF_RSVD = 1 << 3, X86_PF_RSVD = 1 << 3,
X86_PF_INSTR = 1 << 4, X86_PF_INSTR = 1 << 4,
X86_PF_PK = 1 << 5, X86_PF_PK = 1 << 5,
X86_PF_SGX = 1 << 15,
}; };
#endif /* _ASM_X86_TRAP_PF_H */ #endif /* _ASM_X86_TRAP_PF_H */

12
arch/x86/mm/fault.c
View File

@@ -1101,6 +1101,18 @@ access_error(unsigned long error_code, struct vm_area_struct *vma)
if (error_code & X86_PF_PK) if (error_code & X86_PF_PK)
return 1; return 1;
/*
* SGX hardware blocked the access. This usually happens
* when the enclave memory contents have been destroyed, like
* after a suspend/resume cycle. In any case, the kernel can't
* fix the cause of the fault. Handle the fault as an access
* error even in cases where no actual access violation
* occurred. This allows userspace to rebuild the enclave in
* response to the signal.
*/
if (unlikely(error_code & X86_PF_SGX))
return 1;
/* /*
* Make sure to check the VMA so that we do not perform * Make sure to check the VMA so that we do not perform
* faults just to hit a X86_PF_PK as soon as we fill in a * faults just to hit a X86_PF_PK as soon as we fill in a