arm64: dts: qcom: sm8450: switch UFS QMP PHY to new style of bindings
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231205032552.1583336-10-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -756,9 +756,9 @@
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<&pcie0_phy>,
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<&pcie1_phy>,
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<0>,
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<&ufs_mem_phy_lanes 0>,
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<&ufs_mem_phy_lanes 1>,
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<&ufs_mem_phy_lanes 2>,
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<&ufs_mem_phy 0>,
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<&ufs_mem_phy 1>,
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<&ufs_mem_phy 2>,
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<&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>;
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clock-names = "bi_tcxo",
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"sleep_clk",
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@ -4329,7 +4329,7 @@
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"jedec,ufs-2.0";
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reg = <0 0x01d84000 0 0x3000>;
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interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&ufs_mem_phy_lanes>;
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phys = <&ufs_mem_phy>;
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phy-names = "ufsphy";
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lanes-per-direction = <2>;
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#reset-cells = <1>;
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@ -4378,10 +4378,8 @@
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ufs_mem_phy: phy@1d87000 {
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compatible = "qcom,sm8450-qmp-ufs-phy";
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reg = <0 0x01d87000 0 0x1c4>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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reg = <0 0x01d87000 0 0x1000>;
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clock-names = "ref", "ref_aux", "qref";
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
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@ -4389,17 +4387,11 @@
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resets = <&ufs_mem_hc 0>;
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reset-names = "ufsphy";
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status = "disabled";
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ufs_mem_phy_lanes: phy@1d87400 {
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reg = <0 0x01d87400 0 0x188>,
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<0 0x01d87600 0 0x200>,
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<0 0x01d87c00 0 0x200>,
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<0 0x01d87800 0 0x188>,
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<0 0x01d87a00 0 0x200>;
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#clock-cells = <1>;
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#phy-cells = <0>;
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};
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#clock-cells = <1>;
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#phy-cells = <0>;
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status = "disabled";
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};
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ice: crypto@1d88000 {
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