arm64: dts: qcom: sdm845: switch UFS QMP PHY to new style of bindings
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231205032552.1583336-4-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -2565,7 +2565,7 @@
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<0 0x01d90000 0 0x8000>;
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reg-names = "std", "ice";
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interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&ufs_mem_phy_lanes>;
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phys = <&ufs_mem_phy>;
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phy-names = "ufsphy";
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lanes-per-direction = <2>;
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power-domains = <&gcc UFS_PHY_GDSC>;
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@ -2637,10 +2637,8 @@
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ufs_mem_phy: phy@1d87000 {
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compatible = "qcom,sdm845-qmp-ufs-phy";
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reg = <0 0x01d87000 0 0x18c>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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reg = <0 0x01d87000 0 0x1000>;
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clock-names = "ref",
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"ref_aux";
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clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
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@ -2648,16 +2646,9 @@
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resets = <&ufs_mem_hc 0>;
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reset-names = "ufsphy";
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status = "disabled";
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ufs_mem_phy_lanes: phy@1d87400 {
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reg = <0 0x01d87400 0 0x108>,
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<0 0x01d87600 0 0x1e0>,
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<0 0x01d87c00 0 0x1dc>,
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<0 0x01d87800 0 0x108>,
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<0 0x01d87a00 0 0x1e0>;
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#phy-cells = <0>;
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};
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#phy-cells = <0>;
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status = "disabled";
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};
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cryptobam: dma-controller@1dc4000 {
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