wifi: rtlwifi: rtl8821ae: Reverse PM Capability exists check
Check if PM Capability does not exists and return early which follows the usual error handling pattern. Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231124084725.12738-6-ilpo.jarvinen@linux.intel.com
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@ -2305,30 +2305,31 @@ static void _rtl8821ae_clear_pci_pme_status(struct ieee80211_hw *hw)
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}
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} while (cnt++ < 200);
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if (cap_id == 0x01) {
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/* Get the PM CSR (Control/Status Register),
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* The PME_Status is located at PM Capatibility offset 5, bit 7
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*/
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pci_read_config_byte(rtlpci->pdev, cap_pointer + 5, &pmcs_reg);
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if (pmcs_reg & BIT(7)) {
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/* Clear PME_Status with write */
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pci_write_config_byte(rtlpci->pdev, cap_pointer + 5,
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pmcs_reg);
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/* Read it back to check */
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pci_read_config_byte(rtlpci->pdev, cap_pointer + 5,
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&pmcs_reg);
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rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
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"Clear PME status 0x%2x to 0x%2x\n",
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cap_pointer + 5, pmcs_reg);
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} else {
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rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
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"PME status(0x%2x) = 0x%2x\n",
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cap_pointer + 5, pmcs_reg);
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}
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} else {
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if (cap_id != 0x01) {
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rtl_dbg(rtlpriv, COMP_INIT, DBG_WARNING,
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"Cannot find PME Capability\n");
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return;
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}
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/* Get the PM CSR (Control/Status Register),
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* The PME_Status is located at PM Capatibility offset 5, bit 7
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*/
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pci_read_config_byte(rtlpci->pdev, cap_pointer + 5, &pmcs_reg);
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if (pmcs_reg & BIT(7)) {
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/* Clear PME_Status with write */
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pci_write_config_byte(rtlpci->pdev, cap_pointer + 5,
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pmcs_reg);
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/* Read it back to check */
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pci_read_config_byte(rtlpci->pdev, cap_pointer + 5,
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&pmcs_reg);
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rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
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"Clear PME status 0x%2x to 0x%2x\n",
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cap_pointer + 5, pmcs_reg);
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} else {
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rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
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"PME status(0x%2x) = 0x%2x\n",
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cap_pointer + 5, pmcs_reg);
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}
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}
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