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drm/msm/dpu: create a dpu_hw_clk_force_ctrl() helper

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Add an helper to setup the force clock control as it will
be used in multiple HW files.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/562323/
Signed-off-by: Rob Clark <robdclark@chromium.org>
This commit is contained in:
Neil Armstrong 2023-10-12 11:01:27 +02:00 committed by Rob Clark
parent b998684618
commit 76191dc11e
3 changed files with 26 additions and 22 deletions
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23
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
View File

@ -66,34 +66,13 @@ static void dpu_hw_setup_split_pipe(struct dpu_hw_mdp *mdp,
static bool dpu_hw_setup_clk_force_ctrl(struct dpu_hw_mdp *mdp,
enum dpu_clk_ctrl_type clk_ctrl, bool enable)
{
struct dpu_hw_blk_reg_map *c;
u32 reg_off, bit_off;
u32 reg_val, new_val;
bool clk_forced_on;
if (!mdp)
return false;
c = &mdp->hw;
if (clk_ctrl <= DPU_CLK_CTRL_NONE || clk_ctrl >= DPU_CLK_CTRL_MAX)
return false;
reg_off = mdp->caps->clk_ctrls[clk_ctrl].reg_off;
bit_off = mdp->caps->clk_ctrls[clk_ctrl].bit_off;
reg_val = DPU_REG_READ(c, reg_off);
if (enable)
new_val = reg_val | BIT(bit_off);
else
new_val = reg_val & ~BIT(bit_off);
DPU_REG_WRITE(c, reg_off, new_val);
clk_forced_on = !(reg_val & BIT(bit_off));
return clk_forced_on;
return dpu_hw_clk_force_ctrl(&mdp->hw, &mdp->caps->clk_ctrls[clk_ctrl], enable);
}

21
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c
View File

@ -546,3 +546,24 @@ void dpu_setup_cdp(struct dpu_hw_blk_reg_map *c, u32 offset,
DPU_REG_WRITE(c, offset, cdp_cntl);
}
bool dpu_hw_clk_force_ctrl(struct dpu_hw_blk_reg_map *c,
const struct dpu_clk_ctrl_reg *clk_ctrl_reg,
bool enable)
{
u32 reg_val, new_val;
bool clk_forced_on;
reg_val = DPU_REG_READ(c, clk_ctrl_reg->reg_off);
if (enable)
new_val = reg_val | BIT(clk_ctrl_reg->bit_off);
else
new_val = reg_val & ~BIT(clk_ctrl_reg->bit_off);
DPU_REG_WRITE(c, clk_ctrl_reg->reg_off, new_val);
clk_forced_on = !(reg_val & BIT(clk_ctrl_reg->bit_off));
return clk_forced_on;
}

4
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
View File

@ -367,4 +367,8 @@ int dpu_hw_collect_misr(struct dpu_hw_blk_reg_map *c,
u32 misr_signature_offset,
u32 *misr_value);
bool dpu_hw_clk_force_ctrl(struct dpu_hw_blk_reg_map *c,
const struct dpu_clk_ctrl_reg *clk_ctrl_reg,
bool enable);
#endif /* _DPU_HW_UTIL_H */