ASoC: Intel: boards: use devm_clk_get() unconditionally
The clock framework was only used in Baytrail, on Cherrytrail
the firmware takes care of the MCLK/plt_clk_3.
With the fix in 'commit d31fd43c0f
("clk: x86: Do not gate clocks enabled by the firmware")'
the firmware-managed clocks are not impacted by enable/disable
requests make at the driver level, and the rates are identical.
Remove all checks for Baytrail and use devm_clk_get()
unconditionally. Tested on Asus T100HA (CHT) and Asus T100TAF (BYT)
Note that the RT5640 and RT5645 machine drivers need to keep some
checks for Valleyview to check for Baytrail-CR.
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Acked-By: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
86cb5dee23
commit
7735bce05a
@ -891,7 +891,7 @@ static int snd_byt_rt5640_mc_probe(struct platform_device *pdev)
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byt_rt5640_cpu_dai_name;
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}
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if ((byt_rt5640_quirk & BYT_RT5640_MCLK_EN) && (is_valleyview())) {
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if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN) {
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priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
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if (IS_ERR(priv->mclk)) {
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ret_val = PTR_ERR(priv->mclk);
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@ -682,14 +682,12 @@ static int snd_cht_mc_probe(struct platform_device *pdev)
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cht_rt5645_cpu_dai_name;
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}
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if (is_valleyview()) {
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drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
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if (IS_ERR(drv->mclk)) {
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dev_err(&pdev->dev,
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"Failed to get MCLK from pmc_plt_clk_3: %ld\n",
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PTR_ERR(drv->mclk));
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return PTR_ERR(drv->mclk);
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}
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drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
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if (IS_ERR(drv->mclk)) {
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dev_err(&pdev->dev,
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"Failed to get MCLK from pmc_plt_clk_3: %ld\n",
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PTR_ERR(drv->mclk));
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return PTR_ERR(drv->mclk);
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}
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snd_soc_card_set_drvdata(card, drv);
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@ -20,7 +20,6 @@
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include <asm/cpu_device_id.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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@ -394,18 +393,6 @@ static struct snd_soc_card snd_soc_card_cht = {
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.resume_post = cht_resume_post,
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};
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static bool is_valleyview(void)
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{
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static const struct x86_cpu_id cpu_ids[] = {
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{ X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */
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{}
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};
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if (!x86_match_cpu(cpu_ids))
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return false;
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return true;
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}
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#define RT5672_I2C_DEFAULT "i2c-10EC5670:00"
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static int snd_cht_mc_probe(struct platform_device *pdev)
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@ -439,14 +426,12 @@ static int snd_cht_mc_probe(struct platform_device *pdev)
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}
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}
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if (is_valleyview()) {
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drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
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if (IS_ERR(drv->mclk)) {
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dev_err(&pdev->dev,
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"Failed to get MCLK from pmc_plt_clk_3: %ld\n",
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PTR_ERR(drv->mclk));
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return PTR_ERR(drv->mclk);
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}
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drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
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if (IS_ERR(drv->mclk)) {
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dev_err(&pdev->dev,
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"Failed to get MCLK from pmc_plt_clk_3: %ld\n",
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PTR_ERR(drv->mclk));
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return PTR_ERR(drv->mclk);
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}
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snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
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