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dt-bindings: fpga: xilinx-pr-decoupler: convert bindings to json-schema

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Convert xilinx-pr-decoupler bindings to DT schema format using json-schema

Signed-off-by: Nava kishore Manne <nava.kishore.manne@amd.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230224111825.161593-1-nava.kishore.manne@amd.com
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Nava kishore Manne 2023-02-24 16:48:25 +05:30 committed by Rob Herring
parent fe15c26ee2
commit 7795c8d3c7
2 changed files with 64 additions and 54 deletions
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54
Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt
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Xilinx LogiCORE Partial Reconfig Decoupler Softcore
The Xilinx LogiCORE Partial Reconfig Decoupler manages one or more
decouplers / fpga bridges.
The controller can decouple/disable the bridges which prevents signal
changes from passing through the bridge. The controller can also
couple / enable the bridges which allows traffic to pass through the
bridge normally.
Xilinx LogiCORE Dynamic Function eXchange(DFX) AXI shutdown manager
Softcore is compatible with the Xilinx LogiCORE pr-decoupler.
The Dynamic Function eXchange AXI shutdown manager prevents AXI traffic
from passing through the bridge. The controller safely handles AXI4MM
and AXI4-Lite interfaces on a Reconfigurable Partition when it is
undergoing dynamic reconfiguration, preventing the system deadlock
that can occur if AXI transactions are interrupted by DFX
The Driver supports only MMIO handling. A PR region can have multiple
PR Decouplers which can be handled independently or chained via decouple/
decouple_status signals.
Required properties:
- compatible : Should contain "xlnx,pr-decoupler-1.00" followed by
"xlnx,pr-decoupler" or
"xlnx,dfx-axi-shutdown-manager-1.00" followed by
"xlnx,dfx-axi-shutdown-manager"
- regs : base address and size for decoupler module
- clocks : input clock to IP
- clock-names : should contain "aclk"
See Documentation/devicetree/bindings/fpga/fpga-region.txt and
Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
Example:
Partial Reconfig Decoupler:
fpga-bridge@100000450 {
compatible = "xlnx,pr-decoupler-1.00",
"xlnx-pr-decoupler";
regs = <0x10000045 0x10>;
clocks = <&clkc 15>;
clock-names = "aclk";
bridge-enable = <0>;
};
Dynamic Function eXchange AXI shutdown manager:
fpga-bridge@100000450 {
compatible = "xlnx,dfx-axi-shutdown-manager-1.00",
"xlnx,dfx-axi-shutdown-manager";
regs = <0x10000045 0x10>;
clocks = <&clkc 15>;
clock-names = "aclk";
bridge-enable = <0>;
};

64
Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fpga/xlnx,pr-decoupler.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx LogiCORE Partial Reconfig Decoupler/AXI shutdown manager Softcore
maintainers:
- Nava kishore Manne <nava.kishore.manne@amd.com>
description: |
The Xilinx LogiCORE Partial Reconfig(PR) Decoupler manages one or more
decouplers/fpga bridges. The controller can decouple/disable the bridges
which prevents signal changes from passing through the bridge. The controller
can also couple / enable the bridges which allows traffic to pass through the
bridge normally.
Xilinx LogiCORE Dynamic Function eXchange(DFX) AXI shutdown manager Softcore
is compatible with the Xilinx LogiCORE pr-decoupler. The Dynamic Function
eXchange AXI shutdown manager prevents AXI traffic from passing through the
bridge. The controller safely handles AXI4MM and AXI4-Lite interfaces on a
Reconfigurable Partition when it is undergoing dynamic reconfiguration,
preventing the system deadlock that can occur if AXI transactions are
interrupted by DFX.
Please refer to fpga-region.txt and fpga-bridge.txt in this directory for
common binding part and usage.
properties:
compatible:
oneOf:
- items:
- const: xlnx,pr-decoupler-1.00
- const: xlnx,pr-decoupler
- items:
- const: xlnx,dfx-axi-shutdown-manager-1.00
- const: xlnx,dfx-axi-shutdown-manager
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: aclk
required:
- compatible
- reg
- clocks
- clock-names
additionalProperties: false
examples:
- |
fpga-bridge@100000450 {
compatible = "xlnx,pr-decoupler-1.00", "xlnx,pr-decoupler";
reg = <0x10000045 0x10>;
clocks = <&clkc 15>;
clock-names = "aclk";
};
...