x86/PCI: X86_PAT & mprotect
Some versions of X used the mprotect workaround to change caching type from UC to WB, so that it can then use mtrr to program WC for that region [1]. Change the mmap of pci space through /sys or /proc interfaces from UC to UC_MINUS. With this change, X will not need to use mprotect workaround to get WC type since the MTRR mapping type will be honored. The bug in mprotect that clobbers PAT bits is fixed in a follow on patch. So, this X workaround will stop working as well. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -301,15 +301,13 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
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prot = pgprot_val(vma->vm_page_prot);
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if (pat_wc_enabled && write_combine)
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prot |= _PAGE_CACHE_WC;
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else if (pat_wc_enabled)
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else if (pat_wc_enabled || boot_cpu_data.x86 > 3)
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/*
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* ioremap() and ioremap_nocache() defaults to UC MINUS for now.
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* To avoid attribute conflicts, request UC MINUS here
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* aswell.
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*/
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prot |= _PAGE_CACHE_UC_MINUS;
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else if (boot_cpu_data.x86 > 3)
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prot |= _PAGE_CACHE_UC;
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vma->vm_page_prot = __pgprot(prot);
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