MIPS: Lantiq: Fix external interrupt sources
The irq base offset needs to be ignored when matching irqs to external interrupt pins. Taking the offset into account resulted in the EIU not being brought up properly. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2616/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -123,11 +123,10 @@ void ltq_enable_irq(struct irq_data *d)
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static unsigned int ltq_startup_eiu_irq(struct irq_data *d)
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{
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int i;
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int irq_nr = d->irq - INT_NUM_IRQ0;
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ltq_enable_irq(d);
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for (i = 0; i < MAX_EIU; i++) {
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if (irq_nr == ltq_eiu_irq[i]) {
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if (d->irq == ltq_eiu_irq[i]) {
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/* low level - we should really handle set_type */
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ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_C) |
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(0x6 << (i * 4)), LTQ_EIU_EXIN_C);
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@ -147,11 +146,10 @@ static unsigned int ltq_startup_eiu_irq(struct irq_data *d)
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static void ltq_shutdown_eiu_irq(struct irq_data *d)
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{
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int i;
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int irq_nr = d->irq - INT_NUM_IRQ0;
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ltq_disable_irq(d);
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for (i = 0; i < MAX_EIU; i++) {
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if (irq_nr == ltq_eiu_irq[i]) {
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if (d->irq == ltq_eiu_irq[i]) {
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/* disable */
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ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_INEN) & ~(1 << i),
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LTQ_EIU_EXIN_INEN);
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