crypto: qat - set CIPHER capability for DH895XCC
[ Upstream commit 6a23804cb8bcb85c6998bf193d94d4036db26f51 ] Set the CIPHER capability for QAT DH895XCC devices if the hardware supports it. This is done if both the CIPHER and the AUTHENTICATION engines are available on the device. Fixes: ad1332aa67ec ("crypto: qat - add support for capability detection") Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Marco Chiappero <marco.chiappero@intel.com> Reviewed-by: Marco Chiappero <marco.chiappero@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -86,17 +86,23 @@ static u32 get_accel_cap(struct adf_accel_dev *accel_dev)
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capabilities = ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC |
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ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC |
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ICP_ACCEL_CAPABILITIES_AUTHENTICATION;
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ICP_ACCEL_CAPABILITIES_AUTHENTICATION |
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ICP_ACCEL_CAPABILITIES_CIPHER;
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/* Read accelerator capabilities mask */
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pci_read_config_dword(pdev, ADF_DEVICE_LEGFUSE_OFFSET, &legfuses);
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if (legfuses & ICP_ACCEL_MASK_CIPHER_SLICE)
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/* A set bit in legfuses means the feature is OFF in this SKU */
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if (legfuses & ICP_ACCEL_MASK_CIPHER_SLICE) {
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capabilities &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC;
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capabilities &= ~ICP_ACCEL_CAPABILITIES_CIPHER;
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}
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if (legfuses & ICP_ACCEL_MASK_PKE_SLICE)
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capabilities &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC;
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if (legfuses & ICP_ACCEL_MASK_AUTH_SLICE)
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if (legfuses & ICP_ACCEL_MASK_AUTH_SLICE) {
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capabilities &= ~ICP_ACCEL_CAPABILITIES_AUTHENTICATION;
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capabilities &= ~ICP_ACCEL_CAPABILITIES_CIPHER;
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}
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if (legfuses & ICP_ACCEL_MASK_COMPRESS_SLICE)
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capabilities &= ~ICP_ACCEL_CAPABILITIES_COMPRESSION;
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