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drm/i915/gt: Fixup misaligned function parameters

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Remember to align parameters to the '(', thanks checkpatch

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210122192913.4518-4-chris@chris-wilson.co.uk
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Chris Wilson 2021-01-22 19:29:07 +00:00 committed by Daniel Vetter
parent 1ca9b8da0f
commit 7898843c44
2 changed files with 3 additions and 4 deletions
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4
drivers/gpu/drm/i915/gt/intel_execlists_submission.c
View File

@ -3349,8 +3349,8 @@ static int virtual_context_alloc(struct intel_context *ce)
}
static int virtual_context_pre_pin(struct intel_context *ce,
struct i915_gem_ww_ctx *ww,
void **vaddr)
struct i915_gem_ww_ctx *ww,
void **vaddr)
{
struct virtual_engine *ve = container_of(ce, typeof(*ve), context);

3
drivers/gpu/drm/i915/gt/intel_workarounds.c
View File

@ -1111,11 +1111,10 @@ icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
/* Wa_1607087056:icl,ehl,jsl */
if (IS_ICELAKE(i915) ||
IS_JSL_EHL_REVID(i915, EHL_REVID_A0, EHL_REVID_A0)) {
IS_JSL_EHL_REVID(i915, EHL_REVID_A0, EHL_REVID_A0))
wa_write_or(wal,
SLICE_UNIT_LEVEL_CLKGATE,
L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS);
}
}
static void