hwmon: (jc42) Consistently use bit and bitfield macros in the driver
Use BIT() and GENMASK() macros for defining the bitfields inside the registers. Also use FIELD_GET() and FIELD_PREP() where appropriate. This makes the coding style within the driver consistent. No functional changes intended. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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@ -10,6 +10,7 @@
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*/
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*/
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#include <linux/bitops.h>
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#include <linux/bitops.h>
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#include <linux/bitfield.h>
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#include <linux/module.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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@ -37,20 +38,19 @@ static const unsigned short normal_i2c[] = {
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#define JC42_REG_SMBUS 0x22 /* NXP and Atmel, possibly others? */
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#define JC42_REG_SMBUS 0x22 /* NXP and Atmel, possibly others? */
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/* Status bits in temperature register */
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/* Status bits in temperature register */
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#define JC42_ALARM_CRIT_BIT 15
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#define JC42_ALARM_CRIT BIT(15)
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#define JC42_ALARM_MAX_BIT 14
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#define JC42_ALARM_MAX BIT(14)
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#define JC42_ALARM_MIN_BIT 13
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#define JC42_ALARM_MIN BIT(13)
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/* Configuration register defines */
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/* Configuration register defines */
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#define JC42_CFG_CRIT_ONLY (1 << 2)
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#define JC42_CFG_CRIT_ONLY BIT(2)
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#define JC42_CFG_TCRIT_LOCK (1 << 6)
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#define JC42_CFG_TCRIT_LOCK BIT(6)
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#define JC42_CFG_EVENT_LOCK (1 << 7)
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#define JC42_CFG_EVENT_LOCK BIT(7)
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#define JC42_CFG_SHUTDOWN (1 << 8)
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#define JC42_CFG_SHUTDOWN BIT(8)
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#define JC42_CFG_HYST_SHIFT 9
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#define JC42_CFG_HYST_MASK GENMASK(10, 9)
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#define JC42_CFG_HYST_MASK (0x03 << 9)
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/* Capabilities */
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/* Capabilities */
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#define JC42_CAP_RANGE (1 << 2)
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#define JC42_CAP_RANGE BIT(2)
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/* Manufacturer IDs */
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/* Manufacturer IDs */
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#define ADT_MANID 0x11d4 /* Analog Devices */
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#define ADT_MANID 0x11d4 /* Analog Devices */
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@ -277,8 +277,8 @@ static int jc42_read(struct device *dev, enum hwmon_sensor_types type,
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break;
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break;
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temp = jc42_temp_from_reg(regval);
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temp = jc42_temp_from_reg(regval);
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hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
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hyst = jc42_hysteresis[FIELD_GET(JC42_CFG_HYST_MASK,
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>> JC42_CFG_HYST_SHIFT];
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data->config)];
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*val = temp - hyst;
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*val = temp - hyst;
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break;
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break;
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case hwmon_temp_crit_hyst:
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case hwmon_temp_crit_hyst:
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@ -288,8 +288,8 @@ static int jc42_read(struct device *dev, enum hwmon_sensor_types type,
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break;
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break;
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temp = jc42_temp_from_reg(regval);
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temp = jc42_temp_from_reg(regval);
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hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
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hyst = jc42_hysteresis[FIELD_GET(JC42_CFG_HYST_MASK,
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>> JC42_CFG_HYST_SHIFT];
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data->config)];
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*val = temp - hyst;
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*val = temp - hyst;
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break;
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break;
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case hwmon_temp_min_alarm:
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case hwmon_temp_min_alarm:
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@ -297,21 +297,21 @@ static int jc42_read(struct device *dev, enum hwmon_sensor_types type,
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if (ret)
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if (ret)
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break;
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break;
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*val = (regval >> JC42_ALARM_MIN_BIT) & 1;
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*val = FIELD_GET(JC42_ALARM_MIN, regval);
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break;
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break;
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case hwmon_temp_max_alarm:
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case hwmon_temp_max_alarm:
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ret = regmap_read(data->regmap, JC42_REG_TEMP, ®val);
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ret = regmap_read(data->regmap, JC42_REG_TEMP, ®val);
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if (ret)
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if (ret)
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break;
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break;
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*val = (regval >> JC42_ALARM_MAX_BIT) & 1;
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*val = FIELD_GET(JC42_ALARM_MAX, regval);
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break;
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break;
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case hwmon_temp_crit_alarm:
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case hwmon_temp_crit_alarm:
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ret = regmap_read(data->regmap, JC42_REG_TEMP, ®val);
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ret = regmap_read(data->regmap, JC42_REG_TEMP, ®val);
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if (ret)
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if (ret)
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break;
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break;
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*val = (regval >> JC42_ALARM_CRIT_BIT) & 1;
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*val = FIELD_GET(JC42_ALARM_CRIT, regval);
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break;
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break;
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default:
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default:
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ret = -EOPNOTSUPP;
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ret = -EOPNOTSUPP;
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@ -370,7 +370,7 @@ static int jc42_write(struct device *dev, enum hwmon_sensor_types type,
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hyst = 3; /* 6.0 degrees C */
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hyst = 3; /* 6.0 degrees C */
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}
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}
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data->config = (data->config & ~JC42_CFG_HYST_MASK) |
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data->config = (data->config & ~JC42_CFG_HYST_MASK) |
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(hyst << JC42_CFG_HYST_SHIFT);
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FIELD_PREP(JC42_CFG_HYST_MASK, hyst);
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ret = regmap_write(data->regmap, JC42_REG_CONFIG,
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ret = regmap_write(data->regmap, JC42_REG_CONFIG,
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data->config);
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data->config);
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break;
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break;
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