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net: dsa: mv88e6xxx: Correct spelling of define "ADRR" -> "ADDR"

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Because ADRR is not a thing.

Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Tobias Waldekranz 2021-04-21 14:04:52 +02:00 committed by David S. Miller
parent 0e91e9a5d6
commit 78e70dbcfd
2 changed files with 2 additions and 2 deletions
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2
drivers/net/dsa/mv88e6xxx/chip.c
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@ -1440,7 +1440,7 @@ static int mv88e6xxx_pvt_map(struct mv88e6xxx_chip *chip, int dev, int port)
* the special "LAG device" in the PVT, using * the special "LAG device" in the PVT, using
* the LAG ID as the port number. * the LAG ID as the port number.
*/ */
dev = MV88E6XXX_G2_PVT_ADRR_DEV_TRUNK; dev = MV88E6XXX_G2_PVT_ADDR_DEV_TRUNK;
port = dsa_lag_id(dst, dp->lag_dev); port = dsa_lag_id(dst, dp->lag_dev);
} }
} }

2
drivers/net/dsa/mv88e6xxx/global2.h
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@ -109,7 +109,7 @@
#define MV88E6XXX_G2_PVT_ADDR_OP_WRITE_PVLAN 0x3000 #define MV88E6XXX_G2_PVT_ADDR_OP_WRITE_PVLAN 0x3000
#define MV88E6XXX_G2_PVT_ADDR_OP_READ 0x4000 #define MV88E6XXX_G2_PVT_ADDR_OP_READ 0x4000
#define MV88E6XXX_G2_PVT_ADDR_PTR_MASK 0x01ff #define MV88E6XXX_G2_PVT_ADDR_PTR_MASK 0x01ff
#define MV88E6XXX_G2_PVT_ADRR_DEV_TRUNK 0x1f #define MV88E6XXX_G2_PVT_ADDR_DEV_TRUNK 0x1f
/* Offset 0x0C: Cross-chip Port VLAN Data Register */ /* Offset 0x0C: Cross-chip Port VLAN Data Register */
#define MV88E6XXX_G2_PVT_DATA 0x0c #define MV88E6XXX_G2_PVT_DATA 0x0c