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ARM: brcmstb: dts: add a reference DTS for Broadcom 7445

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Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.

Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Matt Porter <mporter@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
This commit is contained in:
Marc Carino 2014-02-26 01:27:21 -08:00 committed by Matt Porter
parent f80b71397d
commit 79187a8e24
3 changed files with 127 additions and 0 deletions
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2
arch/arm/boot/dts/Makefile
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@ -59,6 +59,8 @@ dtb-$(CONFIG_ARCH_BERLIN) += \
berlin2-sony-nsz-gs7.dtb \
berlin2cd-google-chromecast.dtb \
berlin2q-marvell-dmp.dtb
dtb-$(CONFIG_ARCH_BRCMSTB) += \
bcm7445-bcm97445svmb.dtb
dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
da850-evm.dtb
dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb

14
arch/arm/boot/dts/bcm7445-bcm97445svmb.dts Normal file
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@ -0,0 +1,14 @@
/dts-v1/;
#include "bcm7445.dtsi"
/ {
model = "Broadcom STB (bcm7445), SVMB reference board";
compatible = "brcm,bcm7445", "brcm,brcmstb";
memory {
device_type = "memory";
reg = <0x00 0x00000000 0x00 0x40000000>,
<0x00 0x40000000 0x00 0x40000000>,
<0x00 0x80000000 0x00 0x40000000>;
};
};

111
arch/arm/boot/dts/bcm7445.dtsi Normal file
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@ -0,0 +1,111 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ {
#address-cells = <2>;
#size-cells = <2>;
model = "Broadcom STB (bcm7445)";
compatible = "brcm,bcm7445", "brcm,brcmstb";
interrupt-parent = <&gic>;
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "brcm,brahma-b15";
device_type = "cpu";
enable-method = "brcm,brahma-b15";
reg = <0>;
};
cpu@1 {
compatible = "brcm,brahma-b15";
device_type = "cpu";
enable-method = "brcm,brahma-b15";
reg = <1>;
};
cpu@2 {
compatible = "brcm,brahma-b15";
device_type = "cpu";
enable-method = "brcm,brahma-b15";
reg = <2>;
};
cpu@3 {
compatible = "brcm,brahma-b15";
device_type = "cpu";
enable-method = "brcm,brahma-b15";
reg = <3>;
};
};
gic: interrupt-controller@ffd00000 {
compatible = "brcm,brahma-b15-gic", "arm,cortex-a15-gic";
reg = <0x00 0xffd01000 0x00 0x1000>,
<0x00 0xffd02000 0x00 0x2000>,
<0x00 0xffd04000 0x00 0x2000>,
<0x00 0xffd06000 0x00 0x2000>;
interrupt-controller;
#interrupt-cells = <3>;
};
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>;
};
rdb {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges = <0 0x00 0xf0000000 0x1000000>;
serial@40ab00 {
compatible = "ns16550a";
reg = <0x40ab00 0x20>;
reg-shift = <2>;
reg-io-width = <4>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <0x4d3f640>;
};
sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7445-sun-top-ctrl",
"syscon";
reg = <0x404000 0x51c>;
};
hif_cpubiuctrl: syscon@3e2400 {
compatible = "brcm,bcm7445-hif-cpubiuctrl",
"syscon";
reg = <0x3e2400 0x5b4>;
};
hif_continuation: syscon@452000 {
compatible = "brcm,bcm7445-hif-continuation",
"syscon";
reg = <0x452000 0x100>;
};
};
smpboot {
compatible = "brcm,brcmstb-smpboot";
syscon-cpu = <&hif_cpubiuctrl 0x88 0x178>;
syscon-cont = <&hif_continuation>;
};
reboot {
compatible = "brcm,brcmstb-reboot";
syscon = <&sun_top_ctrl 0x304 0x308>;
};
};