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RISC-V: Setup exception vector early

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The trap vector is set only in trap_init which may be too late in some
cases. Early ioremap/efi spits many warning messages which may be useful.

Setup the trap vector early so that any warning/bug can be handled before
generic code invokes trap_init.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
This commit is contained in:
Atish Patra 2020-07-15 16:30:06 -07:00 committed by Palmer Dabbelt
parent 925ac7b663
commit 79b1feba54
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GPG Key ID: 2E1319F35FBB1889
3 changed files with 10 additions and 10 deletions
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10
arch/riscv/kernel/head.S
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@ -77,10 +77,16 @@ relocate:
csrw CSR_SATP, a0 csrw CSR_SATP, a0
.align 2 .align 2
1: 1:
/* Set trap vector to spin forever to help debug */ /* Set trap vector to exception handler */
la a0, .Lsecondary_park la a0, handle_exception
csrw CSR_TVEC, a0 csrw CSR_TVEC, a0
/*
* Set sup0 scratch register to 0, indicating to exception vector that
* we are presently executing in kernel.
*/
csrw CSR_SCRATCH, zero
/* Reload the global pointer */ /* Reload the global pointer */
.option push .option push
.option norelax .option norelax

2
arch/riscv/kernel/smpboot.c
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@ -154,10 +154,10 @@ asmlinkage __visible void smp_callin(void)
mmgrab(mm); mmgrab(mm);
current->active_mm = mm; current->active_mm = mm;
trap_init();
notify_cpu_starting(curr_cpuid); notify_cpu_starting(curr_cpuid);
update_siblings_masks(curr_cpuid); update_siblings_masks(curr_cpuid);
set_cpu_online(curr_cpuid, 1); set_cpu_online(curr_cpuid, 1);
/* /*
* Remote TLB flushes are ignored while the CPU is offline, so emit * Remote TLB flushes are ignored while the CPU is offline, so emit
* a local TLB flush right now just in case. * a local TLB flush right now just in case.

8
arch/riscv/kernel/traps.c
View File

@ -174,13 +174,7 @@ int is_valid_bugaddr(unsigned long pc)
} }
#endif /* CONFIG_GENERIC_BUG */ #endif /* CONFIG_GENERIC_BUG */
/* stvec & scratch is already set from head.S */
void trap_init(void) void trap_init(void)
{ {
/*
* Set sup0 scratch register to 0, indicating to exception vector
* that we are presently executing in the kernel
*/
csr_write(CSR_SCRATCH, 0);
/* Set the exception vector address */
csr_write(CSR_TVEC, &handle_exception);
} }