KVM: arm/arm64: Emulate the EL1 phys timer registers
Emulate read and write operations to CNTP_TVAL, CNTP_CVAL and CNTP_CTL. Now VMs are able to use the EL1 physical timer. Signed-off-by: Jintack Lim <jintack@cs.columbia.edu> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -824,7 +824,14 @@ static bool access_cntp_tval(struct kvm_vcpu *vcpu,
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struct sys_reg_params *p,
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struct sys_reg_params *p,
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const struct sys_reg_desc *r)
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const struct sys_reg_desc *r)
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{
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{
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kvm_inject_undefined(vcpu);
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struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
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u64 now = kvm_phys_timer_read();
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if (p->is_write)
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ptimer->cnt_cval = p->regval + now;
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else
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p->regval = ptimer->cnt_cval - now;
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return true;
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return true;
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}
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}
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@ -832,7 +839,25 @@ static bool access_cntp_ctl(struct kvm_vcpu *vcpu,
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struct sys_reg_params *p,
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struct sys_reg_params *p,
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const struct sys_reg_desc *r)
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const struct sys_reg_desc *r)
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{
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{
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kvm_inject_undefined(vcpu);
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struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
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if (p->is_write) {
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/* ISTATUS bit is read-only */
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ptimer->cnt_ctl = p->regval & ~ARCH_TIMER_CTRL_IT_STAT;
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} else {
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u64 now = kvm_phys_timer_read();
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p->regval = ptimer->cnt_ctl;
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/*
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* Set ISTATUS bit if it's expired.
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* Note that according to ARMv8 ARM Issue A.k, ISTATUS bit is
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* UNKNOWN when ENABLE bit is 0, so we chose to set ISTATUS bit
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* regardless of ENABLE bit for our implementation convenience.
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*/
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if (ptimer->cnt_cval <= now)
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p->regval |= ARCH_TIMER_CTRL_IT_STAT;
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}
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return true;
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return true;
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}
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}
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@ -840,7 +865,13 @@ static bool access_cntp_cval(struct kvm_vcpu *vcpu,
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struct sys_reg_params *p,
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struct sys_reg_params *p,
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const struct sys_reg_desc *r)
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const struct sys_reg_desc *r)
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{
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{
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kvm_inject_undefined(vcpu);
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struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
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if (p->is_write)
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ptimer->cnt_cval = p->regval;
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else
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p->regval = ptimer->cnt_cval;
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return true;
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return true;
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}
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}
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@ -72,6 +72,8 @@ bool kvm_timer_should_fire(struct arch_timer_context *timer_ctx);
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void kvm_timer_schedule(struct kvm_vcpu *vcpu);
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void kvm_timer_schedule(struct kvm_vcpu *vcpu);
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void kvm_timer_unschedule(struct kvm_vcpu *vcpu);
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void kvm_timer_unschedule(struct kvm_vcpu *vcpu);
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u64 kvm_phys_timer_read(void);
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void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu);
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void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu);
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void kvm_timer_init_vhe(void);
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void kvm_timer_init_vhe(void);
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@ -40,7 +40,7 @@ void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu)
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vcpu_vtimer(vcpu)->active_cleared_last = false;
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vcpu_vtimer(vcpu)->active_cleared_last = false;
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}
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}
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static u64 kvm_phys_timer_read(void)
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u64 kvm_phys_timer_read(void)
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{
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{
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return timecounter->cc->read(timecounter->cc);
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return timecounter->cc->read(timecounter->cc);
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}
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}
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