x86/head/64: Load segment registers earlier
Make sure segments are properly set up before setting up an IDT and doing anything that might cause a #VC exception. This is later needed for early exception handling. Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://lkml.kernel.org/r/20200907131613.12703-32-joro@8bytes.org
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@ -166,6 +166,32 @@ SYM_CODE_START(secondary_startup_64)
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*/
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lgdt early_gdt_descr(%rip)
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/* set up data segments */
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xorl %eax,%eax
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movl %eax,%ds
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movl %eax,%ss
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movl %eax,%es
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/*
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* We don't really need to load %fs or %gs, but load them anyway
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* to kill any stale realmode selectors. This allows execution
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* under VT hardware.
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*/
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movl %eax,%fs
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movl %eax,%gs
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/* Set up %gs.
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*
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* The base of %gs always points to fixed_percpu_data. If the
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* stack protector canary is enabled, it is located at %gs:40.
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* Note that, on SMP, the boot cpu uses init data section until
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* the per cpu areas are set up.
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*/
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movl $MSR_GS_BASE,%ecx
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movl initial_gs(%rip),%eax
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movl initial_gs+4(%rip),%edx
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wrmsr
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/* Check if nx is implemented */
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movl $0x80000001, %eax
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cpuid
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@ -193,32 +219,6 @@ SYM_CODE_START(secondary_startup_64)
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pushq $0
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popfq
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/* set up data segments */
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xorl %eax,%eax
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movl %eax,%ds
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movl %eax,%ss
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movl %eax,%es
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/*
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* We don't really need to load %fs or %gs, but load them anyway
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* to kill any stale realmode selectors. This allows execution
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* under VT hardware.
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*/
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movl %eax,%fs
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movl %eax,%gs
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/* Set up %gs.
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*
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* The base of %gs always points to fixed_percpu_data. If the
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* stack protector canary is enabled, it is located at %gs:40.
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* Note that, on SMP, the boot cpu uses init data section until
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* the per cpu areas are set up.
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*/
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movl $MSR_GS_BASE,%ecx
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movl initial_gs(%rip),%eax
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movl initial_gs+4(%rip),%edx
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wrmsr
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/* rsi is pointer to real mode structure with interesting info.
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pass it to C */
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movq %rsi, %rdi
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