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ARM: SoC fixes for 3.12-rc

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A set of fixes for ARM platforms for 3.12. Among them:
 
 - A fix for build breakage in the MTD subsystem for some PXA devices.
   David Woodhouse has this patch in his for-next branch but has not been
   responding to our requests to send it up so here it is.
   I should have amended the commit message to describe the build failure for
   CONFIG_OF=n setups, but forgot and now it's down in the stack of commits.
 
 - Added device-tree for the BeagleBone Black. Turns out people have been
   using the older "regualar" bone DT for the newer boards, and there's
   risk of damaging hardware that way.
 
 - Misc DT and regular fixes for OMAP.
 
 - Fix to make the ST-Ericsson "snowball" boards boot with
   multi_v7_defconfig, and enable one of the ST-E reference boards on the
   same config.
 
 - Kconfig cleanup for u300 to hide submenus when the platform isn't
   enabled.
 
 - Enable ARM_ATAG_DTB_COMPAT to let firmware override command
   line when booting with an appended devicetree on non-DT-enabled
   firmware (needed to boot snowball).
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "A set of fixes for ARM platforms for 3.12.  Among them:

   - A fix for build breakage in the MTD subsystem for some PXA devices.
     David Woodhouse has this patch in his for-next branch but has not
     been responding to our requests to send it up so here it is.  I
     should have amended the commit message to describe the build
     failure for CONFIG_OF=n setups, but forgot and now it's down in the
     stack of commits.

   - Added device-tree for the BeagleBone Black.  Turns out people have
     been using the older "regualar" bone DT for the newer boards, and
     there's risk of damaging hardware that way.

   - Misc DT and regular fixes for OMAP.

   - Fix to make the ST-Ericsson "snowball" boards boot with
     multi_v7_defconfig, and enable one of the ST-E reference boards on
     the same config.

   - Kconfig cleanup for u300 to hide submenus when the platform isn't
     enabled.

   - Enable ARM_ATAG_DTB_COMPAT to let firmware override command line
     when booting with an appended devicetree on non-DT-enabled firmware
     (needed to boot snowball)"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits)
  ARM: multi_v7: add HREFv60 to multi_v7 defconfig
  ARM: OMAP2+: mux: fix trivial typo in name
  ARM: OMAP4 SMP: Corrected a typo fucntions to functions
  ARM: OMAP4: cpuidle: fix: call cpu_cluster_pm_exit conditionally
  mailbox: remove unnecessary platform_set_drvdata()
  ARM: mach-omap2: gpmc: Fix warning when CONFIG_ARM_LPAE=y
  ARM: OMAP: fix return value check in omap_device_build_from_dt()
  ARM: OMAP4: Fix clock_get error for GPMC during boot
  ARM: sa1100: collie.c: fall back to jedec_probe flash detection
  ARM: u300: hide submenus
  ARM: dts: igep00x0: Add pinmux configuration for MCBSP2
  ARM: dts: Fix muxing and regulator for wl12xx on the SDIO bus for blaze
  ARM: dts: Fix muxing and regulator for wl12xx on the SDIO bus for pandaboard
  mtd: nand: pxa3xx: Remove unneeded ifdef CONFIG_OF
  ARM: multi_v7_defconfig: enable ARM_ATAG_DTB_COMPAT
  ARM: ux500: disable outer cache debug
  ARM: dts: OMAP5: fix ocp2scp DTS data
  ARM: dts: OMAP5: fix reg property size
  ARM: dts: am335x-bone*: add DT for BeagleBone Black
  ARM: dts: omap3-beagle-xm: fix string error in compatible property
  ...
This commit is contained in:
Linus Torvalds 2013-09-19 18:49:08 -05:00
commit 7b9e3a6ac0
27 changed files with 418 additions and 289 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/Makefile
View File

@ -183,6 +183,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
am335x-evm.dtb \ am335x-evm.dtb \
am335x-evmsk.dtb \ am335x-evmsk.dtb \
am335x-bone.dtb \ am335x-bone.dtb \
am335x-boneblack.dtb \
am3517-evm.dtb \ am3517-evm.dtb \
am3517_mt_ventoux.dtb \ am3517_mt_ventoux.dtb \
am43x-epos-evm.dtb am43x-epos-evm.dtb

262
arch/arm/boot/dts/am335x-bone-common.dtsi Normal file
View File

@ -0,0 +1,262 @@
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/ {
model = "TI AM335x BeagleBone";
compatible = "ti,am335x-bone", "ti,am33xx";
cpus {
cpu@0 {
cpu0-supply = <&dcdc2_reg>;
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = "default";
pinctrl-0 = <&clkout2_pin>;
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
};
ocp {
uart0: serial@44e09000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
musb: usb@47400000 {
status = "okay";
control@44e10000 {
status = "okay";
};
usb-phy@47401300 {
status = "okay";
};
usb-phy@47401b00 {
status = "okay";
};
usb@47401000 {
status = "okay";
};
usb@47401800 {
status = "okay";
dr_mode = "host";
};
dma-controller@07402000 {
status = "okay";
};
};
i2c0: i2c@44e0b000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@24 {
reg = <0x24>;
};
};
};
leds {
pinctrl-names = "default";
pinctrl-0 = <&user_leds_s0>;
compatible = "gpio-leds";
led@2 {
label = "beaglebone:green:heartbeat";
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led@3 {
label = "beaglebone:green:mmc0";
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
led@4 {
label = "beaglebone:green:usr2";
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@5 {
label = "beaglebone:green:usr3";
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
};
/include/ "tps65217.dtsi"
&tps {
regulators {
dcdc1_reg: regulator@0 {
regulator-always-on;
};
dcdc2_reg: regulator@1 {
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1325000>;
regulator-boot-on;
regulator-always-on;
};
dcdc3_reg: regulator@2 {
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_core";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
ldo1_reg: regulator@3 {
regulator-always-on;
};
ldo2_reg: regulator@4 {
regulator-always-on;
};
ldo3_reg: regulator@5 {
regulator-always-on;
};
ldo4_reg: regulator@6 {
regulator-always-on;
};
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-mode = "mii";
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-mode = "mii";
};
&mac {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
};

256
arch/arm/boot/dts/am335x-bone.dts
View File

@ -8,258 +8,4 @@
/dts-v1/; /dts-v1/;
#include "am33xx.dtsi" #include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
/ {
model = "TI AM335x BeagleBone";
compatible = "ti,am335x-bone", "ti,am33xx";
cpus {
cpu@0 {
cpu0-supply = <&dcdc2_reg>;
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = "default";
pinctrl-0 = <&clkout2_pin>;
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
};
ocp {
uart0: serial@44e09000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
musb: usb@47400000 {
status = "okay";
control@44e10000 {
status = "okay";
};
usb-phy@47401300 {
status = "okay";
};
usb-phy@47401b00 {
status = "okay";
};
usb@47401000 {
status = "okay";
};
usb@47401800 {
status = "okay";
dr_mode = "host";
};
dma-controller@07402000 {
status = "okay";
};
};
i2c0: i2c@44e0b000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@24 {
reg = <0x24>;
};
};
};
leds {
pinctrl-names = "default";
pinctrl-0 = <&user_leds_s0>;
compatible = "gpio-leds";
led@2 {
label = "beaglebone:green:heartbeat";
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led@3 {
label = "beaglebone:green:mmc0";
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
led@4 {
label = "beaglebone:green:usr2";
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@5 {
label = "beaglebone:green:usr3";
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
};
/include/ "tps65217.dtsi"
&tps {
regulators {
dcdc1_reg: regulator@0 {
regulator-always-on;
};
dcdc2_reg: regulator@1 {
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1325000>;
regulator-boot-on;
regulator-always-on;
};
dcdc3_reg: regulator@2 {
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_core";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
ldo1_reg: regulator@3 {
regulator-always-on;
};
ldo2_reg: regulator@4 {
regulator-always-on;
};
ldo3_reg: regulator@5 {
regulator-always-on;
};
ldo4_reg: regulator@6 {
regulator-always-on;
};
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-mode = "mii";
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-mode = "mii";
};
&mac {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
};

17
arch/arm/boot/dts/am335x-boneblack.dts Normal file
View File

@ -0,0 +1,17 @@
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
&ldo3_reg {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};

6
arch/arm/boot/dts/imx27.dtsi
View File

@ -187,7 +187,7 @@
compatible = "fsl,imx27-cspi"; compatible = "fsl,imx27-cspi";
reg = <0x1000e000 0x1000>; reg = <0x1000e000 0x1000>;
interrupts = <16>; interrupts = <16>;
clocks = <&clks 53>, <&clks 53>; clocks = <&clks 53>, <&clks 60>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
}; };
@ -198,7 +198,7 @@
compatible = "fsl,imx27-cspi"; compatible = "fsl,imx27-cspi";
reg = <0x1000f000 0x1000>; reg = <0x1000f000 0x1000>;
interrupts = <15>; interrupts = <15>;
clocks = <&clks 52>, <&clks 52>; clocks = <&clks 52>, <&clks 60>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
}; };
@ -309,7 +309,7 @@
compatible = "fsl,imx27-cspi"; compatible = "fsl,imx27-cspi";
reg = <0x10017000 0x1000>; reg = <0x10017000 0x1000>;
interrupts = <6>; interrupts = <6>;
clocks = <&clks 51>, <&clks 51>; clocks = <&clks 51>, <&clks 60>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
}; };

2
arch/arm/boot/dts/imx51.dtsi
View File

@ -474,7 +474,7 @@
compatible = "fsl,imx51-pata", "fsl,imx27-pata"; compatible = "fsl,imx51-pata", "fsl,imx27-pata";
reg = <0x83fe0000 0x4000>; reg = <0x83fe0000 0x4000>;
interrupts = <70>; interrupts = <70>;
clocks = <&clks 161>; clocks = <&clks 172>;
status = "disabled"; status = "disabled";
}; };

4
arch/arm/boot/dts/imx6q-pinfunc.h
View File

@ -207,8 +207,8 @@
#define MX6QDL_PAD_EIM_D29__ECSPI4_SS0 0x0c8 0x3dc 0x824 0x2 0x1 #define MX6QDL_PAD_EIM_D29__ECSPI4_SS0 0x0c8 0x3dc 0x824 0x2 0x1
#define MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x0c8 0x3dc 0x924 0x4 0x1 #define MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x0c8 0x3dc 0x924 0x4 0x1
#define MX6QDL_PAD_EIM_D29__UART2_CTS_B 0x0c8 0x3dc 0x000 0x4 0x0 #define MX6QDL_PAD_EIM_D29__UART2_CTS_B 0x0c8 0x3dc 0x000 0x4 0x0
#define MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x0c4 0x3dc 0x000 0x4 0x0 #define MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x0c8 0x3dc 0x000 0x4 0x0
#define MX6QDL_PAD_EIM_D29__UART2_DTE_CTS_B 0x0c4 0x3dc 0x924 0x4 0x1 #define MX6QDL_PAD_EIM_D29__UART2_DTE_CTS_B 0x0c8 0x3dc 0x924 0x4 0x1
#define MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x0c8 0x3dc 0x000 0x5 0x0 #define MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x0c8 0x3dc 0x000 0x5 0x0
#define MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x0c8 0x3dc 0x8e4 0x6 0x0 #define MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x0c8 0x3dc 0x8e4 0x6 0x0
#define MX6QDL_PAD_EIM_D29__IPU1_DI0_PIN14 0x0c8 0x3dc 0x000 0x7 0x0 #define MX6QDL_PAD_EIM_D29__IPU1_DI0_PIN14 0x0c8 0x3dc 0x000 0x7 0x0

2
arch/arm/boot/dts/omap3-beagle-xm.dts
View File

@ -11,7 +11,7 @@
/ { / {
model = "TI OMAP3 BeagleBoard xM"; model = "TI OMAP3 BeagleBoard xM";
compatible = "ti,omap3-beagle-xm, ti,omap3-beagle", "ti,omap3"; compatible = "ti,omap3-beagle-xm", "ti,omap3-beagle", "ti,omap3";
cpus { cpus {
cpu@0 { cpu@0 {

14
arch/arm/boot/dts/omap3-igep.dtsi
View File

@ -48,6 +48,15 @@
>; >;
}; };
mcbsp2_pins: pinmux_mcbsp2_pins {
pinctrl-single,pins = <
0x10c (PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
0x10e (PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
0x110 (PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
0x112 (PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
>;
};
mmc1_pins: pinmux_mmc1_pins { mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
@ -93,6 +102,11 @@
clock-frequency = <400000>; clock-frequency = <400000>;
}; };
&mcbsp2 {
pinctrl-names = "default";
pinctrl-0 = <&mcbsp2_pins>;
};
&mmc1 { &mmc1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>; pinctrl-0 = <&mmc1_pins>;

46
arch/arm/boot/dts/omap4-panda-common.dtsi
View File

@ -107,6 +107,19 @@
*/ */
clock-frequency = <19200000>; clock-frequency = <19200000>;
}; };
/* regulator for wl12xx on sdio5 */
wl12xx_vmmc: wl12xx_vmmc {
pinctrl-names = "default";
pinctrl-0 = <&wl12xx_gpio>;
compatible = "regulator-fixed";
regulator-name = "vwl1271";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio2 11 0>;
startup-delay-us = <70000>;
enable-active-high;
};
}; };
&omap4_pmx_wkup { &omap4_pmx_wkup {
@ -235,6 +248,33 @@
0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */ 0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
>; >;
}; };
/*
* wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP
* REVISIT: Are the pull-ups needed for GPIO 48 and 49?
*/
wl12xx_gpio: pinmux_wl12xx_gpio {
pinctrl-single,pins = <
0x26 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 */
0x2c (PIN_OUTPUT | MUX_MODE3) /* gpmc_a22.gpio_46 */
0x30 (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a24.gpio_48 */
0x32 (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a25.gpio_49 */
>;
};
/* wl12xx GPIO inputs and SDIO pins */
wl12xx_pins: pinmux_wl12xx_pins {
pinctrl-single,pins = <
0x38 (PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */
0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
0x108 (PIN_OUTPUT | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */
0x112 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
>;
};
}; };
&i2c1 { &i2c1 {
@ -314,8 +354,12 @@
}; };
&mmc5 { &mmc5 {
ti,non-removable; pinctrl-names = "default";
pinctrl-0 = <&wl12xx_pins>;
vmmc-supply = <&wl12xx_vmmc>;
non-removable;
bus-width = <4>; bus-width = <4>;
cap-power-off-card;
}; };
&emif1 { &emif1 {

39
arch/arm/boot/dts/omap4-sdp.dts
View File

@ -140,6 +140,19 @@
"DMic", "Digital Mic", "DMic", "Digital Mic",
"Digital Mic", "Digital Mic1 Bias"; "Digital Mic", "Digital Mic1 Bias";
}; };
/* regulator for wl12xx on sdio5 */
wl12xx_vmmc: wl12xx_vmmc {
pinctrl-names = "default";
pinctrl-0 = <&wl12xx_gpio>;
compatible = "regulator-fixed";
regulator-name = "vwl1271";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio2 22 0>;
startup-delay-us = <70000>;
enable-active-high;
};
}; };
&omap4_pmx_wkup { &omap4_pmx_wkup {
@ -295,6 +308,26 @@
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */ 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
>; >;
}; };
/* wl12xx GPIO output for WLAN_EN */
wl12xx_gpio: pinmux_wl12xx_gpio {
pinctrl-single,pins = <
0x3c (PIN_OUTPUT | MUX_MODE3) /* gpmc_nwp.gpio_54 */
>;
};
/* wl12xx GPIO inputs and SDIO pins */
wl12xx_pins: pinmux_wl12xx_pins {
pinctrl-single,pins = <
0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
0x108 (PIN_OUTPUT | MUX_MODE3) /* sdmmc5_clk.sdmmc5_clk */
0x10a (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_cmd.sdmmc5_cmd */
0x10c (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat0.sdmmc5_dat0 */
0x10e (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat1.sdmmc5_dat1 */
0x110 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat2.sdmmc5_dat2 */
0x112 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat3.sdmmc5_dat3 */
>;
};
}; };
&i2c1 { &i2c1 {
@ -420,8 +453,12 @@
}; };
&mmc5 { &mmc5 {
pinctrl-names = "default";
pinctrl-0 = <&wl12xx_pins>;
vmmc-supply = <&wl12xx_vmmc>;
non-removable;
bus-width = <4>; bus-width = <4>;
ti,non-removable; cap-power-off-card;
}; };
&emif1 { &emif1 {

7
arch/arm/boot/dts/omap5.dtsi
View File

@ -637,7 +637,7 @@
omap_dwc3@4a020000 { omap_dwc3@4a020000 {
compatible = "ti,dwc3"; compatible = "ti,dwc3";
ti,hwmods = "usb_otg_ss"; ti,hwmods = "usb_otg_ss";
reg = <0x4a020000 0x1000>; reg = <0x4a020000 0x10000>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
@ -645,17 +645,18 @@
ranges; ranges;
dwc3@4a030000 { dwc3@4a030000 {
compatible = "snps,dwc3"; compatible = "snps,dwc3";
reg = <0x4a030000 0x1000>; reg = <0x4a030000 0x10000>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
usb-phy = <&usb2_phy>, <&usb3_phy>; usb-phy = <&usb2_phy>, <&usb3_phy>;
tx-fifo-resize; tx-fifo-resize;
}; };
}; };
ocp2scp { ocp2scp@4a080000 {
compatible = "ti,omap-ocp2scp"; compatible = "ti,omap-ocp2scp";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
reg = <0x4a080000 0x20>;
ranges; ranges;
ti,hwmods = "ocp2scp1"; ti,hwmods = "ocp2scp1";
usb2_phy: usb2phy@4a084000 { usb2_phy: usb2phy@4a084000 {

2
arch/arm/configs/multi_v7_defconfig
View File

@ -36,6 +36,7 @@ CONFIG_ARCH_TEGRA_114_SOC=y
CONFIG_TEGRA_PCI=y CONFIG_TEGRA_PCI=y
CONFIG_TEGRA_EMC_SCALING_ENABLE=y CONFIG_TEGRA_EMC_SCALING_ENABLE=y
CONFIG_ARCH_U8500=y CONFIG_ARCH_U8500=y
CONFIG_MACH_HREFV60=y
CONFIG_MACH_SNOWBALL=y CONFIG_MACH_SNOWBALL=y
CONFIG_MACH_UX500_DT=y CONFIG_MACH_UX500_DT=y
CONFIG_ARCH_VEXPRESS=y CONFIG_ARCH_VEXPRESS=y
@ -46,6 +47,7 @@ CONFIG_ARCH_ZYNQ=y
CONFIG_SMP=y CONFIG_SMP=y
CONFIG_HIGHPTE=y CONFIG_HIGHPTE=y
CONFIG_ARM_APPENDED_DTB=y CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_NET=y CONFIG_NET=y
CONFIG_UNIX=y CONFIG_UNIX=y
CONFIG_INET=y CONFIG_INET=y

1
arch/arm/mach-imx/clk-fixup-mux.c
View File

@ -90,6 +90,7 @@ struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
init.ops = &clk_fixup_mux_ops; init.ops = &clk_fixup_mux_ops;
init.parent_names = parents; init.parent_names = parents;
init.num_parents = num_parents; init.num_parents = num_parents;
init.flags = 0;
fixup_mux->mux.reg = reg; fixup_mux->mux.reg = reg;
fixup_mux->mux.shift = shift; fixup_mux->mux.shift = shift;

2
arch/arm/mach-imx/clk-imx51-imx53.c
View File

@ -397,7 +397,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
mx51_spdif_xtal_sel, ARRAY_SIZE(mx51_spdif_xtal_sel)); mx51_spdif_xtal_sel, ARRAY_SIZE(mx51_spdif_xtal_sel));
clk[spdif1_sel] = imx_clk_mux("spdif1_sel", MXC_CCM_CSCMR2, 2, 2, clk[spdif1_sel] = imx_clk_mux("spdif1_sel", MXC_CCM_CSCMR2, 2, 2,
spdif_sel, ARRAY_SIZE(spdif_sel)); spdif_sel, ARRAY_SIZE(spdif_sel));
clk[spdif1_pred] = imx_clk_divider("spdif1_podf", "spdif1_sel", MXC_CCM_CDCDR, 16, 3); clk[spdif1_pred] = imx_clk_divider("spdif1_pred", "spdif1_sel", MXC_CCM_CDCDR, 16, 3);
clk[spdif1_podf] = imx_clk_divider("spdif1_podf", "spdif1_pred", MXC_CCM_CDCDR, 9, 6); clk[spdif1_podf] = imx_clk_divider("spdif1_podf", "spdif1_pred", MXC_CCM_CDCDR, 9, 6);
clk[spdif1_com_sel] = imx_clk_mux("spdif1_com_sel", MXC_CCM_CSCMR2, 5, 1, clk[spdif1_com_sel] = imx_clk_mux("spdif1_com_sel", MXC_CCM_CSCMR2, 5, 1,
mx51_spdif1_com_sel, ARRAY_SIZE(mx51_spdif1_com_sel)); mx51_spdif1_com_sel, ARRAY_SIZE(mx51_spdif1_com_sel));

11
arch/arm/mach-imx/system.c
View File

@ -117,6 +117,17 @@ void __init imx_init_l2cache(void)
/* Configure the L2 PREFETCH and POWER registers */ /* Configure the L2 PREFETCH and POWER registers */
val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL); val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL);
val |= 0x70800000; val |= 0x70800000;
/*
* The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0
* The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2
* But according to ARM PL310 errata: 752271
* ID: 752271: Double linefill feature can cause data corruption
* Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2
* Workaround: The only workaround to this erratum is to disable the
* double linefill feature. This is the default behavior.
*/
if (cpu_is_imx6q())
val &= ~(1 << 30 | 1 << 23);
writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL); writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL);
val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN; val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN;
writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL); writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL);

2
arch/arm/mach-omap2/cclock44xx_data.c
View File

@ -1632,7 +1632,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck), CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck),
CLK(NULL, "auxclk5_ck", &auxclk5_ck), CLK(NULL, "auxclk5_ck", &auxclk5_ck),
CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck), CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck),
CLK("omap-gpmc", "fck", &dummy_ck), CLK("50000000.gpmc", "fck", &dummy_ck),
CLK("omap_i2c.1", "ick", &dummy_ck), CLK("omap_i2c.1", "ick", &dummy_ck),
CLK("omap_i2c.2", "ick", &dummy_ck), CLK("omap_i2c.2", "ick", &dummy_ck),
CLK("omap_i2c.3", "ick", &dummy_ck), CLK("omap_i2c.3", "ick", &dummy_ck),

2
arch/arm/mach-omap2/cpuidle44xx.c
View File

@ -143,7 +143,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
* Call idle CPU cluster PM exit notifier chain * Call idle CPU cluster PM exit notifier chain
* to restore GIC and wakeupgen context. * to restore GIC and wakeupgen context.
*/ */
if ((cx->mpu_state == PWRDM_POWER_RET) && if (dev->cpu == 0 && (cx->mpu_state == PWRDM_POWER_RET) &&
(cx->mpu_logic_state == PWRDM_POWER_OFF)) (cx->mpu_logic_state == PWRDM_POWER_OFF))
cpu_cluster_pm_exit(); cpu_cluster_pm_exit();

4
arch/arm/mach-omap2/gpmc.c
View File

@ -1491,8 +1491,8 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
*/ */
ret = gpmc_cs_remap(cs, res.start); ret = gpmc_cs_remap(cs, res.start);
if (ret < 0) { if (ret < 0) {
dev_err(&pdev->dev, "cannot remap GPMC CS %d to 0x%x\n", dev_err(&pdev->dev, "cannot remap GPMC CS %d to %pa\n",
cs, res.start); cs, &res.start);
goto err; goto err;
} }

2
arch/arm/mach-omap2/mux34xx.c
View File

@ -620,7 +620,7 @@ static struct omap_mux __initdata omap3_muxmodes[] = {
"uart1_rts", "ssi1_flag_tx", NULL, NULL, "uart1_rts", "ssi1_flag_tx", NULL, NULL,
"gpio_149", NULL, NULL, "safe_mode"), "gpio_149", NULL, NULL, "safe_mode"),
_OMAP3_MUXENTRY(UART1_RX, 151, _OMAP3_MUXENTRY(UART1_RX, 151,
"uart1_rx", "ss1_wake_tx", "mcbsp1_clkr", "mcspi4_clk", "uart1_rx", "ssi1_wake_tx", "mcbsp1_clkr", "mcspi4_clk",
"gpio_151", NULL, NULL, "safe_mode"), "gpio_151", NULL, NULL, "safe_mode"),
_OMAP3_MUXENTRY(UART1_TX, 148, _OMAP3_MUXENTRY(UART1_TX, 148,
"uart1_tx", "ssi1_dat_tx", NULL, NULL, "uart1_tx", "ssi1_dat_tx", NULL, NULL,

2
arch/arm/mach-omap2/omap-smp.c
View File

@ -1,5 +1,5 @@
/* /*
* OMAP4 SMP source file. It contains platform specific fucntions * OMAP4 SMP source file. It contains platform specific functions
* needed for the linux smp kernel. * needed for the linux smp kernel.
* *
* Copyright (C) 2009 Texas Instruments, Inc. * Copyright (C) 2009 Texas Instruments, Inc.

2
arch/arm/mach-omap2/omap_device.c
View File

@ -158,7 +158,7 @@ static int omap_device_build_from_dt(struct platform_device *pdev)
} }
od = omap_device_alloc(pdev, hwmods, oh_cnt); od = omap_device_alloc(pdev, hwmods, oh_cnt);
if (!od) { if (IS_ERR(od)) {
dev_err(&pdev->dev, "Cannot allocate omap_device for :%s\n", dev_err(&pdev->dev, "Cannot allocate omap_device for :%s\n",
oh_name); oh_name);
ret = PTR_ERR(od); ret = PTR_ERR(od);

2
arch/arm/mach-sa1100/collie.c
View File

@ -289,7 +289,7 @@ static void collie_flash_exit(void)
} }
static struct flash_platform_data collie_flash_data = { static struct flash_platform_data collie_flash_data = {
.map_name = "cfi_probe", .map_name = "jedec_probe",
.init = collie_flash_init, .init = collie_flash_init,
.set_vpp = collie_set_vpp, .set_vpp = collie_set_vpp,
.exit = collie_flash_exit, .exit = collie_flash_exit,

10
arch/arm/mach-u300/Kconfig
View File

@ -1,7 +1,3 @@
menu "ST-Ericsson AB U300/U335 Platform"
comment "ST-Ericsson Mobile Platform Products"
config ARCH_U300 config ARCH_U300
bool "ST-Ericsson U300 Series" if ARCH_MULTI_V5 bool "ST-Ericsson U300 Series" if ARCH_MULTI_V5
depends on MMU depends on MMU
@ -25,7 +21,9 @@ config ARCH_U300
help help
Support for ST-Ericsson U300 series mobile platforms. Support for ST-Ericsson U300 series mobile platforms.
comment "ST-Ericsson U300/U335 Feature Selections" if ARCH_U300
menu "ST-Ericsson AB U300/U335 Platform"
config MACH_U300 config MACH_U300
depends on ARCH_U300 depends on ARCH_U300
@ -53,3 +51,5 @@ config MACH_U300_SPIDUMMY
SPI framework and ARM PL022 support. SPI framework and ARM PL022 support.
endmenu endmenu
endif

1
arch/arm/mach-ux500/cache-l2x0.c
View File

@ -69,6 +69,7 @@ static int __init ux500_l2x0_init(void)
* some SMI service available. * some SMI service available.
*/ */
outer_cache.disable = NULL; outer_cache.disable = NULL;
outer_cache.set_debug = NULL;
return 0; return 0;
} }

1
drivers/mailbox/mailbox-omap2.c
View File

@ -325,7 +325,6 @@ static int omap2_mbox_remove(struct platform_device *pdev)
kfree(privblk); kfree(privblk);
kfree(mboxblk); kfree(mboxblk);
kfree(list); kfree(list);
platform_set_drvdata(pdev, NULL);
return 0; return 0;
} }

7
drivers/mtd/nand/pxa3xx_nand.c
View File

@ -1236,7 +1236,6 @@ static int pxa3xx_nand_remove(struct platform_device *pdev)
return 0; return 0;
} }
#ifdef CONFIG_OF
static struct of_device_id pxa3xx_nand_dt_ids[] = { static struct of_device_id pxa3xx_nand_dt_ids[] = {
{ {
.compatible = "marvell,pxa3xx-nand", .compatible = "marvell,pxa3xx-nand",
@ -1284,12 +1283,6 @@ static int pxa3xx_nand_probe_dt(struct platform_device *pdev)
return 0; return 0;
} }
#else
static inline int pxa3xx_nand_probe_dt(struct platform_device *pdev)
{
return 0;
}
#endif
static int pxa3xx_nand_probe(struct platform_device *pdev) static int pxa3xx_nand_probe(struct platform_device *pdev)
{ {