Merge branch 'upstream-greg' of gregkh@master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev
This commit is contained in:
commit
7bf13484d2
@ -390,7 +390,8 @@ static struct ata_port_info piix_port_info[] = {
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/* ich5_sata */
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{
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.sht = &piix_sht,
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.host_flags = ATA_FLAG_SATA | PIIX_FLAG_CHECKINTR,
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.host_flags = ATA_FLAG_SATA | PIIX_FLAG_CHECKINTR |
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PIIX_FLAG_IGNORE_PCS,
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.pio_mask = 0x1f, /* pio0-4 */
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.mwdma_mask = 0x07, /* mwdma0-2 */
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.udma_mask = 0x7f, /* udma0-6 */
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@ -467,6 +468,11 @@ MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, piix_pci_tbl);
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MODULE_VERSION(DRV_VERSION);
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static int force_pcs = 0;
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module_param(force_pcs, int, 0444);
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MODULE_PARM_DESC(force_pcs, "force honoring or ignoring PCS to work around "
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"device mis-detection (0=default, 1=ignore PCS, 2=honor PCS)");
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/**
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* piix_pata_cbl_detect - Probe host controller cable detect info
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* @ap: Port for which cable detect info is desired
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@ -531,27 +537,25 @@ static void piix_pata_error_handler(struct ata_port *ap)
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}
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/**
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* piix_sata_prereset - prereset for SATA host controller
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* piix_sata_present_mask - determine present mask for SATA host controller
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* @ap: Target port
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*
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* Reads and configures SATA PCI device's PCI config register
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* Port Configuration and Status (PCS) to determine port and
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* device availability. Return -ENODEV to skip reset if no
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* device is present.
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* Reads SATA PCI device's PCI config register Port Configuration
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* and Status (PCS) to determine port and device availability.
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*
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* LOCKING:
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* None (inherited from caller).
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*
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* RETURNS:
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* 0 if device is present, -ENODEV otherwise.
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* determined present_mask
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*/
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static int piix_sata_prereset(struct ata_port *ap)
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static unsigned int piix_sata_present_mask(struct ata_port *ap)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
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struct piix_host_priv *hpriv = ap->host_set->private_data;
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const unsigned int *map = hpriv->map;
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int base = 2 * ap->hard_port_no;
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unsigned int present = 0;
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unsigned int present_mask = 0;
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int port, i;
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u16 pcs;
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@ -564,24 +568,52 @@ static int piix_sata_prereset(struct ata_port *ap)
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continue;
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if ((ap->flags & PIIX_FLAG_IGNORE_PCS) ||
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(pcs & 1 << (hpriv->map_db->present_shift + port)))
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present = 1;
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present_mask |= 1 << i;
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}
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DPRINTK("ata%u: LEAVE, pcs=0x%x present=0x%x\n",
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ap->id, pcs, present);
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DPRINTK("ata%u: LEAVE, pcs=0x%x present_mask=0x%x\n",
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ap->id, pcs, present_mask);
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if (!present) {
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ata_port_printk(ap, KERN_INFO, "SATA port has no device.\n");
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ap->eh_context.i.action &= ~ATA_EH_RESET_MASK;
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return 0;
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return present_mask;
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}
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/**
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* piix_sata_softreset - reset SATA host port via ATA SRST
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* @ap: port to reset
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* @classes: resulting classes of attached devices
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*
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* Reset SATA host port via ATA SRST. On controllers with
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* reliable PCS present bits, the bits are used to determine
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* device presence.
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*
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* LOCKING:
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* Kernel thread context (may sleep)
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*
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* RETURNS:
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* 0 on success, -errno otherwise.
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*/
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static int piix_sata_softreset(struct ata_port *ap, unsigned int *classes)
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{
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unsigned int present_mask;
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int i, rc;
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present_mask = piix_sata_present_mask(ap);
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rc = ata_std_softreset(ap, classes);
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if (rc)
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return rc;
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for (i = 0; i < ATA_MAX_DEVICES; i++) {
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if (!(present_mask & (1 << i)))
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classes[i] = ATA_DEV_NONE;
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}
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return ata_std_prereset(ap);
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return 0;
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}
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static void piix_sata_error_handler(struct ata_port *ap)
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{
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ata_bmdma_drive_eh(ap, piix_sata_prereset, ata_std_softreset, NULL,
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ata_bmdma_drive_eh(ap, ata_std_prereset, piix_sata_softreset, NULL,
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ata_std_postreset);
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}
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@ -785,6 +817,7 @@ static int __devinit piix_check_450nx_errata(struct pci_dev *ata_dev)
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}
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static void __devinit piix_init_pcs(struct pci_dev *pdev,
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struct ata_port_info *pinfo,
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const struct piix_map_db *map_db)
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{
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u16 pcs, new_pcs;
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@ -798,6 +831,18 @@ static void __devinit piix_init_pcs(struct pci_dev *pdev,
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pci_write_config_word(pdev, ICH5_PCS, new_pcs);
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msleep(150);
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}
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if (force_pcs == 1) {
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dev_printk(KERN_INFO, &pdev->dev,
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"force ignoring PCS (0x%x)\n", new_pcs);
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pinfo[0].host_flags |= PIIX_FLAG_IGNORE_PCS;
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pinfo[1].host_flags |= PIIX_FLAG_IGNORE_PCS;
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} else if (force_pcs == 2) {
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dev_printk(KERN_INFO, &pdev->dev,
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"force honoring PCS (0x%x)\n", new_pcs);
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pinfo[0].host_flags &= ~PIIX_FLAG_IGNORE_PCS;
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pinfo[1].host_flags &= ~PIIX_FLAG_IGNORE_PCS;
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}
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}
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static void __devinit piix_init_sata_map(struct pci_dev *pdev,
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@ -906,7 +951,8 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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if (host_flags & ATA_FLAG_SATA) {
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piix_init_sata_map(pdev, port_info,
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piix_map_db_table[ent->driver_data]);
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piix_init_pcs(pdev, piix_map_db_table[ent->driver_data]);
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piix_init_pcs(pdev, port_info,
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piix_map_db_table[ent->driver_data]);
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}
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/* On ICH5, some BIOSen disable the interrupt using the
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@ -2746,7 +2746,7 @@ int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
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if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
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return rc;
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scontrol = (scontrol & 0x0f0) | 0x302;
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scontrol = (scontrol & 0x0f0) | 0x304;
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if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
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return rc;
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@ -183,7 +183,8 @@ static struct ata_port_info adma_port_info[] = {
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{
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.sht = &adma_ata_sht,
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.host_flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST |
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ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO,
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ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO |
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ATA_FLAG_PIO_POLLING,
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.pio_mask = 0x10, /* pio4 */
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.udma_mask = 0x1f, /* udma0-4 */
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.port_ops = &adma_ata_ops,
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@ -74,6 +74,7 @@ enum {
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static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
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static u32 svia_scr_read (struct ata_port *ap, unsigned int sc_reg);
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static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
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static void vt6420_error_handler(struct ata_port *ap);
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static const struct pci_device_id svia_pci_tbl[] = {
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{ 0x1106, 0x3149, PCI_ANY_ID, PCI_ANY_ID, 0, 0, vt6420 },
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@ -107,7 +108,38 @@ static struct scsi_host_template svia_sht = {
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.bios_param = ata_std_bios_param,
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};
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static const struct ata_port_operations svia_sata_ops = {
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static const struct ata_port_operations vt6420_sata_ops = {
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.port_disable = ata_port_disable,
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.tf_load = ata_tf_load,
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.tf_read = ata_tf_read,
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.check_status = ata_check_status,
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.exec_command = ata_exec_command,
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.dev_select = ata_std_dev_select,
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.bmdma_setup = ata_bmdma_setup,
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.bmdma_start = ata_bmdma_start,
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.bmdma_stop = ata_bmdma_stop,
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.bmdma_status = ata_bmdma_status,
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.qc_prep = ata_qc_prep,
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.qc_issue = ata_qc_issue_prot,
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.data_xfer = ata_pio_data_xfer,
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.freeze = ata_bmdma_freeze,
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.thaw = ata_bmdma_thaw,
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.error_handler = vt6420_error_handler,
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.post_internal_cmd = ata_bmdma_post_internal_cmd,
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.irq_handler = ata_interrupt,
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.irq_clear = ata_bmdma_irq_clear,
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.port_start = ata_port_start,
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.port_stop = ata_port_stop,
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.host_stop = ata_host_stop,
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};
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static const struct ata_port_operations vt6421_sata_ops = {
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.port_disable = ata_port_disable,
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.tf_load = ata_tf_load,
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@ -141,13 +173,13 @@ static const struct ata_port_operations svia_sata_ops = {
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.host_stop = ata_host_stop,
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};
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static struct ata_port_info svia_port_info = {
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static struct ata_port_info vt6420_port_info = {
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.sht = &svia_sht,
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.host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
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.pio_mask = 0x1f,
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.mwdma_mask = 0x07,
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.udma_mask = 0x7f,
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.port_ops = &svia_sata_ops,
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.port_ops = &vt6420_sata_ops,
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};
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MODULE_AUTHOR("Jeff Garzik");
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@ -170,6 +202,81 @@ static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
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outl(val, ap->ioaddr.scr_addr + (4 * sc_reg));
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}
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/**
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* vt6420_prereset - prereset for vt6420
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* @ap: target ATA port
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*
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* SCR registers on vt6420 are pieces of shit and may hang the
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* whole machine completely if accessed with the wrong timing.
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* To avoid such catastrophe, vt6420 doesn't provide generic SCR
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* access operations, but uses SStatus and SControl only during
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* boot probing in controlled way.
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*
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* As the old (pre EH update) probing code is proven to work, we
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* strictly follow the access pattern.
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*
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* LOCKING:
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* Kernel thread context (may sleep)
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*
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* RETURNS:
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* 0 on success, -errno otherwise.
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*/
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static int vt6420_prereset(struct ata_port *ap)
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{
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struct ata_eh_context *ehc = &ap->eh_context;
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unsigned long timeout = jiffies + (HZ * 5);
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u32 sstatus, scontrol;
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int online;
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/* don't do any SCR stuff if we're not loading */
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if (!ATA_PFLAG_LOADING)
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goto skip_scr;
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/* Resume phy. This is the old resume sequence from
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* __sata_phy_reset().
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*/
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svia_scr_write(ap, SCR_CONTROL, 0x300);
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svia_scr_read(ap, SCR_CONTROL); /* flush */
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/* wait for phy to become ready, if necessary */
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do {
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msleep(200);
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if ((svia_scr_read(ap, SCR_STATUS) & 0xf) != 1)
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break;
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} while (time_before(jiffies, timeout));
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/* open code sata_print_link_status() */
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sstatus = svia_scr_read(ap, SCR_STATUS);
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scontrol = svia_scr_read(ap, SCR_CONTROL);
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online = (sstatus & 0xf) == 0x3;
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ata_port_printk(ap, KERN_INFO,
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"SATA link %s 1.5 Gbps (SStatus %X SControl %X)\n",
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online ? "up" : "down", sstatus, scontrol);
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/* SStatus is read one more time */
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svia_scr_read(ap, SCR_STATUS);
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if (!online) {
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/* tell EH to bail */
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ehc->i.action &= ~ATA_EH_RESET_MASK;
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return 0;
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}
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skip_scr:
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/* wait for !BSY */
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ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
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return 0;
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}
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static void vt6420_error_handler(struct ata_port *ap)
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{
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return ata_bmdma_drive_eh(ap, vt6420_prereset, ata_std_softreset,
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NULL, ata_std_postreset);
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}
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static const unsigned int svia_bar_sizes[] = {
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8, 4, 8, 4, 16, 256
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};
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@ -210,7 +317,7 @@ static void vt6421_init_addrs(struct ata_probe_ent *probe_ent,
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static struct ata_probe_ent *vt6420_init_probe_ent(struct pci_dev *pdev)
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{
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struct ata_probe_ent *probe_ent;
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struct ata_port_info *ppi = &svia_port_info;
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struct ata_port_info *ppi = &vt6420_port_info;
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probe_ent = ata_pci_init_native_mode(pdev, &ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
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if (!probe_ent)
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@ -239,7 +346,7 @@ static struct ata_probe_ent *vt6421_init_probe_ent(struct pci_dev *pdev)
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probe_ent->sht = &svia_sht;
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probe_ent->host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY;
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probe_ent->port_ops = &svia_sata_ops;
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probe_ent->port_ops = &vt6421_sata_ops;
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probe_ent->n_ports = N_PORTS;
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probe_ent->irq = pdev->irq;
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probe_ent->irq_flags = IRQF_SHARED;
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