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arm64: dts: qcom: Add msm8916 CoreSight components

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Add initial set of CoreSight components found on Qualcomm msm8916 and
apq8016 based platforms, including the DragonBoard 410c board.

Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This commit is contained in:
Ivan T. Ivanov 2017-01-11 17:59:11 +02:00 committed by Andy Gross
parent 3a52153975
commit 7c10da3736
1 changed files with 240 additions and 0 deletions
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240
arch/arm64/boot/dts/qcom/msm8916.dtsi
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@ -927,6 +927,246 @@
};
};
};
tpiu@820000 {
compatible = "arm,coresight-tpiu", "arm,primecell";
reg = <0x820000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
port {
tpiu_in: endpoint {
slave-mode;
remote-endpoint = <&replicator_out1>;
};
};
};
funnel@821000 {
compatible = "arm,coresight-funnel", "arm,primecell";
reg = <0x821000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
ports {
#address-cells = <1>;
#size-cells = <0>;
/*
* Not described input ports:
* 0 - connected to Resource and Power Manger CPU ETM
* 1 - not-connected
* 2 - connected to Modem CPU ETM
* 3 - not-connected
* 5 - not-connected
* 6 - connected trought funnel to Wireless CPU ETM
* 7 - connected to STM component
*/
port@4 {
reg = <4>;
funnel0_in4: endpoint {
slave-mode;
remote-endpoint = <&funnel1_out>;
};
};
port@8 {
reg = <0>;
funnel0_out: endpoint {
remote-endpoint = <&etf_in>;
};
};
};
};
replicator@824000 {
compatible = "qcom,coresight-replicator1x", "arm,primecell";
reg = <0x824000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
replicator_out0: endpoint {
remote-endpoint = <&etr_in>;
};
};
port@1 {
reg = <1>;
replicator_out1: endpoint {
remote-endpoint = <&tpiu_in>;
};
};
port@2 {
reg = <0>;
replicator_in: endpoint {
slave-mode;
remote-endpoint = <&etf_out>;
};
};
};
};
etf@825000 {
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0x825000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
etf_out: endpoint {
slave-mode;
remote-endpoint = <&funnel0_out>;
};
};
port@1 {
reg = <0>;
etf_in: endpoint {
remote-endpoint = <&replicator_in>;
};
};
};
};
etr@826000 {
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0x826000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
port {
etr_in: endpoint {
slave-mode;
remote-endpoint = <&replicator_out0>;
};
};
};
funnel@841000 { /* APSS funnel only 4 inputs are used */
compatible = "arm,coresight-funnel", "arm,primecell";
reg = <0x841000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
funnel1_in0: endpoint {
slave-mode;
remote-endpoint = <&etm0_out>;
};
};
port@1 {
reg = <1>;
funnel1_in1: endpoint {
slave-mode;
remote-endpoint = <&etm1_out>;
};
};
port@2 {
reg = <2>;
funnel1_in2: endpoint {
slave-mode;
remote-endpoint = <&etm2_out>;
};
};
port@3 {
reg = <3>;
funnel1_in3: endpoint {
slave-mode;
remote-endpoint = <&etm3_out>;
};
};
port@4 {
reg = <0>;
funnel1_out: endpoint {
remote-endpoint = <&funnel0_in4>;
};
};
};
};
etm@85c000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0x85c000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
cpu = <&CPU0>;
port {
etm0_out: endpoint {
remote-endpoint = <&funnel1_in0>;
};
};
};
etm@85d000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0x85d000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
cpu = <&CPU1>;
port {
etm1_out: endpoint {
remote-endpoint = <&funnel1_in1>;
};
};
};
etm@85e000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0x85e000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
cpu = <&CPU2>;
port {
etm2_out: endpoint {
remote-endpoint = <&funnel1_in2>;
};
};
};
etm@85f000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0x85f000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
cpu = <&CPU3>;
port {
etm3_out: endpoint {
remote-endpoint = <&funnel1_in3>;
};
};
};
};
smd {