net: dsa: add a second tagger for Ocelot switches based on tag_8021q
There are use cases for which the existing tagger, based on the NPI (Node Processor Interface) functionality, is insufficient. Namely: - Frames injected through the NPI port bypass the frame analyzer, so no source address learning is performed, no TSN stream classification, etc. - Flow control is not functional over an NPI port (PAUSE frames are encapsulated in the same Extraction Frame Header as all other frames) - There can be at most one NPI port configured for an Ocelot switch. But in NXP LS1028A and T1040 there are two Ethernet CPU ports. The non-NPI port is currently either disabled, or operated as a plain user port (albeit an internally-facing one). Having the ability to configure the two CPU ports symmetrically could pave the way for e.g. creating a LAG between them, to increase bandwidth seamlessly for the system. So there is a desire to have an alternative to the NPI mode. This change keeps the default tagger for the Seville and Felix switches as "ocelot", but it can be changed via the following device attribute: echo ocelot-8021q > /sys/class/<dsa-master>/dsa/tagging Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -12859,6 +12859,7 @@ F: drivers/net/dsa/ocelot/*
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F: drivers/net/ethernet/mscc/
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F: include/soc/mscc/ocelot*
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F: net/dsa/tag_ocelot.c
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F: net/dsa/tag_ocelot_8021q.c
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F: tools/testing/selftests/drivers/net/ocelot/*
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OCXL (Open Coherent Accelerator Processor Interface OpenCAPI) DRIVER
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@ -6,6 +6,7 @@ config NET_DSA_MSCC_FELIX
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depends on NET_VENDOR_FREESCALE
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depends on HAS_IOMEM
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select MSCC_OCELOT_SWITCH_LIB
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select NET_DSA_TAG_OCELOT_8021Q
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select NET_DSA_TAG_OCELOT
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select FSL_ENETC_MDIO
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select PCS_LYNX
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@ -19,6 +20,7 @@ config NET_DSA_MSCC_SEVILLE
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depends on NET_VENDOR_MICROSEMI
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depends on HAS_IOMEM
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select MSCC_OCELOT_SWITCH_LIB
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select NET_DSA_TAG_OCELOT_8021Q
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select NET_DSA_TAG_OCELOT
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select PCS_LYNX
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help
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@ -47,6 +47,7 @@ struct phylink_link_state;
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#define DSA_TAG_PROTO_RTL4_A_VALUE 17
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#define DSA_TAG_PROTO_HELLCREEK_VALUE 18
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#define DSA_TAG_PROTO_XRS700X_VALUE 19
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#define DSA_TAG_PROTO_OCELOT_8021Q_VALUE 20
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enum dsa_tag_protocol {
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DSA_TAG_PROTO_NONE = DSA_TAG_PROTO_NONE_VALUE,
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@ -69,6 +70,7 @@ enum dsa_tag_protocol {
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DSA_TAG_PROTO_RTL4_A = DSA_TAG_PROTO_RTL4_A_VALUE,
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DSA_TAG_PROTO_HELLCREEK = DSA_TAG_PROTO_HELLCREEK_VALUE,
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DSA_TAG_PROTO_XRS700X = DSA_TAG_PROTO_XRS700X_VALUE,
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DSA_TAG_PROTO_OCELOT_8021Q = DSA_TAG_PROTO_OCELOT_8021Q_VALUE,
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};
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struct packet_type;
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@ -105,11 +105,26 @@ config NET_DSA_TAG_RTL4_A
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the Realtek RTL8366RB.
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config NET_DSA_TAG_OCELOT
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tristate "Tag driver for Ocelot family of switches"
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tristate "Tag driver for Ocelot family of switches, using NPI port"
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select PACKING
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help
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Say Y or M if you want to enable support for tagging frames for the
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Ocelot switches (VSC7511, VSC7512, VSC7513, VSC7514, VSC9959).
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Say Y or M if you want to enable NPI tagging for the Ocelot switches
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(VSC7511, VSC7512, VSC7513, VSC7514, VSC9953, VSC9959). In this mode,
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the frames over the Ethernet CPU port are prepended with a
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hardware-defined injection/extraction frame header. Flow control
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(PAUSE frames) over the CPU port is not supported when operating in
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this mode.
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config NET_DSA_TAG_OCELOT_8021Q
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tristate "Tag driver for Ocelot family of switches, using VLAN"
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select NET_DSA_TAG_8021Q
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help
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Say Y or M if you want to enable support for tagging frames with a
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custom VLAN-based header. Frames that require timestamping, such as
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PTP, are not delivered over Ethernet but over register-based MMIO.
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Flow control over the CPU port is functional in this mode. When using
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this mode, less TCAM resources (VCAP IS1, IS2, ES0) are available for
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use with tc-flower.
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config NET_DSA_TAG_QCA
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tristate "Tag driver for Qualcomm Atheros QCA8K switches"
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@ -15,6 +15,7 @@ obj-$(CONFIG_NET_DSA_TAG_RTL4_A) += tag_rtl4_a.o
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obj-$(CONFIG_NET_DSA_TAG_LAN9303) += tag_lan9303.o
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obj-$(CONFIG_NET_DSA_TAG_MTK) += tag_mtk.o
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obj-$(CONFIG_NET_DSA_TAG_OCELOT) += tag_ocelot.o
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obj-$(CONFIG_NET_DSA_TAG_OCELOT_8021Q) += tag_ocelot_8021q.o
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obj-$(CONFIG_NET_DSA_TAG_QCA) += tag_qca.o
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obj-$(CONFIG_NET_DSA_TAG_SJA1105) += tag_sja1105.o
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obj-$(CONFIG_NET_DSA_TAG_TRAILER) += tag_trailer.o
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68
net/dsa/tag_ocelot_8021q.c
Normal file
68
net/dsa/tag_ocelot_8021q.c
Normal file
@ -0,0 +1,68 @@
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright 2020-2021 NXP Semiconductors
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*
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* An implementation of the software-defined tag_8021q.c tagger format, which
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* also preserves full functionality under a vlan_filtering bridge. It does
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* this by using the TCAM engines for:
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* - pushing the RX VLAN as a second, outer tag, on egress towards the CPU port
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* - redirecting towards the correct front port based on TX VLAN and popping
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* that on egress
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*/
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#include <linux/dsa/8021q.h>
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#include "dsa_priv.h"
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static struct sk_buff *ocelot_xmit(struct sk_buff *skb,
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struct net_device *netdev)
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{
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struct dsa_port *dp = dsa_slave_to_port(netdev);
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u16 tx_vid = dsa_8021q_tx_vid(dp->ds, dp->index);
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u16 queue_mapping = skb_get_queue_mapping(skb);
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u8 pcp = netdev_txq_to_tc(netdev, queue_mapping);
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return dsa_8021q_xmit(skb, netdev, ETH_P_8021Q,
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((pcp << VLAN_PRIO_SHIFT) | tx_vid));
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}
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static struct sk_buff *ocelot_rcv(struct sk_buff *skb,
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struct net_device *netdev,
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struct packet_type *pt)
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{
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int src_port, switch_id, qos_class;
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u16 vid, tci;
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skb_push_rcsum(skb, ETH_HLEN);
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if (skb_vlan_tag_present(skb)) {
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tci = skb_vlan_tag_get(skb);
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__vlan_hwaccel_clear_tag(skb);
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} else {
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__skb_vlan_pop(skb, &tci);
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}
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skb_pull_rcsum(skb, ETH_HLEN);
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vid = tci & VLAN_VID_MASK;
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src_port = dsa_8021q_rx_source_port(vid);
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switch_id = dsa_8021q_rx_switch_id(vid);
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qos_class = (tci & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
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skb->dev = dsa_master_find_slave(netdev, switch_id, src_port);
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if (!skb->dev)
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return NULL;
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skb->offload_fwd_mark = 1;
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skb->priority = qos_class;
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return skb;
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}
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static const struct dsa_device_ops ocelot_8021q_netdev_ops = {
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.name = "ocelot-8021q",
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.proto = DSA_TAG_PROTO_OCELOT_8021Q,
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.xmit = ocelot_xmit,
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.rcv = ocelot_rcv,
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.overhead = VLAN_HLEN,
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};
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_OCELOT_8021Q);
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module_dsa_tag_driver(ocelot_8021q_netdev_ops);
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