octeontx2-af: Define all NIX_AF_RX_DEF_* registers
In order to support all NIX specific valid length errors and checksum errors on Rx, Update all NIX_AF_RX_DEF_* registers. Also sorted all registers in HRM definition order. Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -2593,18 +2593,33 @@ int rvu_nix_init(struct rvu *rvu)
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if (err)
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return err;
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/* Config Outer L2, IP, TCP and UDP's NPC layer info.
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/* Config Outer/Inner L2, IP, TCP, UDP and SCTP NPC layer info.
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* This helps HW protocol checker to identify headers
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* and validate length and checksums.
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*/
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rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OL2,
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(NPC_LID_LA << 8) | (NPC_LT_LA_ETHER << 4) | 0x0F);
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rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OUDP,
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(NPC_LID_LD << 8) | (NPC_LT_LD_UDP << 4) | 0x0F);
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rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OTCP,
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(NPC_LID_LD << 8) | (NPC_LT_LD_TCP << 4) | 0x0F);
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rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OIP4,
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(NPC_LID_LC << 8) | (NPC_LT_LC_IP << 4) | 0x0F);
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rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IIP4,
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(NPC_LID_LF << 8) | (NPC_LT_LF_TU_IP << 4) | 0x0F);
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rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OIP6,
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(NPC_LID_LC << 8) | (NPC_LT_LC_IP6 << 4) | 0x0F);
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rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IIP6,
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(NPC_LID_LF << 8) | (NPC_LT_LF_TU_IP6 << 4) | 0x0F);
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rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OTCP,
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(NPC_LID_LD << 8) | (NPC_LT_LD_TCP << 4) | 0x0F);
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rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_ITCP,
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(NPC_LID_LG << 8) | (NPC_LT_LG_TU_TCP << 4) | 0x0F);
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rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OUDP,
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(NPC_LID_LD << 8) | (NPC_LT_LD_UDP << 4) | 0x0F);
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rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IUDP,
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(NPC_LID_LG << 8) | (NPC_LT_LG_TU_UDP << 4) | 0x0F);
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rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OSCTP,
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(NPC_LID_LD << 8) | (NPC_LT_LD_SCTP << 4) | 0x0F);
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rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_ISCTP,
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(NPC_LID_LG << 8) | (NPC_LT_LG_TU_SCTP << 4) |
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0x0F);
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err = nix_rx_flowkey_alg_cfg(rvu, blkaddr);
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if (err)
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