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PCI: Document the Capability accessor RMW improvements

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Documentation claims port service drivers should play nice with respect to
PCIe Capability changes, but the concurrency control is now provided in the
Capability accessors as long as the correct ones are used.

Update the documention to match the RMW accessor behavior.

Link: https://lore.kernel.org/r/20230717120503.15276-12-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Ilpo Järvinen 2023-07-17 15:05:03 +03:00 committed by Bjorn Helgaas
parent f139492a09
commit 7cd23f6c72
1 changed files with 9 additions and 5 deletions
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14
Documentation/PCI/pciebus-howto.rst
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@ -213,8 +213,12 @@ PCI Config Registers
--------------------
Each service driver runs its PCI config operations on its own
capability structure except the PCI Express capability structure, in
which Root Control register and Device Control register are shared
between PME and AER. This patch assumes that all service drivers
will be well behaved and not overwrite other service driver's
configuration settings.
capability structure except the PCI Express capability structure,
that is shared between many drivers including the service drivers.
RMW Capability accessors (pcie_capability_clear_and_set_word(),
pcie_capability_set_word(), and pcie_capability_clear_word()) protect
a selected set of PCI Express Capability Registers (Link Control
Register and Root Control Register). Any change to those registers
should be performed using RMW accessors to avoid problems due to
concurrent updates. For the up-to-date list of protected registers,
see pcie_capability_clear_and_set_word().