drm/tegra: gem: Rename paddr -> iova
The address can refer to either physical memory or IO virtual memory. If referring to IO virtual memory, there will always be an associated physical memory address. Rename this variable to "iova" to clarify in all cases that this is the IO virtual memory, which in the absence of an IOMMU is identical to the physical address. Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -717,7 +717,7 @@ static void tegra_plane_atomic_update(struct drm_plane *plane,
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for (i = 0; i < fb->format->num_planes; i++) {
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struct tegra_bo *bo = tegra_fb_get_plane(fb, i);
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window.base[i] = bo->paddr + fb->offsets[i];
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window.base[i] = bo->iova + fb->offsets[i];
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/*
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* Tegra uses a shared stride for UV planes. Framebuffers are
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@ -869,11 +869,11 @@ static void tegra_cursor_atomic_update(struct drm_plane *plane,
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return;
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}
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value |= (bo->paddr >> 10) & 0x3fffff;
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value |= (bo->iova >> 10) & 0x3fffff;
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tegra_dc_writel(dc, value, DC_DISP_CURSOR_START_ADDR);
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#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
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value = (bo->paddr >> 32) & 0x3;
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value = (bo->iova >> 32) & 0x3;
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tegra_dc_writel(dc, value, DC_DISP_CURSOR_START_ADDR_HI);
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#endif
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@ -269,10 +269,10 @@ static int tegra_fbdev_probe(struct drm_fb_helper *helper,
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}
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}
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drm->mode_config.fb_base = (resource_size_t)bo->paddr;
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drm->mode_config.fb_base = (resource_size_t)bo->iova;
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info->screen_base = (void __iomem *)bo->vaddr + offset;
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info->screen_size = size;
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info->fix.smem_start = (unsigned long)(bo->paddr + offset);
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info->fix.smem_start = (unsigned long)(bo->iova + offset);
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info->fix.smem_len = size;
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return 0;
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@ -33,7 +33,7 @@ static dma_addr_t tegra_bo_pin(struct host1x_bo *bo, struct sg_table **sgt)
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*sgt = obj->sgt;
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return obj->paddr;
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return obj->iova;
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}
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static void tegra_bo_unpin(struct host1x_bo *bo, struct sg_table *sgt)
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@ -133,9 +133,9 @@ static int tegra_bo_iommu_map(struct tegra_drm *tegra, struct tegra_bo *bo)
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goto unlock;
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}
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bo->paddr = bo->mm->start;
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bo->iova = bo->mm->start;
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bo->size = iommu_map_sg(tegra->domain, bo->paddr, bo->sgt->sgl,
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bo->size = iommu_map_sg(tegra->domain, bo->iova, bo->sgt->sgl,
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bo->sgt->nents, prot);
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if (!bo->size) {
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dev_err(tegra->drm->dev, "failed to map buffer\n");
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@ -161,7 +161,7 @@ static int tegra_bo_iommu_unmap(struct tegra_drm *tegra, struct tegra_bo *bo)
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return 0;
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mutex_lock(&tegra->mm_lock);
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iommu_unmap(tegra->domain, bo->paddr, bo->size);
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iommu_unmap(tegra->domain, bo->iova, bo->size);
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drm_mm_remove_node(bo->mm);
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mutex_unlock(&tegra->mm_lock);
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@ -209,7 +209,7 @@ static void tegra_bo_free(struct drm_device *drm, struct tegra_bo *bo)
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sg_free_table(bo->sgt);
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kfree(bo->sgt);
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} else if (bo->vaddr) {
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dma_free_wc(drm->dev, bo->gem.size, bo->vaddr, bo->paddr);
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dma_free_wc(drm->dev, bo->gem.size, bo->vaddr, bo->iova);
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}
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}
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@ -264,7 +264,7 @@ static int tegra_bo_alloc(struct drm_device *drm, struct tegra_bo *bo)
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} else {
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size_t size = bo->gem.size;
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bo->vaddr = dma_alloc_wc(drm->dev, size, &bo->paddr,
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bo->vaddr = dma_alloc_wc(drm->dev, size, &bo->iova,
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GFP_KERNEL | __GFP_NOWARN);
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if (!bo->vaddr) {
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dev_err(drm->dev,
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@ -365,7 +365,7 @@ static struct tegra_bo *tegra_bo_import(struct drm_device *drm,
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goto detach;
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}
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bo->paddr = sg_dma_address(bo->sgt->sgl);
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bo->iova = sg_dma_address(bo->sgt->sgl);
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}
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bo->gem.import_attach = attach;
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@ -461,7 +461,7 @@ int __tegra_gem_mmap(struct drm_gem_object *gem, struct vm_area_struct *vma)
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vma->vm_flags &= ~VM_PFNMAP;
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vma->vm_pgoff = 0;
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err = dma_mmap_wc(gem->dev->dev, vma, bo->vaddr, bo->paddr,
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err = dma_mmap_wc(gem->dev->dev, vma, bo->vaddr, bo->iova,
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gem->size);
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if (err < 0) {
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drm_gem_vm_close(vma);
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@ -523,7 +523,7 @@ tegra_gem_prime_map_dma_buf(struct dma_buf_attachment *attach,
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if (sg_alloc_table(sgt, 1, GFP_KERNEL))
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goto free;
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sg_dma_address(sgt->sgl) = bo->paddr;
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sg_dma_address(sgt->sgl) = bo->iova;
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sg_dma_len(sgt->sgl) = gem->size;
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}
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@ -31,7 +31,7 @@ struct tegra_bo {
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struct host1x_bo base;
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unsigned long flags;
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struct sg_table *sgt;
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dma_addr_t paddr;
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dma_addr_t iova;
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void *vaddr;
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struct drm_mm_node *mm;
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@ -457,7 +457,7 @@ static void tegra_shared_plane_atomic_update(struct drm_plane *plane,
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tegra_plane_writel(p, 0, DC_WINBUF_CDE_CONTROL);
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bo = tegra_fb_get_plane(fb, 0);
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base = bo->paddr;
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base = bo->iova;
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tegra_plane_writel(p, state->format, DC_WIN_COLOR_DEPTH);
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tegra_plane_writel(p, 0, DC_WIN_PRECOMP_WGRP_PARAMS);
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