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Documentation: DT: vdma: update binding doc for AXI DMA

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This patch updates the device-tree binding doc for
adding support for AXI DMA.
Also this patch differentiates required properties b/w
DMA and VDMA.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
Kedareswara rao Appana 2016-04-07 10:59:42 +05:30 committed by Vinod Koul
parent 42c1a2ede4
commit 7e4cda70c0
1 changed files with 11 additions and 2 deletions
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13
Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt
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@ -3,20 +3,28 @@ It can be configured to have one channel or two channels. If configured
as two channels, one is to transmit to the video device and another is as two channels, one is to transmit to the video device and another is
to receive from the video device. to receive from the video device.
Xilinx AXI DMA engine, it does transfers between memory and AXI4 stream
target devices. It can be configured to have one channel or two channels.
If configured as two channels, one is to transmit to the device and another
is to receive from the device.
Required properties: Required properties:
- compatible: Should be "xlnx,axi-vdma-1.00.a" - compatible: Should be "xlnx,axi-vdma-1.00.a" or "xlnx,axi-dma-1.00.a"
- #dma-cells: Should be <1>, see "dmas" property below - #dma-cells: Should be <1>, see "dmas" property below
- reg: Should contain VDMA registers location and length. - reg: Should contain VDMA registers location and length.
- xlnx,num-fstores: Should be the number of framebuffers as configured in h/w.
- xlnx,addrwidth: Should be the vdma addressing size in bits(ex: 32 bits). - xlnx,addrwidth: Should be the vdma addressing size in bits(ex: 32 bits).
- dma-ranges: Should be as the following <dma_addr cpu_addr max_len>. - dma-ranges: Should be as the following <dma_addr cpu_addr max_len>.
- dma-channel child node: Should have at least one channel and can have up to - dma-channel child node: Should have at least one channel and can have up to
two channels per device. This node specifies the properties of each two channels per device. This node specifies the properties of each
DMA channel (see child node properties below). DMA channel (see child node properties below).
Required properties for VDMA:
- xlnx,num-fstores: Should be the number of framebuffers as configured in h/w.
Optional properties: Optional properties:
- xlnx,include-sg: Tells configured for Scatter-mode in - xlnx,include-sg: Tells configured for Scatter-mode in
the hardware. the hardware.
Optional properties for VDMA:
- xlnx,flush-fsync: Tells which channel to Flush on Frame sync. - xlnx,flush-fsync: Tells which channel to Flush on Frame sync.
It takes following values: It takes following values:
{1}, flush both channels {1}, flush both channels
@ -33,6 +41,7 @@ Required child node properties:
Optional child node properties: Optional child node properties:
- xlnx,include-dre: Tells hardware is configured for Data - xlnx,include-dre: Tells hardware is configured for Data
Realignment Engine. Realignment Engine.
Optional child node properties for VDMA:
- xlnx,genlock-mode: Tells Genlock synchronization is - xlnx,genlock-mode: Tells Genlock synchronization is
enabled/disabled in hardware. enabled/disabled in hardware.