- Add PCI device IDs for a new AMD family 0x1a CPUs and use them in
the respective drivers - Update HPE Superdome Flex maintainers list -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmTsMxUACgkQEsHwGGHe VUo8aw/+PyoGF2/96Nb5A3DT2yXrYzT75UITFFrqi8YtRNdlHLV/uFWZjBhCGm8V q5a/Pu/K9qjTDkWZG9UkDlg1VfCMqAsRSWlgSq7qShC07oyOqdzfZLJmAKlGYt+g BQXk7RAtUpKzK79D3r/uq6RkFAvLXflIuGClXg42Bw4SKjuAiwbW5bwU4xsMzEdw Rk0Egn3Nic/reqSlWIaRQAVy5/4Jcoi9HvcJEKJatT+sqJtbR2krpr/rMkL6G9YR 2nOONkRYt7T2+Db5Tnld4FurgQ77F6HeJvAPgUdZVoqUWGCtB4piryd8zuXrj216 Hu4Z7DHjbdMPy1Gl9e9GHmHu62Cx7I2RlcZ5hsLZIjOjRQb+Yo9NgUGiSQyp+Uny 4Rh3abpuZZjfsHUf6M5Mv+oKqzGPtJXP95E1IScuHh8/mTT254p3ozYLSusTS/tM M65eTSuq6FEbSmO3+dtC05V2b+TxAEYFr6yUCvymUqpaNO3XXhxi55asc0JznEwc rV18i03U/A8+9NeUCy2j92F4GHP2QEGscAmdS9CHlDCzsG5RjLx8jJHQIKy6+3W7 cOUqCprxfUBNuxFQT/Mb1B1/CdXmpTaiKRzfqjoCS4sqApMYiWnNa4s7ioOn8ewY 9r+P4SlhC3qvJQhw3JLWUvy69DnJzCDpScnJ1lw3/zHWDkmR8ZQ= =e0EQ -----END PGP SIGNATURE----- Merge tag 'x86_misc_for_v6.6_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull misc x86 updates from Borislav Petkov: - Add PCI device IDs for a new AMD family 0x1a CPUs and use them in the respective drivers - Update HPE Superdome Flex maintainers list * tag 'x86_misc_for_v6.6_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/uv: Update HPE Superdome Flex Maintainers EDAC/amd64: Add support for AMD family 1Ah models 00h-1Fh and 40h-4Fh hwmon: (k10temp) Add thermal support for AMD Family 1Ah-based models x86/amd_nb: Add PCI IDs for AMD Family 1Ah-based models
This commit is contained in:
Linus Torvalds
commit
7e5e832c58
@ -19285,7 +19285,6 @@ F: drivers/misc/sgi-gru/
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SGI XP/XPC/XPNET DRIVER
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M: Robin Holt <robinmholt@gmail.com>
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M: Steve Wahl <steve.wahl@hpe.com>
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R: Mike Travis <mike.travis@hpe.com>
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S: Maintained
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F: drivers/misc/sgi-xp/
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@ -23182,7 +23181,8 @@ F: arch/x86/platform
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X86 PLATFORM UV HPE SUPERDOME FLEX
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M: Steve Wahl <steve.wahl@hpe.com>
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R: Mike Travis <mike.travis@hpe.com>
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R: Justin Ernst <justin.ernst@hpe.com>
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R: Kyle Meyer <kyle.meyer@hpe.com>
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R: Dimitri Sivanich <dimitri.sivanich@hpe.com>
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R: Russ Anderson <russ.anderson@hpe.com>
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S: Supported
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@ -24,6 +24,8 @@
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#define PCI_DEVICE_ID_AMD_19H_M40H_ROOT 0x14b5
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#define PCI_DEVICE_ID_AMD_19H_M60H_ROOT 0x14d8
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#define PCI_DEVICE_ID_AMD_19H_M70H_ROOT 0x14e8
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#define PCI_DEVICE_ID_AMD_1AH_M00H_ROOT 0x153a
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#define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507
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#define PCI_DEVICE_ID_AMD_MI200_ROOT 0x14bb
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#define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464
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@ -39,6 +41,7 @@
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#define PCI_DEVICE_ID_AMD_19H_M60H_DF_F4 0x14e4
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#define PCI_DEVICE_ID_AMD_19H_M70H_DF_F4 0x14f4
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#define PCI_DEVICE_ID_AMD_19H_M78H_DF_F4 0x12fc
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#define PCI_DEVICE_ID_AMD_1AH_M00H_DF_F4 0x12c4
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#define PCI_DEVICE_ID_AMD_MI200_DF_F4 0x14d4
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/* Protect the PCI config register pairs used for SMN. */
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@ -56,6 +59,8 @@ static const struct pci_device_id amd_root_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_ROOT) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M60H_ROOT) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_ROOT) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_ROOT) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M20H_ROOT) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_ROOT) },
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{}
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};
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@ -85,6 +90,8 @@ static const struct pci_device_id amd_nb_misc_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M60H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M78H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M20H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_DF_F3) },
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{}
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};
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@ -106,6 +113,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_DF_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_DF_F4) },
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{}
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};
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@ -4150,6 +4150,20 @@ static int per_family_init(struct amd64_pvt *pvt)
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}
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break;
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case 0x1A:
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switch (pvt->model) {
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case 0x00 ... 0x1f:
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pvt->ctl_name = "F1Ah";
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pvt->max_mcs = 12;
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pvt->flags.zn_regs_v2 = 1;
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break;
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case 0x40 ... 0x4f:
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pvt->ctl_name = "F1Ah_M40h";
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pvt->flags.zn_regs_v2 = 1;
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break;
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}
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break;
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default:
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amd64_err("Unsupported family!\n");
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return -ENODEV;
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@ -4344,6 +4358,7 @@ static const struct x86_cpu_id amd64_cpuids[] = {
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X86_MATCH_VENDOR_FAM(AMD, 0x17, NULL),
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X86_MATCH_VENDOR_FAM(HYGON, 0x18, NULL),
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X86_MATCH_VENDOR_FAM(AMD, 0x19, NULL),
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X86_MATCH_VENDOR_FAM(AMD, 0x1A, NULL),
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{ }
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};
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MODULE_DEVICE_TABLE(x86cpu, amd64_cpuids);
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@ -65,7 +65,7 @@ static DEFINE_MUTEX(nb_smu_ind_mutex);
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#define F15H_M60H_HARDWARE_TEMP_CTRL_OFFSET 0xd8200c64
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#define F15H_M60H_REPORTED_TEMP_CTRL_OFFSET 0xd8200ca4
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/* Common for Zen CPU families (Family 17h and 18h and 19h) */
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/* Common for Zen CPU families (Family 17h and 18h and 19h and 1Ah) */
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#define ZEN_REPORTED_TEMP_CTRL_BASE 0x00059800
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#define ZEN_CCD_TEMP(offset, x) (ZEN_REPORTED_TEMP_CTRL_BASE + \
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@ -475,6 +475,10 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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k10temp_get_ccd_support(pdev, data, 12);
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break;
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}
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} else if (boot_cpu_data.x86 == 0x1a) {
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data->temp_adjust_mask = ZEN_CUR_TEMP_RANGE_SEL_MASK;
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data->read_tempreg = read_tempreg_nb_zen;
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data->is_zen = true;
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} else {
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data->read_htcreg = read_htcreg_pci;
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data->read_tempreg = read_tempreg_pci;
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@ -521,6 +525,8 @@ static const struct pci_device_id k10temp_id_table[] = {
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M60H_DF_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M78H_DF_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_1AH_M00H_DF_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_1AH_M20H_DF_F3) },
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{ PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) },
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{}
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};
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@ -576,6 +576,8 @@
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#define PCI_DEVICE_ID_AMD_19H_M60H_DF_F3 0x14e3
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#define PCI_DEVICE_ID_AMD_19H_M70H_DF_F3 0x14f3
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#define PCI_DEVICE_ID_AMD_19H_M78H_DF_F3 0x12fb
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#define PCI_DEVICE_ID_AMD_1AH_M00H_DF_F3 0x12c3
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#define PCI_DEVICE_ID_AMD_1AH_M20H_DF_F3 0x16fb
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#define PCI_DEVICE_ID_AMD_MI200_DF_F3 0x14d3
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#define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
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#define PCI_DEVICE_ID_AMD_LANCE 0x2000
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