net: phy: adin1100: Add initial support for ADIN1100 industrial PHY
The ADIN1100 is a low power single port 10BASE-T1L transceiver designed for industrial Ethernet applications and is compliant with the IEEE 802.3cg Ethernet standard for long reach 10 Mb/s Single Pair Ethernet. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Alexandru Ardelean
David S. Miller
parent
3da8ffd854
commit
7eaf913299
@ -83,6 +83,13 @@ config ADIN_PHY
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- ADIN1300 - Robust,Industrial, Low Latency 10/100/1000 Gigabit
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Ethernet PHY
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config ADIN1100_PHY
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tristate "Analog Devices Industrial Ethernet T1L PHYs"
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help
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Adds support for the Analog Devices Industrial T1L Ethernet PHYs.
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Currently supports the:
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- ADIN1100 - Robust,Industrial, Low Power 10BASE-T1L Ethernet PHY
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config AQUANTIA_PHY
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tristate "Aquantia PHYs"
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help
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@ -31,6 +31,7 @@ sfp-obj-$(CONFIG_SFP) += sfp-bus.o
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obj-y += $(sfp-obj-y) $(sfp-obj-m)
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obj-$(CONFIG_ADIN_PHY) += adin.o
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obj-$(CONFIG_ADIN1100_PHY) += adin1100.o
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obj-$(CONFIG_AMD_PHY) += amd.o
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aquantia-objs += aquantia_main.o
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ifdef CONFIG_HWMON
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240
drivers/net/phy/adin1100.c
Normal file
240
drivers/net/phy/adin1100.c
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@ -0,0 +1,240 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Driver for Analog Devices Industrial Ethernet T1L PHYs
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*
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* Copyright 2020 Analog Devices Inc.
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*/
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#include <linux/kernel.h>
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#include <linux/bitfield.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/mii.h>
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#include <linux/phy.h>
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#include <linux/property.h>
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#define PHY_ID_ADIN1100 0x0283bc81
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#define ADIN_FORCED_MODE 0x8000
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#define ADIN_FORCED_MODE_EN BIT(0)
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#define ADIN_CRSM_SFT_RST 0x8810
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#define ADIN_CRSM_SFT_RST_EN BIT(0)
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#define ADIN_CRSM_SFT_PD_CNTRL 0x8812
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#define ADIN_CRSM_SFT_PD_CNTRL_EN BIT(0)
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#define ADIN_AN_PHY_INST_STATUS 0x8030
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#define ADIN_IS_CFG_SLV BIT(2)
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#define ADIN_IS_CFG_MST BIT(3)
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#define ADIN_CRSM_STAT 0x8818
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#define ADIN_CRSM_SFT_PD_RDY BIT(1)
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#define ADIN_CRSM_SYS_RDY BIT(0)
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/**
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* struct adin_priv - ADIN PHY driver private data
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* @tx_level_2v4_able: set if the PHY supports 2.4V TX levels (10BASE-T1L)
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* @tx_level_2v4: set if the PHY requests 2.4V TX levels (10BASE-T1L)
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* @tx_level_prop_present: set if the TX level is specified in DT
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*/
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struct adin_priv {
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unsigned int tx_level_2v4_able:1;
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unsigned int tx_level_2v4:1;
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unsigned int tx_level_prop_present:1;
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};
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static int adin_read_status(struct phy_device *phydev)
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{
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int ret;
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ret = genphy_c45_read_status(phydev);
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if (ret)
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return ret;
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ret = phy_read_mmd(phydev, MDIO_MMD_AN, ADIN_AN_PHY_INST_STATUS);
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if (ret < 0)
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return ret;
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if (ret & ADIN_IS_CFG_SLV)
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phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE;
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if (ret & ADIN_IS_CFG_MST)
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phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER;
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return 0;
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}
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static int adin_config_aneg(struct phy_device *phydev)
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{
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struct adin_priv *priv = phydev->priv;
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int ret;
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if (phydev->autoneg == AUTONEG_DISABLE) {
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ret = genphy_c45_pma_setup_forced(phydev);
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if (ret < 0)
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return ret;
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if (priv->tx_level_prop_present && priv->tx_level_2v4)
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ret = phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_B10L_PMA_CTRL,
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MDIO_PMA_10T1L_CTRL_2V4_EN);
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else
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ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_B10L_PMA_CTRL,
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MDIO_PMA_10T1L_CTRL_2V4_EN);
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if (ret < 0)
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return ret;
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/* Force PHY to use above configurations */
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return phy_set_bits_mmd(phydev, MDIO_MMD_AN, ADIN_FORCED_MODE, ADIN_FORCED_MODE_EN);
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}
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ret = phy_clear_bits_mmd(phydev, MDIO_MMD_AN, ADIN_FORCED_MODE, ADIN_FORCED_MODE_EN);
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if (ret < 0)
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return ret;
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/* Request increased transmit level from LP. */
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if (priv->tx_level_prop_present && priv->tx_level_2v4) {
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ret = phy_set_bits_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_ADV_H,
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MDIO_AN_T1_ADV_H_10L_TX_HI |
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MDIO_AN_T1_ADV_H_10L_TX_HI_REQ);
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if (ret < 0)
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return ret;
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}
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/* Disable 2.4 Vpp transmit level. */
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if ((priv->tx_level_prop_present && !priv->tx_level_2v4) || !priv->tx_level_2v4_able) {
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ret = phy_clear_bits_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_ADV_H,
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MDIO_AN_T1_ADV_H_10L_TX_HI |
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MDIO_AN_T1_ADV_H_10L_TX_HI_REQ);
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if (ret < 0)
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return ret;
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}
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return genphy_c45_config_aneg(phydev);
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}
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static int adin_set_powerdown_mode(struct phy_device *phydev, bool en)
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{
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int ret;
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int val;
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val = en ? ADIN_CRSM_SFT_PD_CNTRL_EN : 0;
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ret = phy_write_mmd(phydev, MDIO_MMD_VEND1,
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ADIN_CRSM_SFT_PD_CNTRL, val);
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if (ret < 0)
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return ret;
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return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, ADIN_CRSM_STAT, ret,
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(ret & ADIN_CRSM_SFT_PD_RDY) == val,
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1000, 30000, true);
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}
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static int adin_suspend(struct phy_device *phydev)
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{
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return adin_set_powerdown_mode(phydev, true);
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}
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static int adin_resume(struct phy_device *phydev)
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{
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return adin_set_powerdown_mode(phydev, false);
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}
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static int adin_set_loopback(struct phy_device *phydev, bool enable)
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{
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if (enable)
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return phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_10T1L_CTRL,
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BMCR_LOOPBACK);
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/* PCS loopback (according to 10BASE-T1L spec) */
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return phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_10T1L_CTRL,
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BMCR_LOOPBACK);
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}
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static int adin_soft_reset(struct phy_device *phydev)
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{
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int ret;
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ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, ADIN_CRSM_SFT_RST, ADIN_CRSM_SFT_RST_EN);
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if (ret < 0)
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return ret;
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return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, ADIN_CRSM_STAT, ret,
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(ret & ADIN_CRSM_SYS_RDY),
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10000, 30000, true);
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}
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static int adin_get_features(struct phy_device *phydev)
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{
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struct adin_priv *priv = phydev->priv;
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struct device *dev = &phydev->mdio.dev;
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int ret;
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u8 val;
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ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10T1L_STAT);
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if (ret < 0)
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return ret;
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/* This depends on the voltage level from the power source */
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priv->tx_level_2v4_able = !!(ret & MDIO_PMA_10T1L_STAT_2V4_ABLE);
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phydev_dbg(phydev, "PHY supports 2.4V TX level: %s\n",
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priv->tx_level_2v4_able ? "yes" : "no");
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priv->tx_level_prop_present = device_property_present(dev, "phy-10base-t1l-2.4vpp");
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if (priv->tx_level_prop_present) {
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ret = device_property_read_u8(dev, "phy-10base-t1l-2.4vpp", &val);
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if (ret < 0)
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return ret;
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priv->tx_level_2v4 = val;
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if (!priv->tx_level_2v4 && priv->tx_level_2v4_able)
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phydev_info(phydev,
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"PHY supports 2.4V TX level, but disabled via config\n");
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}
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linkmode_set_bit_array(phy_basic_ports_array, ARRAY_SIZE(phy_basic_ports_array),
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phydev->supported);
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return genphy_c45_pma_read_abilities(phydev);
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}
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static int adin_probe(struct phy_device *phydev)
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{
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struct device *dev = &phydev->mdio.dev;
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struct adin_priv *priv;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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phydev->priv = priv;
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return 0;
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}
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static struct phy_driver adin_driver[] = {
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{
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PHY_ID_MATCH_MODEL(PHY_ID_ADIN1100),
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.name = "ADIN1100",
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.get_features = adin_get_features,
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.soft_reset = adin_soft_reset,
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.probe = adin_probe,
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.config_aneg = adin_config_aneg,
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.read_status = adin_read_status,
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.set_loopback = adin_set_loopback,
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.suspend = adin_suspend,
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.resume = adin_resume,
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},
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};
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module_phy_driver(adin_driver);
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static struct mdio_device_id __maybe_unused adin_tbl[] = {
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{ PHY_ID_MATCH_MODEL(PHY_ID_ADIN1100) },
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{ }
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};
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MODULE_DEVICE_TABLE(mdio, adin_tbl);
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MODULE_DESCRIPTION("Analog Devices Industrial Ethernet T1L PHY driver");
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MODULE_LICENSE("Dual BSD/GPL");
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