irq/apic: Use config_enabled(CONFIG_SMP) checks to clean up irq_set_affinity() for UP
Move the ->irq_set_affinity() routines out of the #ifdef CONFIG_SMP sections and use config_enabled(CONFIG_SMP) checks inside those routines. Thus making those routines simple null stubs for !CONFIG_SMP and retaining those routines with no additional runtime overhead for CONFIG_SMP kernels. Cleans up the ifdef CONFIG_SMP in and around routines related to irq_set_affinity in io_apic and irq_remapping subsystems. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: torvalds@linux-foundation.org Cc: joerg.roedel@amd.com Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Link: http://lkml.kernel.org/r/1339723729.3475.63.camel@sbsiddha-desk.sc.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Suresh Siddha
Ingo Molnar
parent
879060d574
commit
7eb9ae0799
@ -2224,81 +2224,6 @@ void send_cleanup_vector(struct irq_cfg *cfg)
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cfg->move_in_progress = 0;
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}
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static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq_cfg *cfg)
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{
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int apic, pin;
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struct irq_pin_list *entry;
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u8 vector = cfg->vector;
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for_each_irq_pin(entry, cfg->irq_2_pin) {
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unsigned int reg;
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apic = entry->apic;
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pin = entry->pin;
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/*
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* With interrupt-remapping, destination information comes
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* from interrupt-remapping table entry.
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*/
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if (!irq_remapped(cfg))
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io_apic_write(apic, 0x11 + pin*2, dest);
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reg = io_apic_read(apic, 0x10 + pin*2);
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reg &= ~IO_APIC_REDIR_VECTOR_MASK;
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reg |= vector;
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io_apic_modify(apic, 0x10 + pin*2, reg);
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}
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}
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/*
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* Either sets data->affinity to a valid value, and returns
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* ->cpu_mask_to_apicid of that in dest_id, or returns -1 and
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* leaves data->affinity untouched.
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*/
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int __ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
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unsigned int *dest_id)
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{
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struct irq_cfg *cfg = data->chip_data;
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unsigned int irq = data->irq;
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int err;
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if (!cpumask_intersects(mask, cpu_online_mask))
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return -EINVAL;
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err = assign_irq_vector(irq, cfg, mask);
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if (err)
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return err;
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err = apic->cpu_mask_to_apicid_and(mask, cfg->domain, dest_id);
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if (err) {
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if (assign_irq_vector(irq, cfg, data->affinity))
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pr_err("Failed to recover vector for irq %d\n", irq);
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return err;
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}
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cpumask_copy(data->affinity, mask);
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return 0;
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}
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static int
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ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
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bool force)
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{
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unsigned int dest, irq = data->irq;
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unsigned long flags;
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int ret;
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raw_spin_lock_irqsave(&ioapic_lock, flags);
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ret = __ioapic_set_affinity(data, mask, &dest);
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if (!ret) {
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/* Only the high 8 bits are valid. */
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dest = SET_APIC_LOGICAL_ID(dest);
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__target_IO_APIC_irq(irq, dest, data->chip_data);
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ret = IRQ_SET_MASK_OK_NOCOPY;
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}
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raw_spin_unlock_irqrestore(&ioapic_lock, flags);
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return ret;
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}
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asmlinkage void smp_irq_move_cleanup_interrupt(void)
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{
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unsigned vector, me;
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@ -2386,6 +2311,87 @@ void irq_force_complete_move(int irq)
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static inline void irq_complete_move(struct irq_cfg *cfg) { }
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#endif
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static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq_cfg *cfg)
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{
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int apic, pin;
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struct irq_pin_list *entry;
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u8 vector = cfg->vector;
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for_each_irq_pin(entry, cfg->irq_2_pin) {
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unsigned int reg;
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apic = entry->apic;
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pin = entry->pin;
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/*
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* With interrupt-remapping, destination information comes
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* from interrupt-remapping table entry.
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*/
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if (!irq_remapped(cfg))
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io_apic_write(apic, 0x11 + pin*2, dest);
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reg = io_apic_read(apic, 0x10 + pin*2);
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reg &= ~IO_APIC_REDIR_VECTOR_MASK;
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reg |= vector;
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io_apic_modify(apic, 0x10 + pin*2, reg);
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}
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}
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/*
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* Either sets data->affinity to a valid value, and returns
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* ->cpu_mask_to_apicid of that in dest_id, or returns -1 and
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* leaves data->affinity untouched.
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*/
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int __ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
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unsigned int *dest_id)
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{
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struct irq_cfg *cfg = data->chip_data;
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unsigned int irq = data->irq;
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int err;
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if (!config_enabled(CONFIG_SMP))
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return -1;
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if (!cpumask_intersects(mask, cpu_online_mask))
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return -EINVAL;
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err = assign_irq_vector(irq, cfg, mask);
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if (err)
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return err;
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err = apic->cpu_mask_to_apicid_and(mask, cfg->domain, dest_id);
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if (err) {
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if (assign_irq_vector(irq, cfg, data->affinity))
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pr_err("Failed to recover vector for irq %d\n", irq);
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return err;
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}
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cpumask_copy(data->affinity, mask);
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return 0;
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}
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static int
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ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
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bool force)
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{
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unsigned int dest, irq = data->irq;
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unsigned long flags;
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int ret;
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if (!config_enabled(CONFIG_SMP))
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return -1;
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raw_spin_lock_irqsave(&ioapic_lock, flags);
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ret = __ioapic_set_affinity(data, mask, &dest);
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if (!ret) {
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/* Only the high 8 bits are valid. */
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dest = SET_APIC_LOGICAL_ID(dest);
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__target_IO_APIC_irq(irq, dest, data->chip_data);
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ret = IRQ_SET_MASK_OK_NOCOPY;
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}
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raw_spin_unlock_irqrestore(&ioapic_lock, flags);
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return ret;
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}
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static void ack_apic_edge(struct irq_data *data)
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{
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irq_complete_move(data->chip_data);
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@ -2565,9 +2571,7 @@ static void irq_remap_modify_chip_defaults(struct irq_chip *chip)
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chip->irq_ack = ir_ack_apic_edge;
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chip->irq_eoi = ir_ack_apic_level;
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#ifdef CONFIG_SMP
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chip->irq_set_affinity = set_remapped_irq_affinity;
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#endif
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}
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#endif /* CONFIG_IRQ_REMAP */
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@ -2578,9 +2582,7 @@ static struct irq_chip ioapic_chip __read_mostly = {
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.irq_unmask = unmask_ioapic_irq,
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.irq_ack = ack_apic_edge,
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.irq_eoi = ack_apic_level,
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#ifdef CONFIG_SMP
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.irq_set_affinity = ioapic_set_affinity,
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#endif
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.irq_retrigger = ioapic_retrigger_irq,
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};
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@ -3099,7 +3101,6 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
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return err;
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}
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#ifdef CONFIG_SMP
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static int
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msi_set_affinity(struct irq_data *data, const struct cpumask *mask, bool force)
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{
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@ -3121,7 +3122,6 @@ msi_set_affinity(struct irq_data *data, const struct cpumask *mask, bool force)
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return IRQ_SET_MASK_OK_NOCOPY;
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}
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#endif /* CONFIG_SMP */
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/*
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* IRQ Chip for MSI PCI/PCI-X/PCI-Express Devices,
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@ -3132,9 +3132,7 @@ static struct irq_chip msi_chip = {
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.irq_unmask = unmask_msi_irq,
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.irq_mask = mask_msi_irq,
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.irq_ack = ack_apic_edge,
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#ifdef CONFIG_SMP
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.irq_set_affinity = msi_set_affinity,
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#endif
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.irq_retrigger = ioapic_retrigger_irq,
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};
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@ -3219,7 +3217,6 @@ void native_teardown_msi_irq(unsigned int irq)
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}
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#ifdef CONFIG_DMAR_TABLE
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#ifdef CONFIG_SMP
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static int
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dmar_msi_set_affinity(struct irq_data *data, const struct cpumask *mask,
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bool force)
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@ -3244,16 +3241,12 @@ dmar_msi_set_affinity(struct irq_data *data, const struct cpumask *mask,
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return IRQ_SET_MASK_OK_NOCOPY;
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}
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#endif /* CONFIG_SMP */
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static struct irq_chip dmar_msi_type = {
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.name = "DMAR_MSI",
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.irq_unmask = dmar_msi_unmask,
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.irq_mask = dmar_msi_mask,
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.irq_ack = ack_apic_edge,
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#ifdef CONFIG_SMP
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.irq_set_affinity = dmar_msi_set_affinity,
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#endif
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.irq_retrigger = ioapic_retrigger_irq,
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};
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@ -3274,7 +3267,6 @@ int arch_setup_dmar_msi(unsigned int irq)
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#ifdef CONFIG_HPET_TIMER
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#ifdef CONFIG_SMP
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static int hpet_msi_set_affinity(struct irq_data *data,
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const struct cpumask *mask, bool force)
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{
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@ -3297,16 +3289,12 @@ static int hpet_msi_set_affinity(struct irq_data *data,
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return IRQ_SET_MASK_OK_NOCOPY;
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}
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#endif /* CONFIG_SMP */
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static struct irq_chip hpet_msi_type = {
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.name = "HPET_MSI",
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.irq_unmask = hpet_msi_unmask,
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.irq_mask = hpet_msi_mask,
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.irq_ack = ack_apic_edge,
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#ifdef CONFIG_SMP
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.irq_set_affinity = hpet_msi_set_affinity,
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#endif
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.irq_retrigger = ioapic_retrigger_irq,
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};
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@ -3341,8 +3329,6 @@ int arch_setup_hpet_msi(unsigned int irq, unsigned int id)
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*/
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#ifdef CONFIG_HT_IRQ
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#ifdef CONFIG_SMP
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static void target_ht_irq(unsigned int irq, unsigned int dest, u8 vector)
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{
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struct ht_irq_msg msg;
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@ -3370,16 +3356,12 @@ ht_set_affinity(struct irq_data *data, const struct cpumask *mask, bool force)
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return IRQ_SET_MASK_OK_NOCOPY;
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}
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#endif
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static struct irq_chip ht_irq_chip = {
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.name = "PCI-HT",
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.irq_mask = mask_ht_irq,
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.irq_unmask = unmask_ht_irq,
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.irq_ack = ack_apic_edge,
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#ifdef CONFIG_SMP
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.irq_set_affinity = ht_set_affinity,
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#endif
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.irq_retrigger = ioapic_retrigger_irq,
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};
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@ -902,7 +902,6 @@ static int intel_setup_ioapic_entry(int irq,
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return 0;
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}
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#ifdef CONFIG_SMP
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/*
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* Migrate the IO-APIC irq in the presence of intr-remapping.
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*
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@ -926,6 +925,9 @@ intel_ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
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struct irte irte;
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int err;
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if (!config_enabled(CONFIG_SMP))
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return -EINVAL;
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if (!cpumask_intersects(mask, cpu_online_mask))
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return -EINVAL;
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@ -963,7 +965,6 @@ intel_ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
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cpumask_copy(data->affinity, mask);
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return 0;
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}
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#endif
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static void intel_compose_msi_msg(struct pci_dev *pdev,
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unsigned int irq, unsigned int dest,
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@ -1065,9 +1066,7 @@ struct irq_remap_ops intel_irq_remap_ops = {
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.reenable = reenable_irq_remapping,
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.enable_faulting = enable_drhd_fault_handling,
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.setup_ioapic_entry = intel_setup_ioapic_entry,
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#ifdef CONFIG_SMP
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.set_affinity = intel_ioapic_set_affinity,
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#endif
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.free_irq = free_irte,
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.compose_msi_msg = intel_compose_msi_msg,
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.msi_alloc_irq = intel_msi_alloc_irq,
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@ -111,16 +111,15 @@ int setup_ioapic_remapped_entry(int irq,
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vector, attr);
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}
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#ifdef CONFIG_SMP
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int set_remapped_irq_affinity(struct irq_data *data, const struct cpumask *mask,
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bool force)
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{
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if (!remap_ops || !remap_ops->set_affinity)
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if (!config_enabled(CONFIG_SMP) || !remap_ops ||
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!remap_ops->set_affinity)
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return 0;
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return remap_ops->set_affinity(data, mask, force);
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}
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#endif
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void free_remapped_irq(int irq)
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{
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@ -59,11 +59,9 @@ struct irq_remap_ops {
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unsigned int, int,
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struct io_apic_irq_attr *);
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#ifdef CONFIG_SMP
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/* Set the CPU affinity of a remapped interrupt */
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int (*set_affinity)(struct irq_data *data, const struct cpumask *mask,
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bool force);
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#endif
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/* Free an IRQ */
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int (*free_irq)(int);
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@ -150,9 +150,7 @@ struct irq_data {
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void *handler_data;
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void *chip_data;
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struct msi_desc *msi_desc;
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#ifdef CONFIG_SMP
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cpumask_var_t affinity;
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#endif
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};
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/*
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