Merge branch 'pci/misc'
- Constify pcibus_class (Heiner Kallweit) - Annotate pci_cache_line_size variables as __ro_after_init (Heiner Kallweit) - Clean up formatting of PCI accessor macros (Ilpo Järvinen) - Remove some OLPC dead code (Kunwu Chan) - Make pcie_bandwidth_capable() static (Ilpo Järvinen) * pci/misc: PCI: Make pcie_bandwidth_capable() static x86/pci: Remove OLPC dead code PCI: Clean up accessor macro formatting PCI/ERR: Cleanup misleading indentation inside if conditions PCI: Annotate pci_cache_line_size variables as __ro_after_init PCI: Constify pcibus_class
This commit is contained in:
commit
7ecf13fd35
@ -154,9 +154,6 @@ static const uint32_t ehci_hdr[] = { /* dev f function 4 - devfn = 7d */
|
||||
0x0, 0x40, 0x0, 0x40a, /* CapPtr INT-D, IRQA */
|
||||
0xc8020001, 0x0, 0x0, 0x0, /* Capabilities - 40 is R/O, 44 is
|
||||
mask 8103 (power control) */
|
||||
#if 0
|
||||
0x1, 0x40080000, 0x0, 0x0, /* EECP - see EHCI spec section 2.1.7 */
|
||||
#endif
|
||||
0x01000001, 0x0, 0x0, 0x0, /* EECP - see EHCI spec section 2.1.7 */
|
||||
0x2020, 0x0, 0x0, 0x0, /* (EHCI page 8) 60 SBRN (R/O),
|
||||
61 FLADJ (R/W), PORTWAKECAP */
|
||||
|
@ -36,10 +36,13 @@ DEFINE_RAW_SPINLOCK(pci_lock);
|
||||
int noinline pci_bus_read_config_##size \
|
||||
(struct pci_bus *bus, unsigned int devfn, int pos, type *value) \
|
||||
{ \
|
||||
int res; \
|
||||
unsigned long flags; \
|
||||
u32 data = 0; \
|
||||
if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
|
||||
int res; \
|
||||
\
|
||||
if (PCI_##size##_BAD) \
|
||||
return PCIBIOS_BAD_REGISTER_NUMBER; \
|
||||
\
|
||||
pci_lock_config(flags); \
|
||||
res = bus->ops->read(bus, devfn, pos, len, &data); \
|
||||
if (res) \
|
||||
@ -47,6 +50,7 @@ int noinline pci_bus_read_config_##size \
|
||||
else \
|
||||
*value = (type)data; \
|
||||
pci_unlock_config(flags); \
|
||||
\
|
||||
return res; \
|
||||
}
|
||||
|
||||
@ -54,12 +58,16 @@ int noinline pci_bus_read_config_##size \
|
||||
int noinline pci_bus_write_config_##size \
|
||||
(struct pci_bus *bus, unsigned int devfn, int pos, type value) \
|
||||
{ \
|
||||
int res; \
|
||||
unsigned long flags; \
|
||||
if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
|
||||
int res; \
|
||||
\
|
||||
if (PCI_##size##_BAD) \
|
||||
return PCIBIOS_BAD_REGISTER_NUMBER; \
|
||||
\
|
||||
pci_lock_config(flags); \
|
||||
res = bus->ops->write(bus, devfn, pos, len, value); \
|
||||
pci_unlock_config(flags); \
|
||||
\
|
||||
return res; \
|
||||
}
|
||||
|
||||
@ -216,24 +224,27 @@ static noinline void pci_wait_cfg(struct pci_dev *dev)
|
||||
}
|
||||
|
||||
/* Returns 0 on success, negative values indicate error. */
|
||||
#define PCI_USER_READ_CONFIG(size, type) \
|
||||
#define PCI_USER_READ_CONFIG(size, type) \
|
||||
int pci_user_read_config_##size \
|
||||
(struct pci_dev *dev, int pos, type *val) \
|
||||
{ \
|
||||
int ret = PCIBIOS_SUCCESSFUL; \
|
||||
u32 data = -1; \
|
||||
int ret; \
|
||||
\
|
||||
if (PCI_##size##_BAD) \
|
||||
return -EINVAL; \
|
||||
raw_spin_lock_irq(&pci_lock); \
|
||||
\
|
||||
raw_spin_lock_irq(&pci_lock); \
|
||||
if (unlikely(dev->block_cfg_access)) \
|
||||
pci_wait_cfg(dev); \
|
||||
ret = dev->bus->ops->read(dev->bus, dev->devfn, \
|
||||
pos, sizeof(type), &data); \
|
||||
raw_spin_unlock_irq(&pci_lock); \
|
||||
pos, sizeof(type), &data); \
|
||||
raw_spin_unlock_irq(&pci_lock); \
|
||||
if (ret) \
|
||||
PCI_SET_ERROR_RESPONSE(val); \
|
||||
else \
|
||||
*val = (type)data; \
|
||||
\
|
||||
return pcibios_err_to_errno(ret); \
|
||||
} \
|
||||
EXPORT_SYMBOL_GPL(pci_user_read_config_##size);
|
||||
@ -243,15 +254,18 @@ EXPORT_SYMBOL_GPL(pci_user_read_config_##size);
|
||||
int pci_user_write_config_##size \
|
||||
(struct pci_dev *dev, int pos, type val) \
|
||||
{ \
|
||||
int ret = PCIBIOS_SUCCESSFUL; \
|
||||
int ret; \
|
||||
\
|
||||
if (PCI_##size##_BAD) \
|
||||
return -EINVAL; \
|
||||
raw_spin_lock_irq(&pci_lock); \
|
||||
\
|
||||
raw_spin_lock_irq(&pci_lock); \
|
||||
if (unlikely(dev->block_cfg_access)) \
|
||||
pci_wait_cfg(dev); \
|
||||
ret = dev->bus->ops->write(dev->bus, dev->devfn, \
|
||||
pos, sizeof(type), val); \
|
||||
raw_spin_unlock_irq(&pci_lock); \
|
||||
pos, sizeof(type), val); \
|
||||
raw_spin_unlock_irq(&pci_lock); \
|
||||
\
|
||||
return pcibios_err_to_errno(ret); \
|
||||
} \
|
||||
EXPORT_SYMBOL_GPL(pci_user_write_config_##size);
|
||||
|
@ -142,8 +142,8 @@ enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_DEFAULT;
|
||||
* the dfl or actual value as it sees fit. Don't forget this is
|
||||
* measured in 32-bit words, not bytes.
|
||||
*/
|
||||
u8 pci_dfl_cache_line_size = L1_CACHE_BYTES >> 2;
|
||||
u8 pci_cache_line_size;
|
||||
u8 pci_dfl_cache_line_size __ro_after_init = L1_CACHE_BYTES >> 2;
|
||||
u8 pci_cache_line_size __ro_after_init ;
|
||||
|
||||
/*
|
||||
* If we set up a device for bus mastering, we need to check the latency
|
||||
@ -6163,8 +6163,9 @@ EXPORT_SYMBOL(pcie_get_width_cap);
|
||||
* and width, multiplying them, and applying encoding overhead. The result
|
||||
* is in Mb/s, i.e., megabits/second of raw bandwidth.
|
||||
*/
|
||||
u32 pcie_bandwidth_capable(struct pci_dev *dev, enum pci_bus_speed *speed,
|
||||
enum pcie_link_width *width)
|
||||
static u32 pcie_bandwidth_capable(struct pci_dev *dev,
|
||||
enum pci_bus_speed *speed,
|
||||
enum pcie_link_width *width)
|
||||
{
|
||||
*speed = pcie_get_speed_cap(dev);
|
||||
*width = pcie_get_width_cap(dev);
|
||||
|
@ -293,8 +293,6 @@ void pci_bus_put(struct pci_bus *bus);
|
||||
const char *pci_speed_string(enum pci_bus_speed speed);
|
||||
enum pci_bus_speed pcie_get_speed_cap(struct pci_dev *dev);
|
||||
enum pcie_link_width pcie_get_width_cap(struct pci_dev *dev);
|
||||
u32 pcie_bandwidth_capable(struct pci_dev *dev, enum pci_bus_speed *speed,
|
||||
enum pcie_link_width *width);
|
||||
void __pcie_print_link_status(struct pci_dev *dev, bool verbose);
|
||||
void pcie_report_downtraining(struct pci_dev *dev);
|
||||
void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
|
||||
|
@ -116,9 +116,7 @@ static int report_mmio_enabled(struct pci_dev *dev, void *data)
|
||||
|
||||
device_lock(&dev->dev);
|
||||
pdrv = dev->driver;
|
||||
if (!pdrv ||
|
||||
!pdrv->err_handler ||
|
||||
!pdrv->err_handler->mmio_enabled)
|
||||
if (!pdrv || !pdrv->err_handler || !pdrv->err_handler->mmio_enabled)
|
||||
goto out;
|
||||
|
||||
err_handler = pdrv->err_handler;
|
||||
@ -137,9 +135,7 @@ static int report_slot_reset(struct pci_dev *dev, void *data)
|
||||
|
||||
device_lock(&dev->dev);
|
||||
pdrv = dev->driver;
|
||||
if (!pdrv ||
|
||||
!pdrv->err_handler ||
|
||||
!pdrv->err_handler->slot_reset)
|
||||
if (!pdrv || !pdrv->err_handler || !pdrv->err_handler->slot_reset)
|
||||
goto out;
|
||||
|
||||
err_handler = pdrv->err_handler;
|
||||
@ -158,9 +154,7 @@ static int report_resume(struct pci_dev *dev, void *data)
|
||||
device_lock(&dev->dev);
|
||||
pdrv = dev->driver;
|
||||
if (!pci_dev_set_io_state(dev, pci_channel_io_normal) ||
|
||||
!pdrv ||
|
||||
!pdrv->err_handler ||
|
||||
!pdrv->err_handler->resume)
|
||||
!pdrv || !pdrv->err_handler || !pdrv->err_handler->resume)
|
||||
goto out;
|
||||
|
||||
err_handler = pdrv->err_handler;
|
||||
|
@ -95,7 +95,7 @@ static void release_pcibus_dev(struct device *dev)
|
||||
kfree(pci_bus);
|
||||
}
|
||||
|
||||
static struct class pcibus_class = {
|
||||
static const struct class pcibus_class = {
|
||||
.name = "pci_bus",
|
||||
.dev_release = &release_pcibus_dev,
|
||||
.dev_groups = pcibus_groups,
|
||||
|
Loading…
x
Reference in New Issue
Block a user