From 431107ea5b680a24a4d01fbd3a178a3eb932f378 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 26 Jan 2010 10:11:04 +0900 Subject: [PATCH 01/14] ARM: S3C64XX: Merge mach-s3c6400 and mach-s3c6410 As per discussions with Russell King on linux-arm-kernel, it appears that both mach-s3c6400 and mach-s3c6410 are so close together that they should simply be merged into mach-s3c64xx. Note, this patch does not eliminate any of the bits that are still common, it is simply a move of the two directories together, any further common code will be eliminated or moved in further patches. Signed-off-by: Ben Dooks --- arch/arm/Kconfig | 3 +- arch/arm/Makefile | 2 +- arch/arm/mach-s3c6400/Kconfig | 30 ------------------- arch/arm/mach-s3c6400/Makefile | 23 -------------- arch/arm/mach-s3c6410/Makefile | 26 ---------------- .../{mach-s3c6410 => mach-s3c64xx}/Kconfig | 30 +++++++++++++++++-- arch/arm/mach-s3c64xx/Makefile | 29 ++++++++++++++++++ .../Makefile.boot | 0 .../include/mach/debug-macro.S | 0 .../include/mach/dma.h | 0 .../include/mach/entry-macro.S | 0 .../include/mach/gpio.h | 0 .../include/mach/hardware.h | 0 .../include/mach/irqs.h | 0 .../include/mach/map.h | 0 .../include/mach/memory.h | 0 .../include/mach/pwm-clock.h | 0 .../include/mach/regs-clock.h | 0 .../include/mach/regs-fb.h | 0 .../include/mach/regs-irq.h | 0 .../include/mach/system.h | 0 .../include/mach/tick.h | 0 .../include/mach/uncompress.h | 0 .../mach-anw6410.c | 2 +- .../{mach-s3c6410 => mach-s3c64xx}/mach-hmt.c | 0 .../{mach-s3c6410 => mach-s3c64xx}/mach-ncp.c | 2 +- .../mach-smdk6400.c | 2 +- .../mach-smdk6410.c | 2 +- .../{mach-s3c6400 => mach-s3c64xx}/s3c6400.c | 2 +- .../cpu.c => mach-s3c64xx/s3c6410.c} | 2 +- .../setup-sdhci-s3c6400.c} | 2 +- .../setup-sdhci-s3c6410.c} | 2 +- 32 files changed, 67 insertions(+), 92 deletions(-) delete mode 100644 arch/arm/mach-s3c6400/Kconfig delete mode 100644 arch/arm/mach-s3c6400/Makefile delete mode 100644 arch/arm/mach-s3c6410/Makefile rename arch/arm/{mach-s3c6410 => mach-s3c64xx}/Kconfig (84%) create mode 100644 arch/arm/mach-s3c64xx/Makefile rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/Makefile.boot (100%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/include/mach/debug-macro.S (100%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/include/mach/dma.h (100%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/include/mach/entry-macro.S (100%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/include/mach/gpio.h (100%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/include/mach/hardware.h (100%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/include/mach/irqs.h (100%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/include/mach/map.h (100%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/include/mach/memory.h (100%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/include/mach/pwm-clock.h (100%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/include/mach/regs-clock.h (100%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/include/mach/regs-fb.h (100%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/include/mach/regs-irq.h (100%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/include/mach/system.h (100%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/include/mach/tick.h (100%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/include/mach/uncompress.h (100%) rename arch/arm/{mach-s3c6410 => mach-s3c64xx}/mach-anw6410.c (99%) rename arch/arm/{mach-s3c6410 => mach-s3c64xx}/mach-hmt.c (100%) rename arch/arm/{mach-s3c6410 => mach-s3c64xx}/mach-ncp.c (98%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/mach-smdk6400.c (98%) rename arch/arm/{mach-s3c6410 => mach-s3c64xx}/mach-smdk6410.c (99%) rename arch/arm/{mach-s3c6400 => mach-s3c64xx}/s3c6400.c (98%) rename arch/arm/{mach-s3c6410/cpu.c => mach-s3c64xx/s3c6410.c} (98%) rename arch/arm/{mach-s3c6400/setup-sdhci.c => mach-s3c64xx/setup-sdhci-s3c6400.c} (97%) rename arch/arm/{mach-s3c6410/setup-sdhci.c => mach-s3c64xx/setup-sdhci-s3c6410.c} (97%) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3bc5169f0f82..685ff7effff9 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -799,8 +799,7 @@ source "arch/arm/mach-s3c2443/Kconfig" endif if ARCH_S3C64XX -source "arch/arm/mach-s3c6400/Kconfig" -source "arch/arm/mach-s3c6410/Kconfig" +source "arch/arm/mach-s3c64xx/Kconfig" endif source "arch/arm/mach-s5p6440/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index bbcd512ccf7e..ecf963d61aed 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -160,7 +160,7 @@ machine-$(CONFIG_ARCH_REALVIEW) := realview machine-$(CONFIG_ARCH_RPC) := rpc machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443 machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0 -machine-$(CONFIG_ARCH_S3C64XX) := s3c6400 s3c6410 +machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx machine-$(CONFIG_ARCH_S5P6440) := s5p6440 machine-$(CONFIG_ARCH_S5PC1XX) := s5pc100 machine-$(CONFIG_ARCH_SA1100) := sa1100 diff --git a/arch/arm/mach-s3c6400/Kconfig b/arch/arm/mach-s3c6400/Kconfig deleted file mode 100644 index a250bf68709f..000000000000 --- a/arch/arm/mach-s3c6400/Kconfig +++ /dev/null @@ -1,30 +0,0 @@ -# Copyright 2008 Openmoko, Inc. -# Simtec Electronics, Ben Dooks -# -# Licensed under GPLv2 - -# Configuration options for the S3C6410 CPU - -config CPU_S3C6400 - bool - select CPU_S3C6400_INIT - select CPU_S3C6400_CLOCK - help - Enable S3C6400 CPU support - -config S3C6400_SETUP_SDHCI - bool - help - Internal configuration for default SDHCI - setup for S3C6400. - -# S36400 Macchine support - -config MACH_SMDK6400 - bool "SMDK6400" - select CPU_S3C6400 - select S3C_DEV_HSMMC - select S3C_DEV_NAND - select S3C6400_SETUP_SDHCI - help - Machine support for the Samsung SMDK6400 diff --git a/arch/arm/mach-s3c6400/Makefile b/arch/arm/mach-s3c6400/Makefile deleted file mode 100644 index df1ce4aa03e5..000000000000 --- a/arch/arm/mach-s3c6400/Makefile +++ /dev/null @@ -1,23 +0,0 @@ -# arch/arm/mach-s3c6400/Makefile -# -# Copyright 2008 Openmoko, Inc. -# Copyright 2008 Simtec Electronics -# -# Licensed under GPLv2 - -obj-y := -obj-m := -obj-n := -obj- := - -# Core support for S3C6400 system - -obj-$(CONFIG_CPU_S3C6400) += s3c6400.o - -# setup support - -obj-$(CONFIG_S3C6400_SETUP_SDHCI) += setup-sdhci.o - -# Machine support - -obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o diff --git a/arch/arm/mach-s3c6410/Makefile b/arch/arm/mach-s3c6410/Makefile deleted file mode 100644 index 3e48c3dbf973..000000000000 --- a/arch/arm/mach-s3c6410/Makefile +++ /dev/null @@ -1,26 +0,0 @@ -# arch/arm/plat-s3c6410/Makefile -# -# Copyright 2008 Openmoko, Inc. -# Copyright 2008 Simtec Electronics -# -# Licensed under GPLv2 - -obj-y := -obj-m := -obj-n := -obj- := - -# Core support for S3C6410 system - -obj-$(CONFIG_CPU_S3C6410) += cpu.o - -# Helper and device support - -obj-$(CONFIG_S3C6410_SETUP_SDHCI) += setup-sdhci.o - -# machine support - -obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o -obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o -obj-$(CONFIG_MACH_NCP) += mach-ncp.o -obj-$(CONFIG_MACH_HMT) += mach-hmt.o diff --git a/arch/arm/mach-s3c6410/Kconfig b/arch/arm/mach-s3c64xx/Kconfig similarity index 84% rename from arch/arm/mach-s3c6410/Kconfig rename to arch/arm/mach-s3c64xx/Kconfig index 162f4561f80f..551bb3faa3ac 100644 --- a/arch/arm/mach-s3c6410/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -1,10 +1,17 @@ # Copyright 2008 Openmoko, Inc. -# Copyright 2008 Simtec Electronics +# Simtec Electronics, Ben Dooks # # Licensed under GPLv2 # Configuration options for the S3C6410 CPU +config CPU_S3C6400 + bool + select CPU_S3C6400_INIT + select CPU_S3C6400_CLOCK + help + Enable S3C6400 CPU support + config CPU_S3C6410 bool select CPU_S3C6400_INIT @@ -12,12 +19,31 @@ config CPU_S3C6410 help Enable S3C6410 CPU support +config S3C6400_SETUP_SDHCI + bool + help + Internal configuration for default SDHCI + setup for S3C6400. + config S3C6410_SETUP_SDHCI bool select S3C64XX_SETUP_SDHCI_GPIO help Internal helper functions for S3C6410 based SDHCI systems +# S36400 Macchine support + +config MACH_SMDK6400 + bool "SMDK6400" + select CPU_S3C6400 + select S3C_DEV_HSMMC + select S3C_DEV_NAND + select S3C6400_SETUP_SDHCI + help + Machine support for the Samsung SMDK6400 + +# S3C6410 machine support + config MACH_ANW6410 bool "A&W6410" select CPU_S3C6410 @@ -58,7 +84,7 @@ config SMDK6410_SD_CH0 at least some SMDK6410 boards come with the resistors fitted so that the card detects for channels 0 and 1 are the same. - + config SMDK6410_SD_CH1 bool "Use channel 1 only" depends on MACH_SMDK6410 diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile new file mode 100644 index 000000000000..24a3bc33da1e --- /dev/null +++ b/arch/arm/mach-s3c64xx/Makefile @@ -0,0 +1,29 @@ +# arch/arm/mach-s3c64xx/Makefile +# +# Copyright 2008 Openmoko, Inc. +# Copyright 2008 Simtec Electronics +# +# Licensed under GPLv2 + +obj-y := +obj-m := +obj-n := +obj- := + +# Core support for S3C6400 system + +obj-$(CONFIG_CPU_S3C6400) += s3c6400.o +obj-$(CONFIG_CPU_S3C6410) += s3c6410.o + +# setup support + +obj-$(CONFIG_S3C6400_SETUP_SDHCI) += setup-sdhci-s3c6400.o +obj-$(CONFIG_S3C6410_SETUP_SDHCI) += setup-sdhci-s3c6410.o + +# Machine support + +obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o +obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o +obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o +obj-$(CONFIG_MACH_NCP) += mach-ncp.o +obj-$(CONFIG_MACH_HMT) += mach-hmt.o diff --git a/arch/arm/mach-s3c6400/Makefile.boot b/arch/arm/mach-s3c64xx/Makefile.boot similarity index 100% rename from arch/arm/mach-s3c6400/Makefile.boot rename to arch/arm/mach-s3c64xx/Makefile.boot diff --git a/arch/arm/mach-s3c6400/include/mach/debug-macro.S b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S similarity index 100% rename from arch/arm/mach-s3c6400/include/mach/debug-macro.S rename to arch/arm/mach-s3c64xx/include/mach/debug-macro.S diff --git a/arch/arm/mach-s3c6400/include/mach/dma.h b/arch/arm/mach-s3c64xx/include/mach/dma.h similarity index 100% rename from arch/arm/mach-s3c6400/include/mach/dma.h rename to arch/arm/mach-s3c64xx/include/mach/dma.h diff --git a/arch/arm/mach-s3c6400/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S similarity index 100% rename from arch/arm/mach-s3c6400/include/mach/entry-macro.S rename to arch/arm/mach-s3c64xx/include/mach/entry-macro.S diff --git a/arch/arm/mach-s3c6400/include/mach/gpio.h b/arch/arm/mach-s3c64xx/include/mach/gpio.h similarity index 100% rename from arch/arm/mach-s3c6400/include/mach/gpio.h rename to arch/arm/mach-s3c64xx/include/mach/gpio.h diff --git a/arch/arm/mach-s3c6400/include/mach/hardware.h b/arch/arm/mach-s3c64xx/include/mach/hardware.h similarity index 100% rename from arch/arm/mach-s3c6400/include/mach/hardware.h rename to arch/arm/mach-s3c64xx/include/mach/hardware.h diff --git a/arch/arm/mach-s3c6400/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h similarity index 100% rename from arch/arm/mach-s3c6400/include/mach/irqs.h rename to arch/arm/mach-s3c64xx/include/mach/irqs.h diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h similarity index 100% rename from arch/arm/mach-s3c6400/include/mach/map.h rename to arch/arm/mach-s3c64xx/include/mach/map.h diff --git a/arch/arm/mach-s3c6400/include/mach/memory.h b/arch/arm/mach-s3c64xx/include/mach/memory.h similarity index 100% rename from arch/arm/mach-s3c6400/include/mach/memory.h rename to arch/arm/mach-s3c64xx/include/mach/memory.h diff --git a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h similarity index 100% rename from arch/arm/mach-s3c6400/include/mach/pwm-clock.h rename to arch/arm/mach-s3c64xx/include/mach/pwm-clock.h diff --git a/arch/arm/mach-s3c6400/include/mach/regs-clock.h b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h similarity index 100% rename from arch/arm/mach-s3c6400/include/mach/regs-clock.h rename to arch/arm/mach-s3c64xx/include/mach/regs-clock.h diff --git a/arch/arm/mach-s3c6400/include/mach/regs-fb.h b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h similarity index 100% rename from arch/arm/mach-s3c6400/include/mach/regs-fb.h rename to arch/arm/mach-s3c64xx/include/mach/regs-fb.h diff --git a/arch/arm/mach-s3c6400/include/mach/regs-irq.h b/arch/arm/mach-s3c64xx/include/mach/regs-irq.h similarity index 100% rename from arch/arm/mach-s3c6400/include/mach/regs-irq.h rename to arch/arm/mach-s3c64xx/include/mach/regs-irq.h diff --git a/arch/arm/mach-s3c6400/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h similarity index 100% rename from arch/arm/mach-s3c6400/include/mach/system.h rename to arch/arm/mach-s3c64xx/include/mach/system.h diff --git a/arch/arm/mach-s3c6400/include/mach/tick.h b/arch/arm/mach-s3c64xx/include/mach/tick.h similarity index 100% rename from arch/arm/mach-s3c6400/include/mach/tick.h rename to arch/arm/mach-s3c64xx/include/mach/tick.h diff --git a/arch/arm/mach-s3c6400/include/mach/uncompress.h b/arch/arm/mach-s3c64xx/include/mach/uncompress.h similarity index 100% rename from arch/arm/mach-s3c6400/include/mach/uncompress.h rename to arch/arm/mach-s3c64xx/include/mach/uncompress.h diff --git a/arch/arm/mach-s3c6410/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c similarity index 99% rename from arch/arm/mach-s3c6410/mach-anw6410.c rename to arch/arm/mach-s3c64xx/mach-anw6410.c index 661cca63de25..49032a85f6f8 100644 --- a/arch/arm/mach-s3c6410/mach-anw6410.c +++ b/arch/arm/mach-s3c64xx/mach-anw6410.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s3c6410/mach-anw6410.c +/* linux/arch/arm/mach-s3c64xx/mach-anw6410.c * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/mach-s3c6410/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c similarity index 100% rename from arch/arm/mach-s3c6410/mach-hmt.c rename to arch/arm/mach-s3c64xx/mach-hmt.c diff --git a/arch/arm/mach-s3c6410/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c similarity index 98% rename from arch/arm/mach-s3c6410/mach-ncp.c rename to arch/arm/mach-s3c64xx/mach-ncp.c index 55e9bbfaf68b..9be92ddd2176 100644 --- a/arch/arm/mach-s3c6410/mach-ncp.c +++ b/arch/arm/mach-s3c64xx/mach-ncp.c @@ -1,5 +1,5 @@ /* - * linux/arch/arm/mach-s3c6410/mach-ncp.c + * linux/arch/arm/mach-s3c64xx/mach-ncp.c * * Copyright (C) 2008-2009 Samsung Electronics * diff --git a/arch/arm/mach-s3c6400/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c similarity index 98% rename from arch/arm/mach-s3c6400/mach-smdk6400.c rename to arch/arm/mach-s3c64xx/mach-smdk6400.c index ab19285389a7..ba8a052a6142 100644 --- a/arch/arm/mach-s3c6400/mach-smdk6400.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s3c6400/mach-smdk6400.c +/* linux/arch/arm/mach-s3c64xx/mach-smdk6400.c * * Copyright 2008 Simtec Electronics * Ben Dooks diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c similarity index 99% rename from arch/arm/mach-s3c6410/mach-smdk6410.c rename to arch/arm/mach-s3c64xx/mach-smdk6410.c index eba345fadffe..6e6ff354da42 100644 --- a/arch/arm/mach-s3c6410/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s3c6410/mach-smdk6410.c +/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/mach-s3c6400/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c similarity index 98% rename from arch/arm/mach-s3c6400/s3c6400.c rename to arch/arm/mach-s3c64xx/s3c6400.c index d876ee503671..884858a78d49 100644 --- a/arch/arm/mach-s3c6400/s3c6400.c +++ b/arch/arm/mach-s3c64xx/s3c6400.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s3c6410/cpu.c +/* linux/arch/arm/mach-s3c64xx/cpu.c * * Copyright 2009 Simtec Electronics * Ben Dooks diff --git a/arch/arm/mach-s3c6410/cpu.c b/arch/arm/mach-s3c64xx/s3c6410.c similarity index 98% rename from arch/arm/mach-s3c6410/cpu.c rename to arch/arm/mach-s3c64xx/s3c6410.c index 522c08691952..dd55c6a74ed5 100644 --- a/arch/arm/mach-s3c6410/cpu.c +++ b/arch/arm/mach-s3c64xx/s3c6410.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s3c6410/cpu.c +/* linux/arch/arm/mach-s3c64xx/s3c6410.c * * Copyright 2008 Simtec Electronics * Copyright 2008 Simtec Electronics diff --git a/arch/arm/mach-s3c6400/setup-sdhci.c b/arch/arm/mach-s3c64xx/setup-sdhci-s3c6400.c similarity index 97% rename from arch/arm/mach-s3c6400/setup-sdhci.c rename to arch/arm/mach-s3c64xx/setup-sdhci-s3c6400.c index 1039937403be..ec96a5863c0c 100644 --- a/arch/arm/mach-s3c6400/setup-sdhci.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci-s3c6400.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s3c6410/setup-sdhci.c +/* linux/arch/arm/mach-s3c64xx/setup-sdhci.c * * Copyright 2008 Simtec Electronics * Copyright 2008 Simtec Electronics diff --git a/arch/arm/mach-s3c6410/setup-sdhci.c b/arch/arm/mach-s3c64xx/setup-sdhci-s3c6410.c similarity index 97% rename from arch/arm/mach-s3c6410/setup-sdhci.c rename to arch/arm/mach-s3c64xx/setup-sdhci-s3c6410.c index 816d2d9f9ef8..8d714a1f6dc7 100644 --- a/arch/arm/mach-s3c6410/setup-sdhci.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci-s3c6410.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s3c6410/setup-sdhci.c +/* linux/arch/arm/mach-s3c64xx/setup-sdhci.c * * Copyright 2008 Simtec Electronics * Copyright 2008 Simtec Electronics From 97ce9d6938d58e7846dc0365c720c13ebe64547e Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 26 Jan 2010 10:18:14 +0900 Subject: [PATCH 02/14] ARM: S3C64XX: Remove useless IO descriptor from S3C6410 The iotable in arch/arm/mach-s3c64xx/s3c6410.c is currently empty and therefore can be removed from the build. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c64xx/s3c6410.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c index dd55c6a74ed5..185f15cbb701 100644 --- a/arch/arm/mach-s3c64xx/s3c6410.c +++ b/arch/arm/mach-s3c64xx/s3c6410.c @@ -41,20 +41,8 @@ #include #include -/* Initial IO mappings */ - -static struct map_desc s3c6410_iodesc[] __initdata = { -}; - -/* s3c6410_map_io - * - * register the standard cpu IO areas -*/ - void __init s3c6410_map_io(void) { - iotable_init(s3c6410_iodesc, ARRAY_SIZE(s3c6410_iodesc)); - /* initialise device information early */ s3c6410_default_sdhci0(); s3c6410_default_sdhci1(); From 2f6c2ac1d945ffc2e343103bdcfccbdb2e2de805 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 26 Jan 2010 10:38:52 +0900 Subject: [PATCH 03/14] ARM: S3C64XX: Squash SDHCI setup into one file Squash the SDHCI setup for both the S3C6400 and S3C6410 into one file and make the S3C6410 case use the S3C6400 code. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c64xx/Kconfig | 17 ++--- arch/arm/mach-s3c64xx/Makefile | 3 +- arch/arm/mach-s3c64xx/setup-sdhci-s3c6410.c | 68 ------------------- .../{setup-sdhci-s3c6400.c => setup-sdhci.c} | 13 +++- arch/arm/plat-samsung/include/plat/sdhci.h | 43 ++++++------ 5 files changed, 37 insertions(+), 107 deletions(-) delete mode 100644 arch/arm/mach-s3c64xx/setup-sdhci-s3c6410.c rename arch/arm/mach-s3c64xx/{setup-sdhci-s3c6400.c => setup-sdhci.c} (81%) diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index 551bb3faa3ac..ce32e4997d76 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -19,17 +19,12 @@ config CPU_S3C6410 help Enable S3C6410 CPU support -config S3C6400_SETUP_SDHCI - bool - help - Internal configuration for default SDHCI - setup for S3C6400. - -config S3C6410_SETUP_SDHCI - bool +config S3C64XX_SETUP_SDHCI select S3C64XX_SETUP_SDHCI_GPIO + bool help - Internal helper functions for S3C6410 based SDHCI systems + Internal configuration for default SDHCI setup for S3C6400 and + S3C6410 SoCs. # S36400 Macchine support @@ -38,7 +33,7 @@ config MACH_SMDK6400 select CPU_S3C6400 select S3C_DEV_HSMMC select S3C_DEV_NAND - select S3C6400_SETUP_SDHCI + select S3C64XX_SETUP_SDHCI help Machine support for the Samsung SMDK6400 @@ -61,7 +56,7 @@ config MACH_SMDK6410 select S3C_DEV_FB select S3C_DEV_USB_HOST select S3C_DEV_USB_HSOTG - select S3C6410_SETUP_SDHCI + select S3C64XX_SETUP_SDHCI select S3C64XX_SETUP_I2C1 select S3C64XX_SETUP_FB_24BPP help diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index 24a3bc33da1e..21ddf6b29280 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile @@ -17,8 +17,7 @@ obj-$(CONFIG_CPU_S3C6410) += s3c6410.o # setup support -obj-$(CONFIG_S3C6400_SETUP_SDHCI) += setup-sdhci-s3c6400.o -obj-$(CONFIG_S3C6410_SETUP_SDHCI) += setup-sdhci-s3c6410.o +obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o # Machine support diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-s3c6410.c b/arch/arm/mach-s3c64xx/setup-sdhci-s3c6410.c deleted file mode 100644 index 8d714a1f6dc7..000000000000 --- a/arch/arm/mach-s3c64xx/setup-sdhci-s3c6410.c +++ /dev/null @@ -1,68 +0,0 @@ -/* linux/arch/arm/mach-s3c64xx/setup-sdhci.c - * - * Copyright 2008 Simtec Electronics - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ - -char *s3c6410_hsmmc_clksrcs[4] = { - [0] = "hsmmc", - [1] = "hsmmc", - [2] = "mmc_bus", - /* [3] = "48m", - note not successfully used yet */ -}; - - -void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev, - void __iomem *r, - struct mmc_ios *ios, - struct mmc_card *card) -{ - u32 ctrl2, ctrl3; - - /* don't need to alter anything acording to card-type */ - - writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); - - ctrl2 = readl(r + S3C_SDHCI_CONTROL2); - ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; - ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | - S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | - S3C_SDHCI_CTRL2_ENFBCLKRX | - S3C_SDHCI_CTRL2_DFCNT_NONE | - S3C_SDHCI_CTRL2_ENCLKOUTHOLD); - - if (ios->clock < 25 * 1000000) - ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | - S3C_SDHCI_CTRL3_FCSEL2 | - S3C_SDHCI_CTRL3_FCSEL1 | - S3C_SDHCI_CTRL3_FCSEL0); - else - ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); - - printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3); - writel(ctrl2, r + S3C_SDHCI_CONTROL2); - writel(ctrl3, r + S3C_SDHCI_CONTROL3); -} - diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-s3c6400.c b/arch/arm/mach-s3c64xx/setup-sdhci.c similarity index 81% rename from arch/arm/mach-s3c64xx/setup-sdhci-s3c6400.c rename to arch/arm/mach-s3c64xx/setup-sdhci.c index ec96a5863c0c..1a942037c4ef 100644 --- a/arch/arm/mach-s3c64xx/setup-sdhci-s3c6400.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci.c @@ -5,7 +5,7 @@ * Ben Dooks * http://armlinux.simtec.co.uk/ * - * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC) + * S3C6400/S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -26,7 +26,7 @@ /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ -char *s3c6400_hsmmc_clksrcs[4] = { +char *s3c64xx_hsmmc_clksrcs[4] = { [0] = "hsmmc", [1] = "hsmmc", [2] = "mmc_bus", @@ -61,3 +61,12 @@ void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, writel(ctrl3, r + S3C_SDHCI_CONTROL3); } +void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev, + void __iomem *r, + struct mmc_ios *ios, + struct mmc_card *card) +{ + writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); + + s3c6400_setup_sdhci_cfg_card(dev, r, ios, card); +} diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index 53198673b6bd..7d07cd7aa4f2 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h @@ -78,8 +78,8 @@ extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); /* S3C6400 SDHCI setup */ -#ifdef CONFIG_S3C6400_SETUP_SDHCI -extern char *s3c6400_hsmmc_clksrcs[4]; +#ifdef CONFIG_S3C64XX_SETUP_SDHCI +extern char *s3c64xx_hsmmc_clksrcs[4]; #ifdef CONFIG_S3C_DEV_HSMMC extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, @@ -89,7 +89,7 @@ extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, static inline void s3c6400_default_sdhci0(void) { - s3c_hsmmc0_def_platdata.clocks = s3c6400_hsmmc_clksrcs; + s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; } @@ -101,7 +101,7 @@ static inline void s3c6400_default_sdhci0(void) { } #ifdef CONFIG_S3C_DEV_HSMMC1 static inline void s3c6400_default_sdhci1(void) { - s3c_hsmmc1_def_platdata.clocks = s3c6400_hsmmc_clksrcs; + s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; } @@ -112,7 +112,7 @@ static inline void s3c6400_default_sdhci1(void) { } #ifdef CONFIG_S3C_DEV_HSMMC2 static inline void s3c6400_default_sdhci2(void) { - s3c_hsmmc2_def_platdata.clocks = s3c6400_hsmmc_clksrcs; + s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; } @@ -120,27 +120,19 @@ static inline void s3c6400_default_sdhci2(void) static inline void s3c6400_default_sdhci2(void) { } #endif /* CONFIG_S3C_DEV_HSMMC2 */ -#else -static inline void s3c6400_default_sdhci0(void) { } -static inline void s3c6400_default_sdhci1(void) { } -#endif /* CONFIG_S3C6400_SETUP_SDHCI */ - /* S3C6410 SDHCI setup */ -#ifdef CONFIG_S3C6410_SETUP_SDHCI -extern char *s3c6410_hsmmc_clksrcs[4]; - -extern void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev, - void __iomem *r, - struct mmc_ios *ios, - struct mmc_card *card); +extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev, + void __iomem *r, + struct mmc_ios *ios, + struct mmc_card *card); #ifdef CONFIG_S3C_DEV_HSMMC static inline void s3c6410_default_sdhci0(void) { - s3c_hsmmc0_def_platdata.clocks = s3c6410_hsmmc_clksrcs; + s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; - s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; + s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; } #else static inline void s3c6410_default_sdhci0(void) { } @@ -149,9 +141,9 @@ static inline void s3c6410_default_sdhci0(void) { } #ifdef CONFIG_S3C_DEV_HSMMC1 static inline void s3c6410_default_sdhci1(void) { - s3c_hsmmc1_def_platdata.clocks = s3c6410_hsmmc_clksrcs; + s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; - s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; + s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; } #else static inline void s3c6410_default_sdhci1(void) { } @@ -160,9 +152,9 @@ static inline void s3c6410_default_sdhci1(void) { } #ifdef CONFIG_S3C_DEV_HSMMC2 static inline void s3c6410_default_sdhci2(void) { - s3c_hsmmc2_def_platdata.clocks = s3c6410_hsmmc_clksrcs; + s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; - s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; + s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; } #else static inline void s3c6410_default_sdhci2(void) { } @@ -171,7 +163,10 @@ static inline void s3c6410_default_sdhci2(void) { } #else static inline void s3c6410_default_sdhci0(void) { } static inline void s3c6410_default_sdhci1(void) { } -#endif /* CONFIG_S3C6410_SETUP_SDHCI */ +static inline void s3c6400_default_sdhci0(void) { } +static inline void s3c6400_default_sdhci1(void) { } + +#endif /* CONFIG_S3C64XX_SETUP_SDHCI */ /* S5PC100 SDHCI setup */ From 3501c9ae9fc5414d09c9a8d3a5452d2b167db916 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 26 Jan 2010 10:45:40 +0900 Subject: [PATCH 04/14] ARM: S3C64XX: Move headers into machine include directory Move the register and GPIO definition files from plat-s3c64xx into the machine include direcotry as they are unlikely to be reused outside mach-s3c64xx. This move includes removing the empty and replacing it with the implementation. Signed-off-by: Ben Dooks --- .../include/mach}/gpio-bank-a.h | 2 +- .../include/mach}/gpio-bank-b.h | 2 +- .../include/mach}/gpio-bank-c.h | 2 +- .../include/mach}/gpio-bank-d.h | 2 +- .../include/mach}/gpio-bank-e.h | 2 +- .../include/mach}/gpio-bank-f.h | 2 +- .../include/mach}/gpio-bank-g.h | 2 +- .../include/mach}/gpio-bank-h.h | 2 +- .../include/mach}/gpio-bank-i.h | 2 +- .../include/mach}/gpio-bank-j.h | 2 +- .../include/mach}/gpio-bank-n.h | 2 +- .../include/mach}/gpio-bank-o.h | 2 +- .../include/mach}/gpio-bank-p.h | 2 +- .../include/mach}/gpio-bank-q.h | 2 +- .../mach-s3c64xx/include/mach/regs-clock.h | 148 ++++++++++++++++- .../include/mach}/regs-gpio-memport.h | 0 .../include/mach}/regs-gpio.h | 0 .../include/mach}/regs-modem.h | 0 .../include/mach}/regs-srom.h | 0 .../include/mach}/regs-sys.h | 0 .../include/mach}/regs-syscon-power.h | 0 arch/arm/mach-s3c64xx/mach-anw6410.c | 4 +- arch/arm/mach-s3c64xx/mach-smdk6410.c | 8 +- arch/arm/mach-s3c64xx/s3c6400.c | 2 +- arch/arm/mach-s3c64xx/s3c6410.c | 2 +- arch/arm/plat-s3c64xx/clock.c | 4 +- arch/arm/plat-s3c64xx/dev-audio.c | 9 +- arch/arm/plat-s3c64xx/dev-spi.c | 3 +- arch/arm/plat-s3c64xx/dma.c | 2 +- arch/arm/plat-s3c64xx/gpiolib.c | 2 +- arch/arm/plat-s3c64xx/include/plat/pm-core.h | 2 +- .../plat-s3c64xx/include/plat/regs-clock.h | 156 ------------------ arch/arm/plat-s3c64xx/irq-eint.c | 2 +- arch/arm/plat-s3c64xx/irq-pm.c | 2 +- arch/arm/plat-s3c64xx/pm.c | 12 +- arch/arm/plat-s3c64xx/s3c6400-clock.c | 2 +- arch/arm/plat-s3c64xx/setup-i2c0.c | 2 +- arch/arm/plat-s3c64xx/setup-i2c1.c | 2 +- arch/arm/plat-s3c64xx/sleep.S | 6 +- 39 files changed, 191 insertions(+), 207 deletions(-) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/gpio-bank-a.h (96%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/gpio-bank-b.h (97%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/gpio-bank-c.h (96%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/gpio-bank-d.h (96%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/gpio-bank-e.h (96%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/gpio-bank-f.h (97%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/gpio-bank-g.h (95%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/gpio-bank-h.h (97%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/gpio-bank-i.h (96%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/gpio-bank-j.h (95%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/gpio-bank-n.h (96%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/gpio-bank-o.h (97%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/gpio-bank-p.h (97%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/gpio-bank-q.h (96%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/regs-gpio-memport.h (100%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/regs-gpio.h (100%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/regs-modem.h (100%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/regs-srom.h (100%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/regs-sys.h (100%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/regs-syscon-power.h (100%) delete mode 100644 arch/arm/plat-s3c64xx/include/plat/regs-clock.h diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h similarity index 96% rename from arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h rename to arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h index 9aa0e427d113..34212e1a7e81 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h similarity index 97% rename from arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h rename to arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h index 3933adb4d50a..7232c037e642 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h similarity index 96% rename from arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h rename to arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h index e22b49f4f982..db189ab1639a 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h similarity index 96% rename from arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h rename to arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h index 6fe4a49c26f0..1a01cee7aca3 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h similarity index 96% rename from arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h rename to arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h index 7fcf3d8e0a48..f057adb627dd 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h similarity index 97% rename from arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h rename to arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h index f3faff974a18..62ab8f5e7835 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h similarity index 95% rename from arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h rename to arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h index 35bbd2378e55..b94954af1598 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h similarity index 97% rename from arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h rename to arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h index 2ba1767512d7..5d75aaad865e 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h similarity index 96% rename from arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h rename to arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h index ce9ebe335566..4ceaa6098bc7 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h similarity index 95% rename from arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h rename to arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h index 21a906299d30..6f25cd079a40 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h similarity index 96% rename from arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h rename to arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h index 569e76120881..d0aeda1cd9de 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h similarity index 97% rename from arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h rename to arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h index b09e12954b57..21868fa102d0 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h similarity index 97% rename from arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h rename to arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h index 92f00517926b..46bcfb63b8de 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h similarity index 96% rename from arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h rename to arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h index 565e60aaee47..1712223487b0 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h index a6c7f4eb3a1b..3ef62741e5d1 100644 --- a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h @@ -1,16 +1,156 @@ -/* linux/arch/arm/mach-s3c6400/include/mach/regs-clock.h +/* arch/arm/plat-s3c64xx/include/plat/regs-clock.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ * Ben Dooks + * http://armlinux.simtec.co.uk/ * - * S3C64XX - clock register compatibility with s3c24xx + * S3C64XX clock register definitions * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include +#ifndef __PLAT_REGS_CLOCK_H +#define __PLAT_REGS_CLOCK_H __FILE__ +#define S3C_CLKREG(x) (S3C_VA_SYS + (x)) + +#define S3C_APLL_LOCK S3C_CLKREG(0x00) +#define S3C_MPLL_LOCK S3C_CLKREG(0x04) +#define S3C_EPLL_LOCK S3C_CLKREG(0x08) +#define S3C_APLL_CON S3C_CLKREG(0x0C) +#define S3C_MPLL_CON S3C_CLKREG(0x10) +#define S3C_EPLL_CON0 S3C_CLKREG(0x14) +#define S3C_EPLL_CON1 S3C_CLKREG(0x18) +#define S3C_CLK_SRC S3C_CLKREG(0x1C) +#define S3C_CLK_DIV0 S3C_CLKREG(0x20) +#define S3C_CLK_DIV1 S3C_CLKREG(0x24) +#define S3C_CLK_DIV2 S3C_CLKREG(0x28) +#define S3C_CLK_OUT S3C_CLKREG(0x2C) +#define S3C_HCLK_GATE S3C_CLKREG(0x30) +#define S3C_PCLK_GATE S3C_CLKREG(0x34) +#define S3C_SCLK_GATE S3C_CLKREG(0x38) +#define S3C_MEM0_GATE S3C_CLKREG(0x3C) + +/* CLKDIV0 */ +#define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12) +#define S3C6400_CLKDIV0_PCLK_SHIFT (12) +#define S3C6400_CLKDIV0_HCLK2_MASK (0x7 << 9) +#define S3C6400_CLKDIV0_HCLK2_SHIFT (9) +#define S3C6400_CLKDIV0_HCLK_MASK (0x1 << 8) +#define S3C6400_CLKDIV0_HCLK_SHIFT (8) +#define S3C6400_CLKDIV0_MPLL_MASK (0x1 << 4) +#define S3C6400_CLKDIV0_MPLL_SHIFT (4) + +#define S3C6400_CLKDIV0_ARM_MASK (0x7 << 0) +#define S3C6410_CLKDIV0_ARM_MASK (0xf << 0) +#define S3C6400_CLKDIV0_ARM_SHIFT (0) + +/* HCLK GATE Registers */ +#define S3C_CLKCON_HCLK_3DSE (1<<31) +#define S3C_CLKCON_HCLK_UHOST (1<<29) +#define S3C_CLKCON_HCLK_SECUR (1<<28) +#define S3C_CLKCON_HCLK_SDMA1 (1<<27) +#define S3C_CLKCON_HCLK_SDMA0 (1<<26) +#define S3C_CLKCON_HCLK_IROM (1<<25) +#define S3C_CLKCON_HCLK_DDR1 (1<<24) +#define S3C_CLKCON_HCLK_DDR0 (1<<23) +#define S3C_CLKCON_HCLK_MEM1 (1<<22) +#define S3C_CLKCON_HCLK_MEM0 (1<<21) +#define S3C_CLKCON_HCLK_USB (1<<20) +#define S3C_CLKCON_HCLK_HSMMC2 (1<<19) +#define S3C_CLKCON_HCLK_HSMMC1 (1<<18) +#define S3C_CLKCON_HCLK_HSMMC0 (1<<17) +#define S3C_CLKCON_HCLK_MDP (1<<16) +#define S3C_CLKCON_HCLK_DHOST (1<<15) +#define S3C_CLKCON_HCLK_IHOST (1<<14) +#define S3C_CLKCON_HCLK_DMA1 (1<<13) +#define S3C_CLKCON_HCLK_DMA0 (1<<12) +#define S3C_CLKCON_HCLK_JPEG (1<<11) +#define S3C_CLKCON_HCLK_CAMIF (1<<10) +#define S3C_CLKCON_HCLK_SCALER (1<<9) +#define S3C_CLKCON_HCLK_2D (1<<8) +#define S3C_CLKCON_HCLK_TV (1<<7) +#define S3C_CLKCON_HCLK_POST0 (1<<5) +#define S3C_CLKCON_HCLK_ROT (1<<4) +#define S3C_CLKCON_HCLK_LCD (1<<3) +#define S3C_CLKCON_HCLK_TZIC (1<<2) +#define S3C_CLKCON_HCLK_INTC (1<<1) +#define S3C_CLKCON_HCLK_MFC (1<<0) + +/* PCLK GATE Registers */ +#define S3C6410_CLKCON_PCLK_I2C1 (1<<27) +#define S3C6410_CLKCON_PCLK_IIS2 (1<<26) +#define S3C_CLKCON_PCLK_SKEY (1<<24) +#define S3C_CLKCON_PCLK_CHIPID (1<<23) +#define S3C_CLKCON_PCLK_SPI1 (1<<22) +#define S3C_CLKCON_PCLK_SPI0 (1<<21) +#define S3C_CLKCON_PCLK_HSIRX (1<<20) +#define S3C_CLKCON_PCLK_HSITX (1<<19) +#define S3C_CLKCON_PCLK_GPIO (1<<18) +#define S3C_CLKCON_PCLK_IIC (1<<17) +#define S3C_CLKCON_PCLK_IIS1 (1<<16) +#define S3C_CLKCON_PCLK_IIS0 (1<<15) +#define S3C_CLKCON_PCLK_AC97 (1<<14) +#define S3C_CLKCON_PCLK_TZPC (1<<13) +#define S3C_CLKCON_PCLK_TSADC (1<<12) +#define S3C_CLKCON_PCLK_KEYPAD (1<<11) +#define S3C_CLKCON_PCLK_IRDA (1<<10) +#define S3C_CLKCON_PCLK_PCM1 (1<<9) +#define S3C_CLKCON_PCLK_PCM0 (1<<8) +#define S3C_CLKCON_PCLK_PWM (1<<7) +#define S3C_CLKCON_PCLK_RTC (1<<6) +#define S3C_CLKCON_PCLK_WDT (1<<5) +#define S3C_CLKCON_PCLK_UART3 (1<<4) +#define S3C_CLKCON_PCLK_UART2 (1<<3) +#define S3C_CLKCON_PCLK_UART1 (1<<2) +#define S3C_CLKCON_PCLK_UART0 (1<<1) +#define S3C_CLKCON_PCLK_MFC (1<<0) + +/* SCLK GATE Registers */ +#define S3C_CLKCON_SCLK_UHOST (1<<30) +#define S3C_CLKCON_SCLK_MMC2_48 (1<<29) +#define S3C_CLKCON_SCLK_MMC1_48 (1<<28) +#define S3C_CLKCON_SCLK_MMC0_48 (1<<27) +#define S3C_CLKCON_SCLK_MMC2 (1<<26) +#define S3C_CLKCON_SCLK_MMC1 (1<<25) +#define S3C_CLKCON_SCLK_MMC0 (1<<24) +#define S3C_CLKCON_SCLK_SPI1_48 (1<<23) +#define S3C_CLKCON_SCLK_SPI0_48 (1<<22) +#define S3C_CLKCON_SCLK_SPI1 (1<<21) +#define S3C_CLKCON_SCLK_SPI0 (1<<20) +#define S3C_CLKCON_SCLK_DAC27 (1<<19) +#define S3C_CLKCON_SCLK_TV27 (1<<18) +#define S3C_CLKCON_SCLK_SCALER27 (1<<17) +#define S3C_CLKCON_SCLK_SCALER (1<<16) +#define S3C_CLKCON_SCLK_LCD27 (1<<15) +#define S3C_CLKCON_SCLK_LCD (1<<14) +#define S3C6400_CLKCON_SCLK_POST1_27 (1<<13) +#define S3C6410_CLKCON_FIMC (1<<13) +#define S3C_CLKCON_SCLK_POST0_27 (1<<12) +#define S3C6400_CLKCON_SCLK_POST1 (1<<11) +#define S3C6410_CLKCON_SCLK_AUDIO2 (1<<11) +#define S3C_CLKCON_SCLK_POST0 (1<<10) +#define S3C_CLKCON_SCLK_AUDIO1 (1<<9) +#define S3C_CLKCON_SCLK_AUDIO0 (1<<8) +#define S3C_CLKCON_SCLK_SECUR (1<<7) +#define S3C_CLKCON_SCLK_IRDA (1<<6) +#define S3C_CLKCON_SCLK_UART (1<<5) +#define S3C_CLKCON_SCLK_ONENAND (1<<4) +#define S3C_CLKCON_SCLK_MFC (1<<3) +#define S3C_CLKCON_SCLK_CAM (1<<2) +#define S3C_CLKCON_SCLK_JPEG (1<<1) + +/* CLKSRC */ + +#define S3C6400_CLKSRC_APLL_MOUT (1 << 0) +#define S3C6400_CLKSRC_MPLL_MOUT (1 << 1) +#define S3C6400_CLKSRC_EPLL_MOUT (1 << 2) +#define S3C6400_CLKSRC_APLL_MOUT_SHIFT (0) +#define S3C6400_CLKSRC_MPLL_MOUT_SHIFT (1) +#define S3C6400_CLKSRC_EPLL_MOUT_SHIFT (2) +#define S3C6400_CLKSRC_MFC (1 << 4) + +#endif /* _PLAT_REGS_CLOCK_H */ diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-gpio-memport.h b/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h similarity index 100% rename from arch/arm/plat-s3c64xx/include/plat/regs-gpio-memport.h rename to arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h b/arch/arm/mach-s3c64xx/include/mach/regs-gpio.h similarity index 100% rename from arch/arm/plat-s3c64xx/include/plat/regs-gpio.h rename to arch/arm/mach-s3c64xx/include/mach/regs-gpio.h diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-modem.h b/arch/arm/mach-s3c64xx/include/mach/regs-modem.h similarity index 100% rename from arch/arm/plat-s3c64xx/include/plat/regs-modem.h rename to arch/arm/mach-s3c64xx/include/mach/regs-modem.h diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-srom.h b/arch/arm/mach-s3c64xx/include/mach/regs-srom.h similarity index 100% rename from arch/arm/plat-s3c64xx/include/plat/regs-srom.h rename to arch/arm/mach-s3c64xx/include/mach/regs-srom.h diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-sys.h b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h similarity index 100% rename from arch/arm/plat-s3c64xx/include/plat/regs-sys.h rename to arch/arm/mach-s3c64xx/include/mach/regs-sys.h diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h b/arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h similarity index 100% rename from arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h rename to arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c index 49032a85f6f8..06d8fe579e10 100644 --- a/arch/arm/mach-s3c64xx/mach-anw6410.c +++ b/arch/arm/mach-s3c64xx/mach-anw6410.c @@ -49,8 +49,8 @@ #include #include #include -#include -#include +#include +#include /* DM9000 */ #define ANW6410_PA_DM9000 (0x18000000) diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index 6e6ff354da42..021670e39d3e 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c @@ -46,10 +46,10 @@ #include #include -#include -#include -#include -#include +#include +#include +#include +#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c index 884858a78d49..2fba1b263fed 100644 --- a/arch/arm/mach-s3c64xx/s3c6400.c +++ b/arch/arm/mach-s3c64xx/s3c6400.c @@ -30,7 +30,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c index 185f15cbb701..b881d6a50b11 100644 --- a/arch/arm/mach-s3c64xx/s3c6410.c +++ b/arch/arm/mach-s3c64xx/s3c6410.c @@ -31,7 +31,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/plat-s3c64xx/clock.c index 2989c3a2e94d..64439de206cb 100644 --- a/arch/arm/plat-s3c64xx/clock.c +++ b/arch/arm/plat-s3c64xx/clock.c @@ -21,8 +21,8 @@ #include #include -#include -#include +#include +#include #include #include #include diff --git a/arch/arm/plat-s3c64xx/dev-audio.c b/arch/arm/plat-s3c64xx/dev-audio.c index f6b7bfb519d7..aaffb8066707 100644 --- a/arch/arm/plat-s3c64xx/dev-audio.c +++ b/arch/arm/plat-s3c64xx/dev-audio.c @@ -19,12 +19,13 @@ #include #include -#include -#include -#include -#include #include +#include +#include +#include +#include + static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev) { switch (pdev->id) { diff --git a/arch/arm/plat-s3c64xx/dev-spi.c b/arch/arm/plat-s3c64xx/dev-spi.c index ca10388d7ed1..0c20d27d9b65 100644 --- a/arch/arm/plat-s3c64xx/dev-spi.c +++ b/arch/arm/plat-s3c64xx/dev-spi.c @@ -16,11 +16,10 @@ #include #include #include +#include #include - #include -#include #include #include diff --git a/arch/arm/plat-s3c64xx/dma.c b/arch/arm/plat-s3c64xx/dma.c index d554b936fcfb..0e0edf75e8ed 100644 --- a/arch/arm/plat-s3c64xx/dma.c +++ b/arch/arm/plat-s3c64xx/dma.c @@ -28,7 +28,7 @@ #include #include -#include +#include #include diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/plat-s3c64xx/gpiolib.c index b6e3f55321fa..66e6794481d2 100644 --- a/arch/arm/plat-s3c64xx/gpiolib.c +++ b/arch/arm/plat-s3c64xx/gpiolib.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include /* GPIO bank summary: * diff --git a/arch/arm/plat-s3c64xx/include/plat/pm-core.h b/arch/arm/plat-s3c64xx/include/plat/pm-core.h index d347de3ba0dc..61b8aae76d3d 100644 --- a/arch/arm/plat-s3c64xx/include/plat/pm-core.h +++ b/arch/arm/plat-s3c64xx/include/plat/pm-core.h @@ -12,7 +12,7 @@ * published by the Free Software Foundation. */ -#include +#include static inline void s3c_pm_debug_init_uart(void) { diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h b/arch/arm/plat-s3c64xx/include/plat/regs-clock.h deleted file mode 100644 index 3ef62741e5d1..000000000000 --- a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h +++ /dev/null @@ -1,156 +0,0 @@ -/* arch/arm/plat-s3c64xx/include/plat/regs-clock.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * S3C64XX clock register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __PLAT_REGS_CLOCK_H -#define __PLAT_REGS_CLOCK_H __FILE__ - -#define S3C_CLKREG(x) (S3C_VA_SYS + (x)) - -#define S3C_APLL_LOCK S3C_CLKREG(0x00) -#define S3C_MPLL_LOCK S3C_CLKREG(0x04) -#define S3C_EPLL_LOCK S3C_CLKREG(0x08) -#define S3C_APLL_CON S3C_CLKREG(0x0C) -#define S3C_MPLL_CON S3C_CLKREG(0x10) -#define S3C_EPLL_CON0 S3C_CLKREG(0x14) -#define S3C_EPLL_CON1 S3C_CLKREG(0x18) -#define S3C_CLK_SRC S3C_CLKREG(0x1C) -#define S3C_CLK_DIV0 S3C_CLKREG(0x20) -#define S3C_CLK_DIV1 S3C_CLKREG(0x24) -#define S3C_CLK_DIV2 S3C_CLKREG(0x28) -#define S3C_CLK_OUT S3C_CLKREG(0x2C) -#define S3C_HCLK_GATE S3C_CLKREG(0x30) -#define S3C_PCLK_GATE S3C_CLKREG(0x34) -#define S3C_SCLK_GATE S3C_CLKREG(0x38) -#define S3C_MEM0_GATE S3C_CLKREG(0x3C) - -/* CLKDIV0 */ -#define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12) -#define S3C6400_CLKDIV0_PCLK_SHIFT (12) -#define S3C6400_CLKDIV0_HCLK2_MASK (0x7 << 9) -#define S3C6400_CLKDIV0_HCLK2_SHIFT (9) -#define S3C6400_CLKDIV0_HCLK_MASK (0x1 << 8) -#define S3C6400_CLKDIV0_HCLK_SHIFT (8) -#define S3C6400_CLKDIV0_MPLL_MASK (0x1 << 4) -#define S3C6400_CLKDIV0_MPLL_SHIFT (4) - -#define S3C6400_CLKDIV0_ARM_MASK (0x7 << 0) -#define S3C6410_CLKDIV0_ARM_MASK (0xf << 0) -#define S3C6400_CLKDIV0_ARM_SHIFT (0) - -/* HCLK GATE Registers */ -#define S3C_CLKCON_HCLK_3DSE (1<<31) -#define S3C_CLKCON_HCLK_UHOST (1<<29) -#define S3C_CLKCON_HCLK_SECUR (1<<28) -#define S3C_CLKCON_HCLK_SDMA1 (1<<27) -#define S3C_CLKCON_HCLK_SDMA0 (1<<26) -#define S3C_CLKCON_HCLK_IROM (1<<25) -#define S3C_CLKCON_HCLK_DDR1 (1<<24) -#define S3C_CLKCON_HCLK_DDR0 (1<<23) -#define S3C_CLKCON_HCLK_MEM1 (1<<22) -#define S3C_CLKCON_HCLK_MEM0 (1<<21) -#define S3C_CLKCON_HCLK_USB (1<<20) -#define S3C_CLKCON_HCLK_HSMMC2 (1<<19) -#define S3C_CLKCON_HCLK_HSMMC1 (1<<18) -#define S3C_CLKCON_HCLK_HSMMC0 (1<<17) -#define S3C_CLKCON_HCLK_MDP (1<<16) -#define S3C_CLKCON_HCLK_DHOST (1<<15) -#define S3C_CLKCON_HCLK_IHOST (1<<14) -#define S3C_CLKCON_HCLK_DMA1 (1<<13) -#define S3C_CLKCON_HCLK_DMA0 (1<<12) -#define S3C_CLKCON_HCLK_JPEG (1<<11) -#define S3C_CLKCON_HCLK_CAMIF (1<<10) -#define S3C_CLKCON_HCLK_SCALER (1<<9) -#define S3C_CLKCON_HCLK_2D (1<<8) -#define S3C_CLKCON_HCLK_TV (1<<7) -#define S3C_CLKCON_HCLK_POST0 (1<<5) -#define S3C_CLKCON_HCLK_ROT (1<<4) -#define S3C_CLKCON_HCLK_LCD (1<<3) -#define S3C_CLKCON_HCLK_TZIC (1<<2) -#define S3C_CLKCON_HCLK_INTC (1<<1) -#define S3C_CLKCON_HCLK_MFC (1<<0) - -/* PCLK GATE Registers */ -#define S3C6410_CLKCON_PCLK_I2C1 (1<<27) -#define S3C6410_CLKCON_PCLK_IIS2 (1<<26) -#define S3C_CLKCON_PCLK_SKEY (1<<24) -#define S3C_CLKCON_PCLK_CHIPID (1<<23) -#define S3C_CLKCON_PCLK_SPI1 (1<<22) -#define S3C_CLKCON_PCLK_SPI0 (1<<21) -#define S3C_CLKCON_PCLK_HSIRX (1<<20) -#define S3C_CLKCON_PCLK_HSITX (1<<19) -#define S3C_CLKCON_PCLK_GPIO (1<<18) -#define S3C_CLKCON_PCLK_IIC (1<<17) -#define S3C_CLKCON_PCLK_IIS1 (1<<16) -#define S3C_CLKCON_PCLK_IIS0 (1<<15) -#define S3C_CLKCON_PCLK_AC97 (1<<14) -#define S3C_CLKCON_PCLK_TZPC (1<<13) -#define S3C_CLKCON_PCLK_TSADC (1<<12) -#define S3C_CLKCON_PCLK_KEYPAD (1<<11) -#define S3C_CLKCON_PCLK_IRDA (1<<10) -#define S3C_CLKCON_PCLK_PCM1 (1<<9) -#define S3C_CLKCON_PCLK_PCM0 (1<<8) -#define S3C_CLKCON_PCLK_PWM (1<<7) -#define S3C_CLKCON_PCLK_RTC (1<<6) -#define S3C_CLKCON_PCLK_WDT (1<<5) -#define S3C_CLKCON_PCLK_UART3 (1<<4) -#define S3C_CLKCON_PCLK_UART2 (1<<3) -#define S3C_CLKCON_PCLK_UART1 (1<<2) -#define S3C_CLKCON_PCLK_UART0 (1<<1) -#define S3C_CLKCON_PCLK_MFC (1<<0) - -/* SCLK GATE Registers */ -#define S3C_CLKCON_SCLK_UHOST (1<<30) -#define S3C_CLKCON_SCLK_MMC2_48 (1<<29) -#define S3C_CLKCON_SCLK_MMC1_48 (1<<28) -#define S3C_CLKCON_SCLK_MMC0_48 (1<<27) -#define S3C_CLKCON_SCLK_MMC2 (1<<26) -#define S3C_CLKCON_SCLK_MMC1 (1<<25) -#define S3C_CLKCON_SCLK_MMC0 (1<<24) -#define S3C_CLKCON_SCLK_SPI1_48 (1<<23) -#define S3C_CLKCON_SCLK_SPI0_48 (1<<22) -#define S3C_CLKCON_SCLK_SPI1 (1<<21) -#define S3C_CLKCON_SCLK_SPI0 (1<<20) -#define S3C_CLKCON_SCLK_DAC27 (1<<19) -#define S3C_CLKCON_SCLK_TV27 (1<<18) -#define S3C_CLKCON_SCLK_SCALER27 (1<<17) -#define S3C_CLKCON_SCLK_SCALER (1<<16) -#define S3C_CLKCON_SCLK_LCD27 (1<<15) -#define S3C_CLKCON_SCLK_LCD (1<<14) -#define S3C6400_CLKCON_SCLK_POST1_27 (1<<13) -#define S3C6410_CLKCON_FIMC (1<<13) -#define S3C_CLKCON_SCLK_POST0_27 (1<<12) -#define S3C6400_CLKCON_SCLK_POST1 (1<<11) -#define S3C6410_CLKCON_SCLK_AUDIO2 (1<<11) -#define S3C_CLKCON_SCLK_POST0 (1<<10) -#define S3C_CLKCON_SCLK_AUDIO1 (1<<9) -#define S3C_CLKCON_SCLK_AUDIO0 (1<<8) -#define S3C_CLKCON_SCLK_SECUR (1<<7) -#define S3C_CLKCON_SCLK_IRDA (1<<6) -#define S3C_CLKCON_SCLK_UART (1<<5) -#define S3C_CLKCON_SCLK_ONENAND (1<<4) -#define S3C_CLKCON_SCLK_MFC (1<<3) -#define S3C_CLKCON_SCLK_CAM (1<<2) -#define S3C_CLKCON_SCLK_JPEG (1<<1) - -/* CLKSRC */ - -#define S3C6400_CLKSRC_APLL_MOUT (1 << 0) -#define S3C6400_CLKSRC_MPLL_MOUT (1 << 1) -#define S3C6400_CLKSRC_EPLL_MOUT (1 << 2) -#define S3C6400_CLKSRC_APLL_MOUT_SHIFT (0) -#define S3C6400_CLKSRC_MPLL_MOUT_SHIFT (1) -#define S3C6400_CLKSRC_EPLL_MOUT_SHIFT (2) -#define S3C6400_CLKSRC_MFC (1 << 4) - -#endif /* _PLAT_REGS_CLOCK_H */ diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/plat-s3c64xx/irq-eint.c index ebdf183a0911..5682d6a7f4af 100644 --- a/arch/arm/plat-s3c64xx/irq-eint.c +++ b/arch/arm/plat-s3c64xx/irq-eint.c @@ -22,7 +22,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/plat-s3c64xx/irq-pm.c b/arch/arm/plat-s3c64xx/irq-pm.c index ca523b5d4c17..da1bec64b9da 100644 --- a/arch/arm/plat-s3c64xx/irq-pm.c +++ b/arch/arm/plat-s3c64xx/irq-pm.c @@ -23,7 +23,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/plat-s3c64xx/pm.c b/arch/arm/plat-s3c64xx/pm.c index 47632fc7eb66..b8ac4597fad7 100644 --- a/arch/arm/plat-s3c64xx/pm.c +++ b/arch/arm/plat-s3c64xx/pm.c @@ -20,14 +20,14 @@ #include #include -#include -#include -#include -#include -#include +#include +#include +#include +#include +#include #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK -#include +#include void s3c_pm_debug_smdkled(u32 set, u32 clear) { diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c index cb2bf4bff051..85f7bb053f72 100644 --- a/arch/arm/plat-s3c64xx/s3c6400-clock.c +++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c @@ -27,7 +27,7 @@ #include -#include +#include #include #include #include diff --git a/arch/arm/plat-s3c64xx/setup-i2c0.c b/arch/arm/plat-s3c64xx/setup-i2c0.c index 364480763728..d1b11e6e77e8 100644 --- a/arch/arm/plat-s3c64xx/setup-i2c0.c +++ b/arch/arm/plat-s3c64xx/setup-i2c0.c @@ -18,8 +18,8 @@ struct platform_device; /* don't need the contents */ #include +#include #include -#include #include void s3c_i2c0_cfg_gpio(struct platform_device *dev) diff --git a/arch/arm/plat-s3c64xx/setup-i2c1.c b/arch/arm/plat-s3c64xx/setup-i2c1.c index bbe229bd90ca..2dce57d8c6f8 100644 --- a/arch/arm/plat-s3c64xx/setup-i2c1.c +++ b/arch/arm/plat-s3c64xx/setup-i2c1.c @@ -18,8 +18,8 @@ struct platform_device; /* don't need the contents */ #include +#include #include -#include #include void s3c_i2c1_cfg_gpio(struct platform_device *dev) diff --git a/arch/arm/plat-s3c64xx/sleep.S b/arch/arm/plat-s3c64xx/sleep.S index 8e71fe90a373..b2ef44317368 100644 --- a/arch/arm/plat-s3c64xx/sleep.S +++ b/arch/arm/plat-s3c64xx/sleep.S @@ -1,4 +1,4 @@ -/* linux/0arch/arm/plat-s3c64xx/sleep.S +/* linux/arch/arm/plat-s3c64xx/sleep.S * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics @@ -19,8 +19,8 @@ #undef S3C64XX_VA_GPIO #define S3C64XX_VA_GPIO (0x0) -#include -#include +#include +#include #define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT)) From ed618aff8a952f712caf1d475e0947a32a8b6606 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 26 Jan 2010 11:07:23 +0900 Subject: [PATCH 05/14] ARM: S3C64XX: Move IRQ support into mach-s3c64xx Move IRQ support to mach-s3c64xx as it is unlikely to be re-used outside this machine. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c64xx/Makefile | 7 + .../mach-s3c64xx/include/mach/entry-macro.S | 2 +- arch/arm/mach-s3c64xx/include/mach/irqs.h | 210 ++++++++++++++++- .../{plat-s3c64xx => mach-s3c64xx}/irq-eint.c | 0 .../{plat-s3c64xx => mach-s3c64xx}/irq-pm.c | 0 arch/arm/{plat-s3c64xx => mach-s3c64xx}/irq.c | 0 arch/arm/plat-s3c64xx/Makefile | 3 - arch/arm/plat-s3c64xx/include/plat/irqs.h | 214 ------------------ 8 files changed, 212 insertions(+), 224 deletions(-) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/irq-eint.c (100%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/irq-pm.c (100%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/irq.c (100%) delete mode 100644 arch/arm/plat-s3c64xx/include/plat/irqs.h diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index 21ddf6b29280..103bed48b46e 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile @@ -15,10 +15,17 @@ obj- := obj-$(CONFIG_CPU_S3C6400) += s3c6400.o obj-$(CONFIG_CPU_S3C6410) += s3c6410.o +obj-y += irq.o +obj-y += irq-eint.o + # setup support obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o +# PM + +obj-$(CONFIG_PM) += irq-pm.o + # Machine support obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S index 33a8fe240882..dd362604dcce 100644 --- a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S +++ b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S @@ -13,6 +13,6 @@ */ #include -#include +#include #include diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h index 4c97f9a4370b..44bb3e491b5c 100644 --- a/arch/arm/mach-s3c64xx/include/mach/irqs.h +++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h @@ -1,16 +1,214 @@ -/* linux/arch/arm/mach-s3c6400/include/mach/irqs.h +/* linux/arch/arm/mach-s3c64xx/include/mach/irqs.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics * Ben Dooks * http://armlinux.simtec.co.uk/ * - * S3C6400 - IRQ definitions + * S3C64XX - IRQ support */ -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H __FILE__ +#ifndef __ASM_MACH_S3C64XX_IRQS_H +#define __ASM_MACH_S3C64XX_IRQS_H __FILE__ -#include +/* we keep the first set of CPU IRQs out of the range of + * the ISA space, so that the PC104 has them to itself + * and we don't end up having to do horrible things to the + * standard ISA drivers.... + * + * note, since we're using the VICs, our start must be a + * mulitple of 32 to allow the common code to work + */ + +#define S3C_IRQ_OFFSET (32) + +#define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET) + +#define IRQ_VIC0_BASE S3C_IRQ(0) +#define IRQ_VIC1_BASE S3C_IRQ(32) + +/* UART interrupts, each UART has 4 intterupts per channel so + * use the space between the ISA and S3C main interrupts. Note, these + * are not in the same order as the S3C24XX series! */ + +#define IRQ_S3CUART_BASE0 (16) +#define IRQ_S3CUART_BASE1 (20) +#define IRQ_S3CUART_BASE2 (24) +#define IRQ_S3CUART_BASE3 (28) + +#define UART_IRQ_RXD (0) +#define UART_IRQ_ERR (1) +#define UART_IRQ_TXD (2) +#define UART_IRQ_MODEM (3) + +#define IRQ_S3CUART_RX0 (IRQ_S3CUART_BASE0 + UART_IRQ_RXD) +#define IRQ_S3CUART_TX0 (IRQ_S3CUART_BASE0 + UART_IRQ_TXD) +#define IRQ_S3CUART_ERR0 (IRQ_S3CUART_BASE0 + UART_IRQ_ERR) + +#define IRQ_S3CUART_RX1 (IRQ_S3CUART_BASE1 + UART_IRQ_RXD) +#define IRQ_S3CUART_TX1 (IRQ_S3CUART_BASE1 + UART_IRQ_TXD) +#define IRQ_S3CUART_ERR1 (IRQ_S3CUART_BASE1 + UART_IRQ_ERR) + +#define IRQ_S3CUART_RX2 (IRQ_S3CUART_BASE2 + UART_IRQ_RXD) +#define IRQ_S3CUART_TX2 (IRQ_S3CUART_BASE2 + UART_IRQ_TXD) +#define IRQ_S3CUART_ERR2 (IRQ_S3CUART_BASE2 + UART_IRQ_ERR) + +#define IRQ_S3CUART_RX3 (IRQ_S3CUART_BASE3 + UART_IRQ_RXD) +#define IRQ_S3CUART_TX3 (IRQ_S3CUART_BASE3 + UART_IRQ_TXD) +#define IRQ_S3CUART_ERR3 (IRQ_S3CUART_BASE3 + UART_IRQ_ERR) + +/* VIC based IRQs */ + +#define S3C64XX_IRQ_VIC0(x) (IRQ_VIC0_BASE + (x)) +#define S3C64XX_IRQ_VIC1(x) (IRQ_VIC1_BASE + (x)) + +/* VIC0 */ + +#define IRQ_EINT0_3 S3C64XX_IRQ_VIC0(0) +#define IRQ_EINT4_11 S3C64XX_IRQ_VIC0(1) +#define IRQ_RTC_TIC S3C64XX_IRQ_VIC0(2) +#define IRQ_CAMIF_C S3C64XX_IRQ_VIC0(3) +#define IRQ_CAMIF_P S3C64XX_IRQ_VIC0(4) +#define IRQ_CAMIF_MC S3C64XX_IRQ_VIC0(5) +#define IRQ_S3C6410_IIC1 S3C64XX_IRQ_VIC0(5) +#define IRQ_S3C6410_IIS S3C64XX_IRQ_VIC0(6) +#define IRQ_S3C6400_CAMIF_MP S3C64XX_IRQ_VIC0(6) +#define IRQ_CAMIF_WE_C S3C64XX_IRQ_VIC0(7) +#define IRQ_S3C6410_G3D S3C64XX_IRQ_VIC0(8) +#define IRQ_S3C6400_CAMIF_WE_P S3C64XX_IRQ_VIC0(8) +#define IRQ_POST0 S3C64XX_IRQ_VIC0(9) +#define IRQ_ROTATOR S3C64XX_IRQ_VIC0(10) +#define IRQ_2D S3C64XX_IRQ_VIC0(11) +#define IRQ_TVENC S3C64XX_IRQ_VIC0(12) +#define IRQ_SCALER S3C64XX_IRQ_VIC0(13) +#define IRQ_BATF S3C64XX_IRQ_VIC0(14) +#define IRQ_JPEG S3C64XX_IRQ_VIC0(15) +#define IRQ_MFC S3C64XX_IRQ_VIC0(16) +#define IRQ_SDMA0 S3C64XX_IRQ_VIC0(17) +#define IRQ_SDMA1 S3C64XX_IRQ_VIC0(18) +#define IRQ_ARM_DMAERR S3C64XX_IRQ_VIC0(19) +#define IRQ_ARM_DMA S3C64XX_IRQ_VIC0(20) +#define IRQ_ARM_DMAS S3C64XX_IRQ_VIC0(21) +#define IRQ_KEYPAD S3C64XX_IRQ_VIC0(22) +#define IRQ_TIMER0_VIC S3C64XX_IRQ_VIC0(23) +#define IRQ_TIMER1_VIC S3C64XX_IRQ_VIC0(24) +#define IRQ_TIMER2_VIC S3C64XX_IRQ_VIC0(25) +#define IRQ_WDT S3C64XX_IRQ_VIC0(26) +#define IRQ_TIMER3_VIC S3C64XX_IRQ_VIC0(27) +#define IRQ_TIMER4_VIC S3C64XX_IRQ_VIC0(28) +#define IRQ_LCD_FIFO S3C64XX_IRQ_VIC0(29) +#define IRQ_LCD_VSYNC S3C64XX_IRQ_VIC0(30) +#define IRQ_LCD_SYSTEM S3C64XX_IRQ_VIC0(31) + +/* VIC1 */ + +#define IRQ_EINT12_19 S3C64XX_IRQ_VIC1(0) +#define IRQ_EINT20_27 S3C64XX_IRQ_VIC1(1) +#define IRQ_PCM0 S3C64XX_IRQ_VIC1(2) +#define IRQ_PCM1 S3C64XX_IRQ_VIC1(3) +#define IRQ_AC97 S3C64XX_IRQ_VIC1(4) +#define IRQ_UART0 S3C64XX_IRQ_VIC1(5) +#define IRQ_UART1 S3C64XX_IRQ_VIC1(6) +#define IRQ_UART2 S3C64XX_IRQ_VIC1(7) +#define IRQ_UART3 S3C64XX_IRQ_VIC1(8) +#define IRQ_DMA0 S3C64XX_IRQ_VIC1(9) +#define IRQ_DMA1 S3C64XX_IRQ_VIC1(10) +#define IRQ_ONENAND0 S3C64XX_IRQ_VIC1(11) +#define IRQ_ONENAND1 S3C64XX_IRQ_VIC1(12) +#define IRQ_NFC S3C64XX_IRQ_VIC1(13) +#define IRQ_CFCON S3C64XX_IRQ_VIC1(14) +#define IRQ_USBH S3C64XX_IRQ_VIC1(15) +#define IRQ_SPI0 S3C64XX_IRQ_VIC1(16) +#define IRQ_SPI1 S3C64XX_IRQ_VIC1(17) +#define IRQ_IIC S3C64XX_IRQ_VIC1(18) +#define IRQ_HSItx S3C64XX_IRQ_VIC1(19) +#define IRQ_HSIrx S3C64XX_IRQ_VIC1(20) +#define IRQ_RESERVED S3C64XX_IRQ_VIC1(21) +#define IRQ_MSM S3C64XX_IRQ_VIC1(22) +#define IRQ_HOSTIF S3C64XX_IRQ_VIC1(23) +#define IRQ_HSMMC0 S3C64XX_IRQ_VIC1(24) +#define IRQ_HSMMC1 S3C64XX_IRQ_VIC1(25) +#define IRQ_HSMMC2 IRQ_SPI1 /* shared with SPI1 */ +#define IRQ_OTG S3C64XX_IRQ_VIC1(26) +#define IRQ_IRDA S3C64XX_IRQ_VIC1(27) +#define IRQ_RTC_ALARM S3C64XX_IRQ_VIC1(28) +#define IRQ_SEC S3C64XX_IRQ_VIC1(29) +#define IRQ_PENDN S3C64XX_IRQ_VIC1(30) +#define IRQ_TC IRQ_PENDN +#define IRQ_ADC S3C64XX_IRQ_VIC1(31) + +#define S3C64XX_TIMER_IRQ(x) S3C_IRQ(64 + (x)) + +#define IRQ_TIMER0 S3C64XX_TIMER_IRQ(0) +#define IRQ_TIMER1 S3C64XX_TIMER_IRQ(1) +#define IRQ_TIMER2 S3C64XX_TIMER_IRQ(2) +#define IRQ_TIMER3 S3C64XX_TIMER_IRQ(3) +#define IRQ_TIMER4 S3C64XX_TIMER_IRQ(4) + +/* compatibility for device defines */ + +#define IRQ_IIC1 IRQ_S3C6410_IIC1 + +/* Since the IRQ_EINT(x) are a linear mapping on current s3c64xx series + * we just defined them as an IRQ_EINT(x) macro from S3C_IRQ_EINT_BASE + * which we place after the pair of VICs. */ + +#define S3C_IRQ_EINT_BASE S3C_IRQ(64+5) + +#define S3C_EINT(x) ((x) + S3C_IRQ_EINT_BASE) +#define IRQ_EINT(x) S3C_EINT(x) +#define IRQ_EINT_BIT(x) ((x) - S3C_EINT(0)) + +/* Next the external interrupt groups. These are similar to the IRQ_EINT(x) + * that they are sourced from the GPIO pins but with a different scheme for + * priority and source indication. + * + * The IRQ_EINT(x) can be thought of as 'group 0' of the available GPIO + * interrupts, but for historical reasons they are kept apart from these + * next interrupts. + * + * Use IRQ_EINT_GROUP(group, offset) to get the number for use in the + * machine specific support files. + */ + +#define IRQ_EINT_GROUP1_NR (15) +#define IRQ_EINT_GROUP2_NR (8) +#define IRQ_EINT_GROUP3_NR (5) +#define IRQ_EINT_GROUP4_NR (14) +#define IRQ_EINT_GROUP5_NR (7) +#define IRQ_EINT_GROUP6_NR (10) +#define IRQ_EINT_GROUP7_NR (16) +#define IRQ_EINT_GROUP8_NR (15) +#define IRQ_EINT_GROUP9_NR (9) + +#define IRQ_EINT_GROUP_BASE S3C_EINT(28) +#define IRQ_EINT_GROUP1_BASE (IRQ_EINT_GROUP_BASE + 0x00) +#define IRQ_EINT_GROUP2_BASE (IRQ_EINT_GROUP1_BASE + IRQ_EINT_GROUP1_NR) +#define IRQ_EINT_GROUP3_BASE (IRQ_EINT_GROUP2_BASE + IRQ_EINT_GROUP2_NR) +#define IRQ_EINT_GROUP4_BASE (IRQ_EINT_GROUP3_BASE + IRQ_EINT_GROUP3_NR) +#define IRQ_EINT_GROUP5_BASE (IRQ_EINT_GROUP4_BASE + IRQ_EINT_GROUP4_NR) +#define IRQ_EINT_GROUP6_BASE (IRQ_EINT_GROUP5_BASE + IRQ_EINT_GROUP5_NR) +#define IRQ_EINT_GROUP7_BASE (IRQ_EINT_GROUP6_BASE + IRQ_EINT_GROUP6_NR) +#define IRQ_EINT_GROUP8_BASE (IRQ_EINT_GROUP7_BASE + IRQ_EINT_GROUP7_NR) +#define IRQ_EINT_GROUP9_BASE (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR) + +#define IRQ_EINT_GROUP(group, no) (IRQ_EINT_GROUP##group##_BASE + (no)) + +/* Define a group of interrupts for board-specific use (eg, for MFD + * interrupt controllers). */ +#define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1) + +#ifdef CONFIG_SMDK6410_WM1190_EV1 +#define IRQ_BOARD_NR 64 +#else +#define IRQ_BOARD_NR 16 +#endif + +#define IRQ_BOARD_END (IRQ_BOARD_START + IRQ_BOARD_NR) + +/* Set the default NR_IRQS */ + +#define NR_IRQS (IRQ_BOARD_END + 1) + +#endif /* __ASM_MACH_S3C64XX_IRQS_H */ -#endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c similarity index 100% rename from arch/arm/plat-s3c64xx/irq-eint.c rename to arch/arm/mach-s3c64xx/irq-eint.c diff --git a/arch/arm/plat-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c similarity index 100% rename from arch/arm/plat-s3c64xx/irq-pm.c rename to arch/arm/mach-s3c64xx/irq-pm.c diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c similarity index 100% rename from arch/arm/plat-s3c64xx/irq.c rename to arch/arm/mach-s3c64xx/irq.c diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/plat-s3c64xx/Makefile index 80255a5e1789..3e52dcdb3648 100644 --- a/arch/arm/plat-s3c64xx/Makefile +++ b/arch/arm/plat-s3c64xx/Makefile @@ -15,8 +15,6 @@ obj- := obj-y += dev-uart.o obj-y += dev-rtc.o obj-y += cpu.o -obj-y += irq.o -obj-y += irq-eint.o obj-y += clock.o obj-y += gpiolib.o @@ -30,7 +28,6 @@ obj-$(CONFIG_CPU_FREQ_S3C64XX) += cpufreq.o obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_PM) += sleep.o -obj-$(CONFIG_PM) += irq-pm.o # DMA support diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h deleted file mode 100644 index a22758194e6d..000000000000 --- a/arch/arm/plat-s3c64xx/include/plat/irqs.h +++ /dev/null @@ -1,214 +0,0 @@ -/* linux/arch/arm/plat-s3c64xx/include/mach/irqs.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * S3C64XX - Common IRQ support - */ - -#ifndef __ASM_PLAT_S3C64XX_IRQS_H -#define __ASM_PLAT_S3C64XX_IRQS_H __FILE__ - -/* we keep the first set of CPU IRQs out of the range of - * the ISA space, so that the PC104 has them to itself - * and we don't end up having to do horrible things to the - * standard ISA drivers.... - * - * note, since we're using the VICs, our start must be a - * mulitple of 32 to allow the common code to work - */ - -#define S3C_IRQ_OFFSET (32) - -#define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET) - -#define IRQ_VIC0_BASE S3C_IRQ(0) -#define IRQ_VIC1_BASE S3C_IRQ(32) - -/* UART interrupts, each UART has 4 intterupts per channel so - * use the space between the ISA and S3C main interrupts. Note, these - * are not in the same order as the S3C24XX series! */ - -#define IRQ_S3CUART_BASE0 (16) -#define IRQ_S3CUART_BASE1 (20) -#define IRQ_S3CUART_BASE2 (24) -#define IRQ_S3CUART_BASE3 (28) - -#define UART_IRQ_RXD (0) -#define UART_IRQ_ERR (1) -#define UART_IRQ_TXD (2) -#define UART_IRQ_MODEM (3) - -#define IRQ_S3CUART_RX0 (IRQ_S3CUART_BASE0 + UART_IRQ_RXD) -#define IRQ_S3CUART_TX0 (IRQ_S3CUART_BASE0 + UART_IRQ_TXD) -#define IRQ_S3CUART_ERR0 (IRQ_S3CUART_BASE0 + UART_IRQ_ERR) - -#define IRQ_S3CUART_RX1 (IRQ_S3CUART_BASE1 + UART_IRQ_RXD) -#define IRQ_S3CUART_TX1 (IRQ_S3CUART_BASE1 + UART_IRQ_TXD) -#define IRQ_S3CUART_ERR1 (IRQ_S3CUART_BASE1 + UART_IRQ_ERR) - -#define IRQ_S3CUART_RX2 (IRQ_S3CUART_BASE2 + UART_IRQ_RXD) -#define IRQ_S3CUART_TX2 (IRQ_S3CUART_BASE2 + UART_IRQ_TXD) -#define IRQ_S3CUART_ERR2 (IRQ_S3CUART_BASE2 + UART_IRQ_ERR) - -#define IRQ_S3CUART_RX3 (IRQ_S3CUART_BASE3 + UART_IRQ_RXD) -#define IRQ_S3CUART_TX3 (IRQ_S3CUART_BASE3 + UART_IRQ_TXD) -#define IRQ_S3CUART_ERR3 (IRQ_S3CUART_BASE3 + UART_IRQ_ERR) - -/* VIC based IRQs */ - -#define S3C64XX_IRQ_VIC0(x) (IRQ_VIC0_BASE + (x)) -#define S3C64XX_IRQ_VIC1(x) (IRQ_VIC1_BASE + (x)) - -/* VIC0 */ - -#define IRQ_EINT0_3 S3C64XX_IRQ_VIC0(0) -#define IRQ_EINT4_11 S3C64XX_IRQ_VIC0(1) -#define IRQ_RTC_TIC S3C64XX_IRQ_VIC0(2) -#define IRQ_CAMIF_C S3C64XX_IRQ_VIC0(3) -#define IRQ_CAMIF_P S3C64XX_IRQ_VIC0(4) -#define IRQ_CAMIF_MC S3C64XX_IRQ_VIC0(5) -#define IRQ_S3C6410_IIC1 S3C64XX_IRQ_VIC0(5) -#define IRQ_S3C6410_IIS S3C64XX_IRQ_VIC0(6) -#define IRQ_S3C6400_CAMIF_MP S3C64XX_IRQ_VIC0(6) -#define IRQ_CAMIF_WE_C S3C64XX_IRQ_VIC0(7) -#define IRQ_S3C6410_G3D S3C64XX_IRQ_VIC0(8) -#define IRQ_S3C6400_CAMIF_WE_P S3C64XX_IRQ_VIC0(8) -#define IRQ_POST0 S3C64XX_IRQ_VIC0(9) -#define IRQ_ROTATOR S3C64XX_IRQ_VIC0(10) -#define IRQ_2D S3C64XX_IRQ_VIC0(11) -#define IRQ_TVENC S3C64XX_IRQ_VIC0(12) -#define IRQ_SCALER S3C64XX_IRQ_VIC0(13) -#define IRQ_BATF S3C64XX_IRQ_VIC0(14) -#define IRQ_JPEG S3C64XX_IRQ_VIC0(15) -#define IRQ_MFC S3C64XX_IRQ_VIC0(16) -#define IRQ_SDMA0 S3C64XX_IRQ_VIC0(17) -#define IRQ_SDMA1 S3C64XX_IRQ_VIC0(18) -#define IRQ_ARM_DMAERR S3C64XX_IRQ_VIC0(19) -#define IRQ_ARM_DMA S3C64XX_IRQ_VIC0(20) -#define IRQ_ARM_DMAS S3C64XX_IRQ_VIC0(21) -#define IRQ_KEYPAD S3C64XX_IRQ_VIC0(22) -#define IRQ_TIMER0_VIC S3C64XX_IRQ_VIC0(23) -#define IRQ_TIMER1_VIC S3C64XX_IRQ_VIC0(24) -#define IRQ_TIMER2_VIC S3C64XX_IRQ_VIC0(25) -#define IRQ_WDT S3C64XX_IRQ_VIC0(26) -#define IRQ_TIMER3_VIC S3C64XX_IRQ_VIC0(27) -#define IRQ_TIMER4_VIC S3C64XX_IRQ_VIC0(28) -#define IRQ_LCD_FIFO S3C64XX_IRQ_VIC0(29) -#define IRQ_LCD_VSYNC S3C64XX_IRQ_VIC0(30) -#define IRQ_LCD_SYSTEM S3C64XX_IRQ_VIC0(31) - -/* VIC1 */ - -#define IRQ_EINT12_19 S3C64XX_IRQ_VIC1(0) -#define IRQ_EINT20_27 S3C64XX_IRQ_VIC1(1) -#define IRQ_PCM0 S3C64XX_IRQ_VIC1(2) -#define IRQ_PCM1 S3C64XX_IRQ_VIC1(3) -#define IRQ_AC97 S3C64XX_IRQ_VIC1(4) -#define IRQ_UART0 S3C64XX_IRQ_VIC1(5) -#define IRQ_UART1 S3C64XX_IRQ_VIC1(6) -#define IRQ_UART2 S3C64XX_IRQ_VIC1(7) -#define IRQ_UART3 S3C64XX_IRQ_VIC1(8) -#define IRQ_DMA0 S3C64XX_IRQ_VIC1(9) -#define IRQ_DMA1 S3C64XX_IRQ_VIC1(10) -#define IRQ_ONENAND0 S3C64XX_IRQ_VIC1(11) -#define IRQ_ONENAND1 S3C64XX_IRQ_VIC1(12) -#define IRQ_NFC S3C64XX_IRQ_VIC1(13) -#define IRQ_CFCON S3C64XX_IRQ_VIC1(14) -#define IRQ_USBH S3C64XX_IRQ_VIC1(15) -#define IRQ_SPI0 S3C64XX_IRQ_VIC1(16) -#define IRQ_SPI1 S3C64XX_IRQ_VIC1(17) -#define IRQ_IIC S3C64XX_IRQ_VIC1(18) -#define IRQ_HSItx S3C64XX_IRQ_VIC1(19) -#define IRQ_HSIrx S3C64XX_IRQ_VIC1(20) -#define IRQ_RESERVED S3C64XX_IRQ_VIC1(21) -#define IRQ_MSM S3C64XX_IRQ_VIC1(22) -#define IRQ_HOSTIF S3C64XX_IRQ_VIC1(23) -#define IRQ_HSMMC0 S3C64XX_IRQ_VIC1(24) -#define IRQ_HSMMC1 S3C64XX_IRQ_VIC1(25) -#define IRQ_HSMMC2 IRQ_SPI1 /* shared with SPI1 */ -#define IRQ_OTG S3C64XX_IRQ_VIC1(26) -#define IRQ_IRDA S3C64XX_IRQ_VIC1(27) -#define IRQ_RTC_ALARM S3C64XX_IRQ_VIC1(28) -#define IRQ_SEC S3C64XX_IRQ_VIC1(29) -#define IRQ_PENDN S3C64XX_IRQ_VIC1(30) -#define IRQ_TC IRQ_PENDN -#define IRQ_ADC S3C64XX_IRQ_VIC1(31) - -#define S3C64XX_TIMER_IRQ(x) S3C_IRQ(64 + (x)) - -#define IRQ_TIMER0 S3C64XX_TIMER_IRQ(0) -#define IRQ_TIMER1 S3C64XX_TIMER_IRQ(1) -#define IRQ_TIMER2 S3C64XX_TIMER_IRQ(2) -#define IRQ_TIMER3 S3C64XX_TIMER_IRQ(3) -#define IRQ_TIMER4 S3C64XX_TIMER_IRQ(4) - -/* compatibility for device defines */ - -#define IRQ_IIC1 IRQ_S3C6410_IIC1 - -/* Since the IRQ_EINT(x) are a linear mapping on current s3c64xx series - * we just defined them as an IRQ_EINT(x) macro from S3C_IRQ_EINT_BASE - * which we place after the pair of VICs. */ - -#define S3C_IRQ_EINT_BASE S3C_IRQ(64+5) - -#define S3C_EINT(x) ((x) + S3C_IRQ_EINT_BASE) -#define IRQ_EINT(x) S3C_EINT(x) -#define IRQ_EINT_BIT(x) ((x) - S3C_EINT(0)) - -/* Next the external interrupt groups. These are similar to the IRQ_EINT(x) - * that they are sourced from the GPIO pins but with a different scheme for - * priority and source indication. - * - * The IRQ_EINT(x) can be thought of as 'group 0' of the available GPIO - * interrupts, but for historical reasons they are kept apart from these - * next interrupts. - * - * Use IRQ_EINT_GROUP(group, offset) to get the number for use in the - * machine specific support files. - */ - -#define IRQ_EINT_GROUP1_NR (15) -#define IRQ_EINT_GROUP2_NR (8) -#define IRQ_EINT_GROUP3_NR (5) -#define IRQ_EINT_GROUP4_NR (14) -#define IRQ_EINT_GROUP5_NR (7) -#define IRQ_EINT_GROUP6_NR (10) -#define IRQ_EINT_GROUP7_NR (16) -#define IRQ_EINT_GROUP8_NR (15) -#define IRQ_EINT_GROUP9_NR (9) - -#define IRQ_EINT_GROUP_BASE S3C_EINT(28) -#define IRQ_EINT_GROUP1_BASE (IRQ_EINT_GROUP_BASE + 0x00) -#define IRQ_EINT_GROUP2_BASE (IRQ_EINT_GROUP1_BASE + IRQ_EINT_GROUP1_NR) -#define IRQ_EINT_GROUP3_BASE (IRQ_EINT_GROUP2_BASE + IRQ_EINT_GROUP2_NR) -#define IRQ_EINT_GROUP4_BASE (IRQ_EINT_GROUP3_BASE + IRQ_EINT_GROUP3_NR) -#define IRQ_EINT_GROUP5_BASE (IRQ_EINT_GROUP4_BASE + IRQ_EINT_GROUP4_NR) -#define IRQ_EINT_GROUP6_BASE (IRQ_EINT_GROUP5_BASE + IRQ_EINT_GROUP5_NR) -#define IRQ_EINT_GROUP7_BASE (IRQ_EINT_GROUP6_BASE + IRQ_EINT_GROUP6_NR) -#define IRQ_EINT_GROUP8_BASE (IRQ_EINT_GROUP7_BASE + IRQ_EINT_GROUP7_NR) -#define IRQ_EINT_GROUP9_BASE (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR) - -#define IRQ_EINT_GROUP(group, no) (IRQ_EINT_GROUP##group##_BASE + (no)) - -/* Define a group of interrupts for board-specific use (eg, for MFD - * interrupt controllers). */ -#define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1) - -#ifdef CONFIG_SMDK6410_WM1190_EV1 -#define IRQ_BOARD_NR 64 -#else -#define IRQ_BOARD_NR 16 -#endif - -#define IRQ_BOARD_END (IRQ_BOARD_START + IRQ_BOARD_NR) - -/* Set the default NR_IRQS */ - -#define NR_IRQS (IRQ_BOARD_END + 1) - -#endif /* __ASM_PLAT_S3C64XX_IRQS_H */ - From 88fc68a280709f3fb9488986ab39eac330d17b6d Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 26 Jan 2010 11:19:18 +0900 Subject: [PATCH 06/14] ARM: S3C64XX: Move device and device setup into mach-s3c64xx Move the S3C64XX specific device and setup files into mach-s3c64xx as they are unlikely to be used outside of this code. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c64xx/Kconfig | 26 +++++++++++++++++++ arch/arm/mach-s3c64xx/Makefile | 13 +++++++++- .../{plat-s3c64xx => mach-s3c64xx}/dev-adc.c | 0 .../dev-audio.c | 0 .../{plat-s3c64xx => mach-s3c64xx}/dev-rtc.c | 0 .../{plat-s3c64xx => mach-s3c64xx}/dev-spi.c | 2 +- .../{plat-s3c64xx => mach-s3c64xx}/dev-uart.c | 0 .../include/mach}/spi-clocks.h | 2 +- .../setup-fb-24bpp.c | 0 .../setup-i2c0.c | 0 .../setup-i2c1.c | 0 .../setup-sdhci-gpio.c | 0 arch/arm/plat-s3c64xx/Kconfig | 26 ------------------- arch/arm/plat-s3c64xx/Makefile | 15 ----------- 14 files changed, 40 insertions(+), 44 deletions(-) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/dev-adc.c (100%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/dev-audio.c (100%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/dev-rtc.c (100%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/dev-spi.c (99%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/dev-uart.c (100%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/spi-clocks.h (89%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/setup-fb-24bpp.c (100%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/setup-i2c0.c (100%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/setup-i2c1.c (100%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/setup-sdhci-gpio.c (100%) diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index ce32e4997d76..15e065ef19a5 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -26,6 +26,32 @@ config S3C64XX_SETUP_SDHCI Internal configuration for default SDHCI setup for S3C6400 and S3C6410 SoCs. +# platform specific device setup + +config S3C64XX_SETUP_I2C0 + bool + default y + help + Common setup code for i2c bus 0. + + Note, currently since i2c0 is always compiled, this setup helper + is always compiled with it. + +config S3C64XX_SETUP_I2C1 + bool + help + Common setup code for i2c bus 1. + +config S3C64XX_SETUP_FB_24BPP + bool + help + Common setup code for S3C64XX with an 24bpp RGB display helper. + +config S3C64XX_SETUP_SDHCI_GPIO + bool + help + Common setup code for S3C64XX SDHCI GPIO configurations + # S36400 Macchine support config MACH_SMDK6400 diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index 103bed48b46e..49b71d5f2e59 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile @@ -18,9 +18,13 @@ obj-$(CONFIG_CPU_S3C6410) += s3c6410.o obj-y += irq.o obj-y += irq-eint.o -# setup support +# Device setup +obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o +obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o +obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o +obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o # PM @@ -33,3 +37,10 @@ obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o obj-$(CONFIG_MACH_NCP) += mach-ncp.o obj-$(CONFIG_MACH_HMT) += mach-hmt.o + +# device support + +obj-y += dev-uart.o +obj-y += dev-rtc.o +obj-$(CONFIG_S3C_ADC) += dev-adc.o +obj-$(CONFIG_SND_S3C24XX_SOC) += dev-audio.o diff --git a/arch/arm/plat-s3c64xx/dev-adc.c b/arch/arm/mach-s3c64xx/dev-adc.c similarity index 100% rename from arch/arm/plat-s3c64xx/dev-adc.c rename to arch/arm/mach-s3c64xx/dev-adc.c diff --git a/arch/arm/plat-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c similarity index 100% rename from arch/arm/plat-s3c64xx/dev-audio.c rename to arch/arm/mach-s3c64xx/dev-audio.c diff --git a/arch/arm/plat-s3c64xx/dev-rtc.c b/arch/arm/mach-s3c64xx/dev-rtc.c similarity index 100% rename from arch/arm/plat-s3c64xx/dev-rtc.c rename to arch/arm/mach-s3c64xx/dev-rtc.c diff --git a/arch/arm/plat-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c similarity index 99% rename from arch/arm/plat-s3c64xx/dev-spi.c rename to arch/arm/mach-s3c64xx/dev-spi.c index 0c20d27d9b65..29c32d088515 100644 --- a/arch/arm/plat-s3c64xx/dev-spi.c +++ b/arch/arm/mach-s3c64xx/dev-spi.c @@ -17,8 +17,8 @@ #include #include #include +#include -#include #include #include #include diff --git a/arch/arm/plat-s3c64xx/dev-uart.c b/arch/arm/mach-s3c64xx/dev-uart.c similarity index 100% rename from arch/arm/plat-s3c64xx/dev-uart.c rename to arch/arm/mach-s3c64xx/dev-uart.c diff --git a/arch/arm/plat-s3c64xx/include/plat/spi-clocks.h b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h similarity index 89% rename from arch/arm/plat-s3c64xx/include/plat/spi-clocks.h rename to arch/arm/mach-s3c64xx/include/mach/spi-clocks.h index 524bdae3f625..9d0c43b4b687 100644 --- a/arch/arm/plat-s3c64xx/include/plat/spi-clocks.h +++ b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/spi-clocks.h +/* linux/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h * * Copyright (C) 2009 Samsung Electronics Ltd. * Jaswinder Singh diff --git a/arch/arm/plat-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c similarity index 100% rename from arch/arm/plat-s3c64xx/setup-fb-24bpp.c rename to arch/arm/mach-s3c64xx/setup-fb-24bpp.c diff --git a/arch/arm/plat-s3c64xx/setup-i2c0.c b/arch/arm/mach-s3c64xx/setup-i2c0.c similarity index 100% rename from arch/arm/plat-s3c64xx/setup-i2c0.c rename to arch/arm/mach-s3c64xx/setup-i2c0.c diff --git a/arch/arm/plat-s3c64xx/setup-i2c1.c b/arch/arm/mach-s3c64xx/setup-i2c1.c similarity index 100% rename from arch/arm/plat-s3c64xx/setup-i2c1.c rename to arch/arm/mach-s3c64xx/setup-i2c1.c diff --git a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c similarity index 100% rename from arch/arm/plat-s3c64xx/setup-sdhci-gpio.c rename to arch/arm/mach-s3c64xx/setup-sdhci-gpio.c diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig index 37b4519fb832..4edb580a02b7 100644 --- a/arch/arm/plat-s3c64xx/Kconfig +++ b/arch/arm/plat-s3c64xx/Kconfig @@ -46,30 +46,4 @@ config S3C64XX_DMA bool "S3C64XX DMA" select S3C_DMA -# platform specific device setup - -config S3C64XX_SETUP_I2C0 - bool - default y - help - Common setup code for i2c bus 0. - - Note, currently since i2c0 is always compiled, this setup helper - is always compiled with it. - -config S3C64XX_SETUP_I2C1 - bool - help - Common setup code for i2c bus 1. - -config S3C64XX_SETUP_FB_24BPP - bool - help - Common setup code for S3C64XX with an 24bpp RGB display helper. - -config S3C64XX_SETUP_SDHCI_GPIO - bool - help - Common setup code for S3C64XX SDHCI GPIO configurations - endif diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/plat-s3c64xx/Makefile index 3e52dcdb3648..187b779a2bdc 100644 --- a/arch/arm/plat-s3c64xx/Makefile +++ b/arch/arm/plat-s3c64xx/Makefile @@ -11,9 +11,6 @@ obj-n := dummy.o obj- := # Core files - -obj-y += dev-uart.o -obj-y += dev-rtc.o obj-y += cpu.o obj-y += clock.o obj-y += gpiolib.o @@ -33,15 +30,3 @@ obj-$(CONFIG_PM) += sleep.o obj-$(CONFIG_S3C64XX_DMA) += dma.o -# ADC support - -obj-$(CONFIG_S3C_ADC) += dev-adc.o - -# Device setup - -obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o -obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o -obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o -obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o -obj-$(CONFIG_SND_S3C24XX_SOC) += dev-audio.o -obj-$(CONFIG_SPI_S3C64XX) += dev-spi.o From f7be9abaa5f4a64fdcca6808bb7eacb3547e574e Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 26 Jan 2010 13:41:30 +0900 Subject: [PATCH 07/14] ARM: S3C64XX: Move core support to mach-s3c64xx Move the core S3C64XX support to mach-s3c64xx as it is unlikely to be used outside of this directory. Also move the SoC header files in with it. This includes the clock, cpu, cpufreq, dma, gpiolib and pll support. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c64xx/Kconfig | 4 ++++ arch/arm/mach-s3c64xx/Makefile | 15 +++++++++++++++ arch/arm/{plat-s3c64xx => mach-s3c64xx}/clock.c | 2 ++ arch/arm/{plat-s3c64xx => mach-s3c64xx}/cpu.c | 4 ++-- .../arm/{plat-s3c64xx => mach-s3c64xx}/cpufreq.c | 0 arch/arm/{plat-s3c64xx => mach-s3c64xx}/dma.c | 0 .../arm/{plat-s3c64xx => mach-s3c64xx}/gpiolib.c | 0 .../plat => mach-s3c64xx/include/mach}/pll.h | 0 .../plat => mach-s3c64xx/include/mach}/s3c6400.h | 3 +-- .../plat => mach-s3c64xx/include/mach}/s3c6410.h | 2 +- arch/arm/mach-s3c64xx/mach-anw6410.c | 2 +- arch/arm/mach-s3c64xx/mach-hmt.c | 2 +- arch/arm/mach-s3c64xx/mach-ncp.c | 2 +- arch/arm/mach-s3c64xx/mach-smdk6400.c | 2 +- arch/arm/mach-s3c64xx/mach-smdk6410.c | 2 +- arch/arm/{plat-s3c64xx => mach-s3c64xx}/pm.c | 0 arch/arm/mach-s3c64xx/s3c6400.c | 2 +- arch/arm/mach-s3c64xx/s3c6410.c | 4 ++-- arch/arm/{plat-s3c64xx => mach-s3c64xx}/sleep.S | 0 arch/arm/plat-s3c64xx/Kconfig | 4 ---- arch/arm/plat-s3c64xx/Makefile | 16 ---------------- arch/arm/plat-s3c64xx/s3c6400-init.c | 4 ++-- 22 files changed, 35 insertions(+), 35 deletions(-) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/clock.c (99%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/cpu.c (98%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/cpufreq.c (100%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/dma.c (100%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/gpiolib.c (100%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/pll.h (100%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/s3c6400.h (95%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/s3c6410.h (93%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/pm.c (100%) rename arch/arm/{plat-s3c64xx => mach-s3c64xx}/sleep.S (100%) diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index 15e065ef19a5..7c9cd9a9901a 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -19,6 +19,10 @@ config CPU_S3C6410 help Enable S3C6410 CPU support +config S3C64XX_DMA + bool "S3C64XX DMA" + select S3C_DMA + config S3C64XX_SETUP_SDHCI select S3C64XX_SETUP_SDHCI_GPIO bool diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index 49b71d5f2e59..4417f1ad99b6 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile @@ -10,6 +10,11 @@ obj-m := obj-n := obj- := +# Core files +obj-y += cpu.o +obj-y += clock.o +obj-y += gpiolib.o + # Core support for S3C6400 system obj-$(CONFIG_CPU_S3C6400) += s3c6400.o @@ -18,6 +23,14 @@ obj-$(CONFIG_CPU_S3C6410) += s3c6410.o obj-y += irq.o obj-y += irq-eint.o +# CPU frequency scaling + +obj-$(CONFIG_CPU_FREQ_S3C64XX) += cpufreq.o + +# DMA support + +obj-$(CONFIG_S3C64XX_DMA) += dma.o + # Device setup obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o @@ -28,6 +41,8 @@ obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o # PM +obj-$(CONFIG_PM) += pm.o +obj-$(CONFIG_PM) += sleep.o obj-$(CONFIG_PM) += irq-pm.o # Machine support diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c similarity index 99% rename from arch/arm/plat-s3c64xx/clock.c rename to arch/arm/mach-s3c64xx/clock.c index 64439de206cb..229bb3bcc54f 100644 --- a/arch/arm/plat-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c @@ -23,6 +23,8 @@ #include #include +#include + #include #include #include diff --git a/arch/arm/plat-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c similarity index 98% rename from arch/arm/plat-s3c64xx/cpu.c rename to arch/arm/mach-s3c64xx/cpu.c index bc7ca1812e32..410d688a6910 100644 --- a/arch/arm/plat-s3c64xx/cpu.c +++ b/arch/arm/mach-s3c64xx/cpu.c @@ -33,8 +33,8 @@ #include #include -#include -#include +#include +#include /* table of supported CPUs */ diff --git a/arch/arm/plat-s3c64xx/cpufreq.c b/arch/arm/mach-s3c64xx/cpufreq.c similarity index 100% rename from arch/arm/plat-s3c64xx/cpufreq.c rename to arch/arm/mach-s3c64xx/cpufreq.c diff --git a/arch/arm/plat-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c similarity index 100% rename from arch/arm/plat-s3c64xx/dma.c rename to arch/arm/mach-s3c64xx/dma.c diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c similarity index 100% rename from arch/arm/plat-s3c64xx/gpiolib.c rename to arch/arm/mach-s3c64xx/gpiolib.c diff --git a/arch/arm/plat-s3c64xx/include/plat/pll.h b/arch/arm/mach-s3c64xx/include/mach/pll.h similarity index 100% rename from arch/arm/plat-s3c64xx/include/plat/pll.h rename to arch/arm/mach-s3c64xx/include/mach/pll.h diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6400.h b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h similarity index 95% rename from arch/arm/plat-s3c64xx/include/plat/s3c6400.h rename to arch/arm/mach-s3c64xx/include/mach/s3c6400.h index 11f2e1e119b0..2bc7c07a928f 100644 --- a/arch/arm/plat-s3c64xx/include/plat/s3c6400.h +++ b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h @@ -1,4 +1,4 @@ -/* arch/arm/plat-s3c64xx/include/plat/s3c6400.h +/* arch/arm/mach-s3c64xx/include/macht/s3c6400.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics @@ -33,4 +33,3 @@ extern void s3c6400_init_clocks(int xtal); #define s3c6400_map_io NULL #define s3c6400_init NULL #endif - diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h b/arch/arm/mach-s3c64xx/include/mach/s3c6410.h similarity index 93% rename from arch/arm/plat-s3c64xx/include/plat/s3c6410.h rename to arch/arm/mach-s3c64xx/include/mach/s3c6410.h index 50dcdd6f6800..24f1141ffcb7 100644 --- a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h +++ b/arch/arm/mach-s3c64xx/include/mach/s3c6410.h @@ -1,4 +1,4 @@ -/* arch/arm/plat-s3c64xx/include/plat/s3c6410.h +/* arch/arm/mach-s3c64xx/include/mach/s3c6410.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c index 06d8fe579e10..4a0bb243d14a 100644 --- a/arch/arm/mach-s3c64xx/mach-anw6410.c +++ b/arch/arm/mach-s3c64xx/mach-anw6410.c @@ -45,7 +45,7 @@ #include #include -#include +#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c index 284886c26a28..a6d91c39f22e 100644 --- a/arch/arm/mach-s3c64xx/mach-hmt.c +++ b/arch/arm/mach-s3c64xx/mach-hmt.c @@ -38,7 +38,7 @@ #include #include -#include +#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c index 9be92ddd2176..bf65747ea68e 100644 --- a/arch/arm/mach-s3c64xx/mach-ncp.c +++ b/arch/arm/mach-s3c64xx/mach-ncp.c @@ -40,7 +40,7 @@ #include #include -#include +#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c index ba8a052a6142..f7b18983950c 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6400.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c @@ -31,7 +31,7 @@ #include -#include +#include #include #include #include diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index 021670e39d3e..fdf8f7539a12 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c @@ -54,7 +54,7 @@ #include #include -#include +#include #include #include #include diff --git a/arch/arm/plat-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c similarity index 100% rename from arch/arm/plat-s3c64xx/pm.c rename to arch/arm/mach-s3c64xx/pm.c diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c index 2fba1b263fed..720d0d1f3bfc 100644 --- a/arch/arm/mach-s3c64xx/s3c6400.c +++ b/arch/arm/mach-s3c64xx/s3c6400.c @@ -37,7 +37,7 @@ #include #include #include -#include +#include void __init s3c6400_map_io(void) { diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c index b881d6a50b11..fd457cc3ab87 100644 --- a/arch/arm/mach-s3c64xx/s3c6410.c +++ b/arch/arm/mach-s3c64xx/s3c6410.c @@ -38,8 +38,8 @@ #include #include #include -#include -#include +#include +#include void __init s3c6410_map_io(void) { diff --git a/arch/arm/plat-s3c64xx/sleep.S b/arch/arm/mach-s3c64xx/sleep.S similarity index 100% rename from arch/arm/plat-s3c64xx/sleep.S rename to arch/arm/mach-s3c64xx/sleep.S diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig index 4edb580a02b7..fb7e25f710e0 100644 --- a/arch/arm/plat-s3c64xx/Kconfig +++ b/arch/arm/plat-s3c64xx/Kconfig @@ -42,8 +42,4 @@ config CPU_S3C6400_CLOCK Common clock support code for the S3C6400 that is shared by other CPUs in the series, such as the S3C6410. -config S3C64XX_DMA - bool "S3C64XX DMA" - select S3C_DMA - endif diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/plat-s3c64xx/Makefile index 187b779a2bdc..bd4fe3b48eaa 100644 --- a/arch/arm/plat-s3c64xx/Makefile +++ b/arch/arm/plat-s3c64xx/Makefile @@ -10,23 +10,7 @@ obj-m := obj-n := dummy.o obj- := -# Core files -obj-y += cpu.o -obj-y += clock.o -obj-y += gpiolib.o - # CPU support obj-$(CONFIG_CPU_S3C6400_INIT) += s3c6400-init.o obj-$(CONFIG_CPU_S3C6400_CLOCK) += s3c6400-clock.o -obj-$(CONFIG_CPU_FREQ_S3C64XX) += cpufreq.o - -# PM support - -obj-$(CONFIG_PM) += pm.o -obj-$(CONFIG_PM) += sleep.o - -# DMA support - -obj-$(CONFIG_S3C64XX_DMA) += dma.o - diff --git a/arch/arm/plat-s3c64xx/s3c6400-init.c b/arch/arm/plat-s3c64xx/s3c6400-init.c index 6c28f39df097..e64caa4d02d9 100644 --- a/arch/arm/plat-s3c64xx/s3c6400-init.c +++ b/arch/arm/plat-s3c64xx/s3c6400-init.c @@ -18,8 +18,8 @@ #include #include -#include -#include +#include +#include /* uart registration process */ From 6ce8fde296e56cda9d7416e015ed2fe495c9c48c Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 26 Jan 2010 14:32:09 +0900 Subject: [PATCH 08/14] ARM: S3C64XX: Merge s3c6400-init.c into cpu.c Since this file is small, and is compiled for both systems in this architecture merge it into the cpu support file and remove the original instead of moving it. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c64xx/Kconfig | 2 -- arch/arm/mach-s3c64xx/cpu.c | 6 ++++++ arch/arm/plat-s3c64xx/Kconfig | 6 ------ arch/arm/plat-s3c64xx/Makefile | 1 - arch/arm/plat-s3c64xx/s3c6400-init.c | 29 ---------------------------- 5 files changed, 6 insertions(+), 38 deletions(-) delete mode 100644 arch/arm/plat-s3c64xx/s3c6400-init.c diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index 7c9cd9a9901a..33d82b1c9eff 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -7,14 +7,12 @@ config CPU_S3C6400 bool - select CPU_S3C6400_INIT select CPU_S3C6400_CLOCK help Enable S3C6400 CPU support config CPU_S3C6410 bool - select CPU_S3C6400_INIT select CPU_S3C6400_CLOCK help Enable S3C6410 CPU support diff --git a/arch/arm/mach-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c index 410d688a6910..374e45e566b8 100644 --- a/arch/arm/mach-s3c64xx/cpu.c +++ b/arch/arm/mach-s3c64xx/cpu.c @@ -129,6 +129,12 @@ static struct sys_device s3c64xx_sysdev = { .cls = &s3c64xx_sysclass, }; +/* uart registration process */ + +void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) +{ + s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no); +} /* read cpu identification code */ diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig index fb7e25f710e0..cc300894f364 100644 --- a/arch/arm/plat-s3c64xx/Kconfig +++ b/arch/arm/plat-s3c64xx/Kconfig @@ -30,12 +30,6 @@ if PLAT_S3C64XX # Configuration options shared by all S3C64XX implementations -config CPU_S3C6400_INIT - bool - help - Common initialisation code for the S3C6400 that is shared - by other CPUs in the series, such as the S3C6410. - config CPU_S3C6400_CLOCK bool help diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/plat-s3c64xx/Makefile index bd4fe3b48eaa..62fc25305ec4 100644 --- a/arch/arm/plat-s3c64xx/Makefile +++ b/arch/arm/plat-s3c64xx/Makefile @@ -12,5 +12,4 @@ obj- := # CPU support -obj-$(CONFIG_CPU_S3C6400_INIT) += s3c6400-init.o obj-$(CONFIG_CPU_S3C6400_CLOCK) += s3c6400-clock.o diff --git a/arch/arm/plat-s3c64xx/s3c6400-init.c b/arch/arm/plat-s3c64xx/s3c6400-init.c deleted file mode 100644 index e64caa4d02d9..000000000000 --- a/arch/arm/plat-s3c64xx/s3c6400-init.c +++ /dev/null @@ -1,29 +0,0 @@ -/* linux/arch/arm/plat-s3c64xx/s3c6400-init.c - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * S3C6400 - CPU initialisation (common with other S3C64XX chips) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include - -#include -#include -#include -#include - -/* uart registration process */ - -void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no); -} From 62acb2f82dc27cd40729e7d4c2879e57fe41b927 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 26 Jan 2010 14:53:19 +0900 Subject: [PATCH 09/14] ARM: S3C64XX: Merge s3c6400-clock.c and clock.c into mach-s3c64xx Merge plat-s3c64xx/s3c6400-clock.c mach-s3c64xx/clock.c placing all the clock code into one place. Note, no effort is made in this patch to squash the init functions together. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c64xx/Kconfig | 2 - arch/arm/mach-s3c64xx/clock.c | 507 ++++++++++++++++++++++++ arch/arm/plat-s3c64xx/Kconfig | 12 - arch/arm/plat-s3c64xx/Makefile | 3 - arch/arm/plat-s3c64xx/s3c6400-clock.c | 536 -------------------------- 5 files changed, 507 insertions(+), 553 deletions(-) delete mode 100644 arch/arm/plat-s3c64xx/s3c6400-clock.c diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index 33d82b1c9eff..8c2c89c24fce 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -7,13 +7,11 @@ config CPU_S3C6400 bool - select CPU_S3C6400_CLOCK help Enable S3C6400 CPU support config CPU_S3C6410 bool - select CPU_S3C6400_CLOCK help Enable S3C6410 CPU support diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index 229bb3bcc54f..9b587e267422 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c @@ -16,6 +16,8 @@ #include #include #include +#include +#include #include #include @@ -27,7 +29,25 @@ #include #include +#include #include +#include + +/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call + * ext_xtal_mux for want of an actual name from the manual. +*/ + +static struct clk clk_ext_xtal_mux = { + .name = "ext_xtal", + .id = -1, +}; + +#define clk_fin_apll clk_ext_xtal_mux +#define clk_fin_mpll clk_ext_xtal_mux +#define clk_fin_epll clk_ext_xtal_mux + +#define clk_fout_mpll clk_mpll +#define clk_fout_epll clk_epll struct clk clk_h2 = { .name = "hclk2", @@ -273,6 +293,493 @@ static struct clk init_clocks[] = { } }; + +static struct clk clk_fout_apll = { + .name = "fout_apll", + .id = -1, +}; + +static struct clk *clk_src_apll_list[] = { + [0] = &clk_fin_apll, + [1] = &clk_fout_apll, +}; + +static struct clksrc_sources clk_src_apll = { + .sources = clk_src_apll_list, + .nr_sources = ARRAY_SIZE(clk_src_apll_list), +}; + +static struct clksrc_clk clk_mout_apll = { + .clk = { + .name = "mout_apll", + .id = -1, + }, + .reg_src = { .reg = S3C_CLK_SRC, .shift = 0, .size = 1 }, + .sources = &clk_src_apll, +}; + +static struct clk *clk_src_epll_list[] = { + [0] = &clk_fin_epll, + [1] = &clk_fout_epll, +}; + +static struct clksrc_sources clk_src_epll = { + .sources = clk_src_epll_list, + .nr_sources = ARRAY_SIZE(clk_src_epll_list), +}; + +static struct clksrc_clk clk_mout_epll = { + .clk = { + .name = "mout_epll", + .id = -1, + }, + .reg_src = { .reg = S3C_CLK_SRC, .shift = 2, .size = 1 }, + .sources = &clk_src_epll, +}; + +static struct clk *clk_src_mpll_list[] = { + [0] = &clk_fin_mpll, + [1] = &clk_fout_mpll, +}; + +static struct clksrc_sources clk_src_mpll = { + .sources = clk_src_mpll_list, + .nr_sources = ARRAY_SIZE(clk_src_mpll_list), +}; + +static struct clksrc_clk clk_mout_mpll = { + .clk = { + .name = "mout_mpll", + .id = -1, + }, + .reg_src = { .reg = S3C_CLK_SRC, .shift = 1, .size = 1 }, + .sources = &clk_src_mpll, +}; + +static unsigned int armclk_mask; + +static unsigned long s3c64xx_clk_arm_get_rate(struct clk *clk) +{ + unsigned long rate = clk_get_rate(clk->parent); + u32 clkdiv; + + /* divisor mask starts at bit0, so no need to shift */ + clkdiv = __raw_readl(S3C_CLK_DIV0) & armclk_mask; + + return rate / (clkdiv + 1); +} + +static unsigned long s3c64xx_clk_arm_round_rate(struct clk *clk, + unsigned long rate) +{ + unsigned long parent = clk_get_rate(clk->parent); + u32 div; + + if (parent < rate) + return parent; + + div = (parent / rate) - 1; + if (div > armclk_mask) + div = armclk_mask; + + return parent / (div + 1); +} + +static int s3c64xx_clk_arm_set_rate(struct clk *clk, unsigned long rate) +{ + unsigned long parent = clk_get_rate(clk->parent); + u32 div; + u32 val; + + if (rate < parent / (armclk_mask + 1)) + return -EINVAL; + + rate = clk_round_rate(clk, rate); + div = clk_get_rate(clk->parent) / rate; + + val = __raw_readl(S3C_CLK_DIV0); + val &= ~armclk_mask; + val |= (div - 1); + __raw_writel(val, S3C_CLK_DIV0); + + return 0; + +} + +static struct clk clk_arm = { + .name = "armclk", + .id = -1, + .parent = &clk_mout_apll.clk, + .ops = &(struct clk_ops) { + .get_rate = s3c64xx_clk_arm_get_rate, + .set_rate = s3c64xx_clk_arm_set_rate, + .round_rate = s3c64xx_clk_arm_round_rate, + }, +}; + +static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk) +{ + unsigned long rate = clk_get_rate(clk->parent); + + printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); + + if (__raw_readl(S3C_CLK_DIV0) & S3C6400_CLKDIV0_MPLL_MASK) + rate /= 2; + + return rate; +} + +static struct clk_ops clk_dout_ops = { + .get_rate = s3c64xx_clk_doutmpll_get_rate, +}; + +static struct clk clk_dout_mpll = { + .name = "dout_mpll", + .id = -1, + .parent = &clk_mout_mpll.clk, + .ops = &clk_dout_ops, +}; + +static struct clk *clkset_spi_mmc_list[] = { + &clk_mout_epll.clk, + &clk_dout_mpll, + &clk_fin_epll, + &clk_27m, +}; + +static struct clksrc_sources clkset_spi_mmc = { + .sources = clkset_spi_mmc_list, + .nr_sources = ARRAY_SIZE(clkset_spi_mmc_list), +}; + +static struct clk *clkset_irda_list[] = { + &clk_mout_epll.clk, + &clk_dout_mpll, + NULL, + &clk_27m, +}; + +static struct clksrc_sources clkset_irda = { + .sources = clkset_irda_list, + .nr_sources = ARRAY_SIZE(clkset_irda_list), +}; + +static struct clk *clkset_uart_list[] = { + &clk_mout_epll.clk, + &clk_dout_mpll, + NULL, + NULL +}; + +static struct clksrc_sources clkset_uart = { + .sources = clkset_uart_list, + .nr_sources = ARRAY_SIZE(clkset_uart_list), +}; + +static struct clk *clkset_uhost_list[] = { + &clk_48m, + &clk_mout_epll.clk, + &clk_dout_mpll, + &clk_fin_epll, +}; + +static struct clksrc_sources clkset_uhost = { + .sources = clkset_uhost_list, + .nr_sources = ARRAY_SIZE(clkset_uhost_list), +}; + +/* The peripheral clocks are all controlled via clocksource followed + * by an optional divider and gate stage. We currently roll this into + * one clock which hides the intermediate clock from the mux. + * + * Note, the JPEG clock can only be an even divider... + * + * The scaler and LCD clocks depend on the S3C64XX version, and also + * have a common parent divisor so are not included here. + */ + +/* clocks that feed other parts of the clock source tree */ + +static struct clk clk_iis_cd0 = { + .name = "iis_cdclk0", + .id = -1, +}; + +static struct clk clk_iis_cd1 = { + .name = "iis_cdclk1", + .id = -1, +}; + +static struct clk clk_pcm_cd = { + .name = "pcm_cdclk", + .id = -1, +}; + +static struct clk *clkset_audio0_list[] = { + [0] = &clk_mout_epll.clk, + [1] = &clk_dout_mpll, + [2] = &clk_fin_epll, + [3] = &clk_iis_cd0, + [4] = &clk_pcm_cd, +}; + +static struct clksrc_sources clkset_audio0 = { + .sources = clkset_audio0_list, + .nr_sources = ARRAY_SIZE(clkset_audio0_list), +}; + +static struct clk *clkset_audio1_list[] = { + [0] = &clk_mout_epll.clk, + [1] = &clk_dout_mpll, + [2] = &clk_fin_epll, + [3] = &clk_iis_cd1, + [4] = &clk_pcm_cd, +}; + +static struct clksrc_sources clkset_audio1 = { + .sources = clkset_audio1_list, + .nr_sources = ARRAY_SIZE(clkset_audio1_list), +}; + +static struct clk *clkset_camif_list[] = { + &clk_h2, +}; + +static struct clksrc_sources clkset_camif = { + .sources = clkset_camif_list, + .nr_sources = ARRAY_SIZE(clkset_camif_list), +}; + +static struct clksrc_clk clksrcs[] = { + { + .clk = { + .name = "mmc_bus", + .id = 0, + .ctrlbit = S3C_CLKCON_SCLK_MMC0, + .enable = s3c64xx_sclk_ctrl, + }, + .reg_src = { .reg = S3C_CLK_SRC, .shift = 18, .size = 2 }, + .reg_div = { .reg = S3C_CLK_DIV1, .shift = 0, .size = 4 }, + .sources = &clkset_spi_mmc, + }, { + .clk = { + .name = "mmc_bus", + .id = 1, + .ctrlbit = S3C_CLKCON_SCLK_MMC1, + .enable = s3c64xx_sclk_ctrl, + }, + .reg_src = { .reg = S3C_CLK_SRC, .shift = 20, .size = 2 }, + .reg_div = { .reg = S3C_CLK_DIV1, .shift = 4, .size = 4 }, + .sources = &clkset_spi_mmc, + }, { + .clk = { + .name = "mmc_bus", + .id = 2, + .ctrlbit = S3C_CLKCON_SCLK_MMC2, + .enable = s3c64xx_sclk_ctrl, + }, + .reg_src = { .reg = S3C_CLK_SRC, .shift = 22, .size = 2 }, + .reg_div = { .reg = S3C_CLK_DIV1, .shift = 8, .size = 4 }, + .sources = &clkset_spi_mmc, + }, { + .clk = { + .name = "usb-bus-host", + .id = -1, + .ctrlbit = S3C_CLKCON_SCLK_UHOST, + .enable = s3c64xx_sclk_ctrl, + }, + .reg_src = { .reg = S3C_CLK_SRC, .shift = 5, .size = 2 }, + .reg_div = { .reg = S3C_CLK_DIV1, .shift = 20, .size = 4 }, + .sources = &clkset_uhost, + }, { + .clk = { + .name = "uclk1", + .id = -1, + .ctrlbit = S3C_CLKCON_SCLK_UART, + .enable = s3c64xx_sclk_ctrl, + }, + .reg_src = { .reg = S3C_CLK_SRC, .shift = 13, .size = 1 }, + .reg_div = { .reg = S3C_CLK_DIV2, .shift = 16, .size = 4 }, + .sources = &clkset_uart, + }, { +/* Where does UCLK0 come from? */ + .clk = { + .name = "spi-bus", + .id = 0, + .ctrlbit = S3C_CLKCON_SCLK_SPI0, + .enable = s3c64xx_sclk_ctrl, + }, + .reg_src = { .reg = S3C_CLK_SRC, .shift = 14, .size = 2 }, + .reg_div = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4 }, + .sources = &clkset_spi_mmc, + }, { + .clk = { + .name = "spi-bus", + .id = 1, + .ctrlbit = S3C_CLKCON_SCLK_SPI1, + .enable = s3c64xx_sclk_ctrl, + }, + .reg_src = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2 }, + .reg_div = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4 }, + .sources = &clkset_spi_mmc, + }, { + .clk = { + .name = "audio-bus", + .id = 0, + .ctrlbit = S3C_CLKCON_SCLK_AUDIO0, + .enable = s3c64xx_sclk_ctrl, + }, + .reg_src = { .reg = S3C_CLK_SRC, .shift = 7, .size = 3 }, + .reg_div = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4 }, + .sources = &clkset_audio0, + }, { + .clk = { + .name = "audio-bus", + .id = 1, + .ctrlbit = S3C_CLKCON_SCLK_AUDIO1, + .enable = s3c64xx_sclk_ctrl, + }, + .reg_src = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3 }, + .reg_div = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4 }, + .sources = &clkset_audio1, + }, { + .clk = { + .name = "irda-bus", + .id = 0, + .ctrlbit = S3C_CLKCON_SCLK_IRDA, + .enable = s3c64xx_sclk_ctrl, + }, + .reg_src = { .reg = S3C_CLK_SRC, .shift = 24, .size = 2 }, + .reg_div = { .reg = S3C_CLK_DIV2, .shift = 20, .size = 4 }, + .sources = &clkset_irda, + }, { + .clk = { + .name = "camera", + .id = -1, + .ctrlbit = S3C_CLKCON_SCLK_CAM, + .enable = s3c64xx_sclk_ctrl, + }, + .reg_div = { .reg = S3C_CLK_DIV0, .shift = 20, .size = 4 }, + .reg_src = { .reg = NULL, .shift = 0, .size = 0 }, + .sources = &clkset_camif, + }, +}; + +/* Clock initialisation code */ + +static struct clksrc_clk *init_parents[] = { + &clk_mout_apll, + &clk_mout_epll, + &clk_mout_mpll, +}; + +#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) + +void __init_or_cpufreq s3c6400_setup_clocks(void) +{ + struct clk *xtal_clk; + unsigned long xtal; + unsigned long fclk; + unsigned long hclk; + unsigned long hclk2; + unsigned long pclk; + unsigned long epll; + unsigned long apll; + unsigned long mpll; + unsigned int ptr; + u32 clkdiv0; + + printk(KERN_DEBUG "%s: registering clocks\n", __func__); + + clkdiv0 = __raw_readl(S3C_CLK_DIV0); + printk(KERN_DEBUG "%s: clkdiv0 = %08x\n", __func__, clkdiv0); + + xtal_clk = clk_get(NULL, "xtal"); + BUG_ON(IS_ERR(xtal_clk)); + + xtal = clk_get_rate(xtal_clk); + clk_put(xtal_clk); + + printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); + + /* For now assume the mux always selects the crystal */ + clk_ext_xtal_mux.parent = xtal_clk; + + epll = s3c6400_get_epll(xtal); + mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON)); + apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON)); + + fclk = mpll; + + printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n", + apll, mpll, epll); + + hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); + hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK); + pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK); + + printk(KERN_INFO "S3C64XX: HCLK2=%ld, HCLK=%ld, PCLK=%ld\n", + hclk2, hclk, pclk); + + clk_fout_mpll.rate = mpll; + clk_fout_epll.rate = epll; + clk_fout_apll.rate = apll; + + clk_h2.rate = hclk2; + clk_h.rate = hclk; + clk_p.rate = pclk; + clk_f.rate = fclk; + + for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++) + s3c_set_clksrc(init_parents[ptr], true); + + for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) + s3c_set_clksrc(&clksrcs[ptr], true); +} + +static struct clk *clks1[] __initdata = { + &clk_ext_xtal_mux, + &clk_iis_cd0, + &clk_iis_cd1, + &clk_pcm_cd, + &clk_mout_epll.clk, + &clk_mout_mpll.clk, + &clk_dout_mpll, + &clk_arm, +}; + +/** + * s3c6400_register_clocks - register clocks for s3c6400 and above + * @armclk_divlimit: Divisor mask for ARMCLK + * + * Register the clocks for the S3C6400 and above SoC range, such + * as ARMCLK and the clocks which have divider chains attached. + * + * This call does not setup the clocks, which is left to the + * s3c6400_setup_clocks() call which may be needed by the cpufreq + * or resume code to re-set the clocks if the bootloader has changed + * them. + */ +void __init s3c6400_register_clocks(unsigned armclk_divlimit) +{ + struct clk *clkp; + int ret; + int ptr; + + armclk_mask = armclk_divlimit; + + for (ptr = 0; ptr < ARRAY_SIZE(clks1); ptr++) { + clkp = clks1[ptr]; + ret = s3c24xx_register_clock(clkp); + if (ret < 0) { + printk(KERN_ERR "Failed to register clock %s (%d)\n", + clkp->name, ret); + } + } + + s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); +} + static struct clk *clks[] __initdata = { &clk_ext, &clk_epll, diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig index cc300894f364..94ac74eeca5f 100644 --- a/arch/arm/plat-s3c64xx/Kconfig +++ b/arch/arm/plat-s3c64xx/Kconfig @@ -25,15 +25,3 @@ config PLAT_S3C64XX select SAMSUNG_GPIOLIB_4BIT help Base platform code for any Samsung S3C64XX device - -if PLAT_S3C64XX - -# Configuration options shared by all S3C64XX implementations - -config CPU_S3C6400_CLOCK - bool - help - Common clock support code for the S3C6400 that is shared - by other CPUs in the series, such as the S3C6410. - -endif diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/plat-s3c64xx/Makefile index 62fc25305ec4..7ca1c0999595 100644 --- a/arch/arm/plat-s3c64xx/Makefile +++ b/arch/arm/plat-s3c64xx/Makefile @@ -10,6 +10,3 @@ obj-m := obj-n := dummy.o obj- := -# CPU support - -obj-$(CONFIG_CPU_S3C6400_CLOCK) += s3c6400-clock.o diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c deleted file mode 100644 index 85f7bb053f72..000000000000 --- a/arch/arm/plat-s3c64xx/s3c6400-clock.c +++ /dev/null @@ -1,536 +0,0 @@ -/* linux/arch/arm/plat-s3c64xx/s3c6400-clock.c - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * S3C6400 based common clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include - -/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call - * ext_xtal_mux for want of an actual name from the manual. -*/ - -static struct clk clk_ext_xtal_mux = { - .name = "ext_xtal", - .id = -1, -}; - -#define clk_fin_apll clk_ext_xtal_mux -#define clk_fin_mpll clk_ext_xtal_mux -#define clk_fin_epll clk_ext_xtal_mux - -#define clk_fout_mpll clk_mpll -#define clk_fout_epll clk_epll - -static struct clk clk_fout_apll = { - .name = "fout_apll", - .id = -1, -}; - -static struct clk *clk_src_apll_list[] = { - [0] = &clk_fin_apll, - [1] = &clk_fout_apll, -}; - -static struct clksrc_sources clk_src_apll = { - .sources = clk_src_apll_list, - .nr_sources = ARRAY_SIZE(clk_src_apll_list), -}; - -static struct clksrc_clk clk_mout_apll = { - .clk = { - .name = "mout_apll", - .id = -1, - }, - .reg_src = { .reg = S3C_CLK_SRC, .shift = 0, .size = 1 }, - .sources = &clk_src_apll, -}; - -static struct clk *clk_src_epll_list[] = { - [0] = &clk_fin_epll, - [1] = &clk_fout_epll, -}; - -static struct clksrc_sources clk_src_epll = { - .sources = clk_src_epll_list, - .nr_sources = ARRAY_SIZE(clk_src_epll_list), -}; - -static struct clksrc_clk clk_mout_epll = { - .clk = { - .name = "mout_epll", - .id = -1, - }, - .reg_src = { .reg = S3C_CLK_SRC, .shift = 2, .size = 1 }, - .sources = &clk_src_epll, -}; - -static struct clk *clk_src_mpll_list[] = { - [0] = &clk_fin_mpll, - [1] = &clk_fout_mpll, -}; - -static struct clksrc_sources clk_src_mpll = { - .sources = clk_src_mpll_list, - .nr_sources = ARRAY_SIZE(clk_src_mpll_list), -}; - -static struct clksrc_clk clk_mout_mpll = { - .clk = { - .name = "mout_mpll", - .id = -1, - }, - .reg_src = { .reg = S3C_CLK_SRC, .shift = 1, .size = 1 }, - .sources = &clk_src_mpll, -}; - -static unsigned int armclk_mask; - -static unsigned long s3c64xx_clk_arm_get_rate(struct clk *clk) -{ - unsigned long rate = clk_get_rate(clk->parent); - u32 clkdiv; - - /* divisor mask starts at bit0, so no need to shift */ - clkdiv = __raw_readl(S3C_CLK_DIV0) & armclk_mask; - - return rate / (clkdiv + 1); -} - -static unsigned long s3c64xx_clk_arm_round_rate(struct clk *clk, - unsigned long rate) -{ - unsigned long parent = clk_get_rate(clk->parent); - u32 div; - - if (parent < rate) - return parent; - - div = (parent / rate) - 1; - if (div > armclk_mask) - div = armclk_mask; - - return parent / (div + 1); -} - -static int s3c64xx_clk_arm_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned long parent = clk_get_rate(clk->parent); - u32 div; - u32 val; - - if (rate < parent / (armclk_mask + 1)) - return -EINVAL; - - rate = clk_round_rate(clk, rate); - div = clk_get_rate(clk->parent) / rate; - - val = __raw_readl(S3C_CLK_DIV0); - val &= ~armclk_mask; - val |= (div - 1); - __raw_writel(val, S3C_CLK_DIV0); - - return 0; - -} - -static struct clk clk_arm = { - .name = "armclk", - .id = -1, - .parent = &clk_mout_apll.clk, - .ops = &(struct clk_ops) { - .get_rate = s3c64xx_clk_arm_get_rate, - .set_rate = s3c64xx_clk_arm_set_rate, - .round_rate = s3c64xx_clk_arm_round_rate, - }, -}; - -static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk) -{ - unsigned long rate = clk_get_rate(clk->parent); - - printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); - - if (__raw_readl(S3C_CLK_DIV0) & S3C6400_CLKDIV0_MPLL_MASK) - rate /= 2; - - return rate; -} - -static struct clk_ops clk_dout_ops = { - .get_rate = s3c64xx_clk_doutmpll_get_rate, -}; - -static struct clk clk_dout_mpll = { - .name = "dout_mpll", - .id = -1, - .parent = &clk_mout_mpll.clk, - .ops = &clk_dout_ops, -}; - -static struct clk *clkset_spi_mmc_list[] = { - &clk_mout_epll.clk, - &clk_dout_mpll, - &clk_fin_epll, - &clk_27m, -}; - -static struct clksrc_sources clkset_spi_mmc = { - .sources = clkset_spi_mmc_list, - .nr_sources = ARRAY_SIZE(clkset_spi_mmc_list), -}; - -static struct clk *clkset_irda_list[] = { - &clk_mout_epll.clk, - &clk_dout_mpll, - NULL, - &clk_27m, -}; - -static struct clksrc_sources clkset_irda = { - .sources = clkset_irda_list, - .nr_sources = ARRAY_SIZE(clkset_irda_list), -}; - -static struct clk *clkset_uart_list[] = { - &clk_mout_epll.clk, - &clk_dout_mpll, - NULL, - NULL -}; - -static struct clksrc_sources clkset_uart = { - .sources = clkset_uart_list, - .nr_sources = ARRAY_SIZE(clkset_uart_list), -}; - -static struct clk *clkset_uhost_list[] = { - &clk_48m, - &clk_mout_epll.clk, - &clk_dout_mpll, - &clk_fin_epll, -}; - -static struct clksrc_sources clkset_uhost = { - .sources = clkset_uhost_list, - .nr_sources = ARRAY_SIZE(clkset_uhost_list), -}; - -/* The peripheral clocks are all controlled via clocksource followed - * by an optional divider and gate stage. We currently roll this into - * one clock which hides the intermediate clock from the mux. - * - * Note, the JPEG clock can only be an even divider... - * - * The scaler and LCD clocks depend on the S3C64XX version, and also - * have a common parent divisor so are not included here. - */ - -/* clocks that feed other parts of the clock source tree */ - -static struct clk clk_iis_cd0 = { - .name = "iis_cdclk0", - .id = -1, -}; - -static struct clk clk_iis_cd1 = { - .name = "iis_cdclk1", - .id = -1, -}; - -static struct clk clk_pcm_cd = { - .name = "pcm_cdclk", - .id = -1, -}; - -static struct clk *clkset_audio0_list[] = { - [0] = &clk_mout_epll.clk, - [1] = &clk_dout_mpll, - [2] = &clk_fin_epll, - [3] = &clk_iis_cd0, - [4] = &clk_pcm_cd, -}; - -static struct clksrc_sources clkset_audio0 = { - .sources = clkset_audio0_list, - .nr_sources = ARRAY_SIZE(clkset_audio0_list), -}; - -static struct clk *clkset_audio1_list[] = { - [0] = &clk_mout_epll.clk, - [1] = &clk_dout_mpll, - [2] = &clk_fin_epll, - [3] = &clk_iis_cd1, - [4] = &clk_pcm_cd, -}; - -static struct clksrc_sources clkset_audio1 = { - .sources = clkset_audio1_list, - .nr_sources = ARRAY_SIZE(clkset_audio1_list), -}; - -static struct clk *clkset_camif_list[] = { - &clk_h2, -}; - -static struct clksrc_sources clkset_camif = { - .sources = clkset_camif_list, - .nr_sources = ARRAY_SIZE(clkset_camif_list), -}; - -static struct clksrc_clk clksrcs[] = { - { - .clk = { - .name = "mmc_bus", - .id = 0, - .ctrlbit = S3C_CLKCON_SCLK_MMC0, - .enable = s3c64xx_sclk_ctrl, - }, - .reg_src = { .reg = S3C_CLK_SRC, .shift = 18, .size = 2 }, - .reg_div = { .reg = S3C_CLK_DIV1, .shift = 0, .size = 4 }, - .sources = &clkset_spi_mmc, - }, { - .clk = { - .name = "mmc_bus", - .id = 1, - .ctrlbit = S3C_CLKCON_SCLK_MMC1, - .enable = s3c64xx_sclk_ctrl, - }, - .reg_src = { .reg = S3C_CLK_SRC, .shift = 20, .size = 2 }, - .reg_div = { .reg = S3C_CLK_DIV1, .shift = 4, .size = 4 }, - .sources = &clkset_spi_mmc, - }, { - .clk = { - .name = "mmc_bus", - .id = 2, - .ctrlbit = S3C_CLKCON_SCLK_MMC2, - .enable = s3c64xx_sclk_ctrl, - }, - .reg_src = { .reg = S3C_CLK_SRC, .shift = 22, .size = 2 }, - .reg_div = { .reg = S3C_CLK_DIV1, .shift = 8, .size = 4 }, - .sources = &clkset_spi_mmc, - }, { - .clk = { - .name = "usb-bus-host", - .id = -1, - .ctrlbit = S3C_CLKCON_SCLK_UHOST, - .enable = s3c64xx_sclk_ctrl, - }, - .reg_src = { .reg = S3C_CLK_SRC, .shift = 5, .size = 2 }, - .reg_div = { .reg = S3C_CLK_DIV1, .shift = 20, .size = 4 }, - .sources = &clkset_uhost, - }, { - .clk = { - .name = "uclk1", - .id = -1, - .ctrlbit = S3C_CLKCON_SCLK_UART, - .enable = s3c64xx_sclk_ctrl, - }, - .reg_src = { .reg = S3C_CLK_SRC, .shift = 13, .size = 1 }, - .reg_div = { .reg = S3C_CLK_DIV2, .shift = 16, .size = 4 }, - .sources = &clkset_uart, - }, { -/* Where does UCLK0 come from? */ - .clk = { - .name = "spi-bus", - .id = 0, - .ctrlbit = S3C_CLKCON_SCLK_SPI0, - .enable = s3c64xx_sclk_ctrl, - }, - .reg_src = { .reg = S3C_CLK_SRC, .shift = 14, .size = 2 }, - .reg_div = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4 }, - .sources = &clkset_spi_mmc, - }, { - .clk = { - .name = "spi-bus", - .id = 1, - .ctrlbit = S3C_CLKCON_SCLK_SPI1, - .enable = s3c64xx_sclk_ctrl, - }, - .reg_src = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2 }, - .reg_div = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4 }, - .sources = &clkset_spi_mmc, - }, { - .clk = { - .name = "audio-bus", - .id = 0, - .ctrlbit = S3C_CLKCON_SCLK_AUDIO0, - .enable = s3c64xx_sclk_ctrl, - }, - .reg_src = { .reg = S3C_CLK_SRC, .shift = 7, .size = 3 }, - .reg_div = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4 }, - .sources = &clkset_audio0, - }, { - .clk = { - .name = "audio-bus", - .id = 1, - .ctrlbit = S3C_CLKCON_SCLK_AUDIO1, - .enable = s3c64xx_sclk_ctrl, - }, - .reg_src = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3 }, - .reg_div = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4 }, - .sources = &clkset_audio1, - }, { - .clk = { - .name = "irda-bus", - .id = 0, - .ctrlbit = S3C_CLKCON_SCLK_IRDA, - .enable = s3c64xx_sclk_ctrl, - }, - .reg_src = { .reg = S3C_CLK_SRC, .shift = 24, .size = 2 }, - .reg_div = { .reg = S3C_CLK_DIV2, .shift = 20, .size = 4 }, - .sources = &clkset_irda, - }, { - .clk = { - .name = "camera", - .id = -1, - .ctrlbit = S3C_CLKCON_SCLK_CAM, - .enable = s3c64xx_sclk_ctrl, - }, - .reg_div = { .reg = S3C_CLK_DIV0, .shift = 20, .size = 4 }, - .reg_src = { .reg = NULL, .shift = 0, .size = 0 }, - .sources = &clkset_camif, - }, -}; - -/* Clock initialisation code */ - -static struct clksrc_clk *init_parents[] = { - &clk_mout_apll, - &clk_mout_epll, - &clk_mout_mpll, -}; - -#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) - -void __init_or_cpufreq s3c6400_setup_clocks(void) -{ - struct clk *xtal_clk; - unsigned long xtal; - unsigned long fclk; - unsigned long hclk; - unsigned long hclk2; - unsigned long pclk; - unsigned long epll; - unsigned long apll; - unsigned long mpll; - unsigned int ptr; - u32 clkdiv0; - - printk(KERN_DEBUG "%s: registering clocks\n", __func__); - - clkdiv0 = __raw_readl(S3C_CLK_DIV0); - printk(KERN_DEBUG "%s: clkdiv0 = %08x\n", __func__, clkdiv0); - - xtal_clk = clk_get(NULL, "xtal"); - BUG_ON(IS_ERR(xtal_clk)); - - xtal = clk_get_rate(xtal_clk); - clk_put(xtal_clk); - - printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); - - /* For now assume the mux always selects the crystal */ - clk_ext_xtal_mux.parent = xtal_clk; - - epll = s3c6400_get_epll(xtal); - mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON)); - apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON)); - - fclk = mpll; - - printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n", - apll, mpll, epll); - - hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); - hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK); - pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK); - - printk(KERN_INFO "S3C64XX: HCLK2=%ld, HCLK=%ld, PCLK=%ld\n", - hclk2, hclk, pclk); - - clk_fout_mpll.rate = mpll; - clk_fout_epll.rate = epll; - clk_fout_apll.rate = apll; - - clk_h2.rate = hclk2; - clk_h.rate = hclk; - clk_p.rate = pclk; - clk_f.rate = fclk; - - for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++) - s3c_set_clksrc(init_parents[ptr], true); - - for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) - s3c_set_clksrc(&clksrcs[ptr], true); -} - -static struct clk *clks[] __initdata = { - &clk_ext_xtal_mux, - &clk_iis_cd0, - &clk_iis_cd1, - &clk_pcm_cd, - &clk_mout_epll.clk, - &clk_mout_mpll.clk, - &clk_dout_mpll, - &clk_arm, -}; - -/** - * s3c6400_register_clocks - register clocks for s3c6400 and above - * @armclk_divlimit: Divisor mask for ARMCLK - * - * Register the clocks for the S3C6400 and above SoC range, such - * as ARMCLK and the clocks which have divider chains attached. - * - * This call does not setup the clocks, which is left to the - * s3c6400_setup_clocks() call which may be needed by the cpufreq - * or resume code to re-set the clocks if the bootloader has changed - * them. - */ -void __init s3c6400_register_clocks(unsigned armclk_divlimit) -{ - struct clk *clkp; - int ret; - int ptr; - - armclk_mask = armclk_divlimit; - - for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) { - clkp = clks[ptr]; - ret = s3c24xx_register_clock(clkp); - if (ret < 0) { - printk(KERN_ERR "Failed to register clock %s (%d)\n", - clkp->name, ret); - } - } - - s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); -} From 55bf9267dd628c9369674ca75f5b00e275529289 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 26 Jan 2010 15:10:38 +0900 Subject: [PATCH 10/14] ARM: S3C64XX: Combine the clock init code Turn the init sequence of s3c24xx_register_baseclocks(xtal); s3c64xx_register_clocks(); s3c6400_register_clocks(S3C6410_CLKDIV0_ARM_MASK); into a single call as this is now contained within one file. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c64xx/clock.c | 54 ++++++++------------ arch/arm/mach-s3c64xx/include/mach/s3c6400.h | 3 +- arch/arm/mach-s3c64xx/s3c6400.c | 5 +- arch/arm/mach-s3c64xx/s3c6410.c | 4 +- arch/arm/plat-samsung/include/plat/clock.h | 1 - 5 files changed, 25 insertions(+), 42 deletions(-) diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index 9b587e267422..7f5e1aa99ce1 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c @@ -748,38 +748,6 @@ static struct clk *clks1[] __initdata = { &clk_arm, }; -/** - * s3c6400_register_clocks - register clocks for s3c6400 and above - * @armclk_divlimit: Divisor mask for ARMCLK - * - * Register the clocks for the S3C6400 and above SoC range, such - * as ARMCLK and the clocks which have divider chains attached. - * - * This call does not setup the clocks, which is left to the - * s3c6400_setup_clocks() call which may be needed by the cpufreq - * or resume code to re-set the clocks if the bootloader has changed - * them. - */ -void __init s3c6400_register_clocks(unsigned armclk_divlimit) -{ - struct clk *clkp; - int ret; - int ptr; - - armclk_mask = armclk_divlimit; - - for (ptr = 0; ptr < ARRAY_SIZE(clks1); ptr++) { - clkp = clks1[ptr]; - ret = s3c24xx_register_clock(clkp); - if (ret < 0) { - printk(KERN_ERR "Failed to register clock %s (%d)\n", - clkp->name, ret); - } - } - - s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); -} - static struct clk *clks[] __initdata = { &clk_ext, &clk_epll, @@ -788,13 +756,31 @@ static struct clk *clks[] __initdata = { &clk_h2, }; -void __init s3c64xx_register_clocks(void) +/** + * s3c64xx_register_clocks - register clocks for s3c6400 and s3c6410 + * @xtal: The rate for the clock crystal feeding the PLLs. + * @armclk_divlimit: Divisor mask for ARMCLK. + * + * Register the clocks for the S3C6400 and S3C6410 SoC range, such + * as ARMCLK as well as the necessary parent clocks. + * + * This call does not setup the clocks, which is left to the + * s3c6400_setup_clocks() call which may be needed by the cpufreq + * or resume code to re-set the clocks if the bootloader has changed + * them. + */ +void __init s3c64xx_register_clocks(unsigned long xtal, + unsigned armclk_divlimit) { struct clk *clkp; int ret; int ptr; + armclk_mask = armclk_divlimit; + + s3c24xx_register_baseclocks(xtal); s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); + s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); clkp = init_clocks_disable; @@ -809,5 +795,7 @@ void __init s3c64xx_register_clocks(void) (clkp->enable)(clkp, 0); } + s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1)); + s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); s3c_pwmclk_init(); } diff --git a/arch/arm/mach-s3c64xx/include/mach/s3c6400.h b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h index 2bc7c07a928f..f86958d05352 100644 --- a/arch/arm/mach-s3c64xx/include/mach/s3c6400.h +++ b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h @@ -15,9 +15,10 @@ /* Common init code for S3C6400 related SoCs */ extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); -extern void s3c6400_register_clocks(unsigned armclk_divlimit); extern void s3c6400_setup_clocks(void); +extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit); + #ifdef CONFIG_CPU_S3C6400 extern int s3c6400_init(void); diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c index 720d0d1f3bfc..707e34e3afd1 100644 --- a/arch/arm/mach-s3c64xx/s3c6400.c +++ b/arch/arm/mach-s3c64xx/s3c6400.c @@ -55,10 +55,7 @@ void __init s3c6400_map_io(void) void __init s3c6400_init_clocks(int xtal) { - printk(KERN_DEBUG "%s: initialising clocks\n", __func__); - s3c24xx_register_baseclocks(xtal); - s3c64xx_register_clocks(); - s3c6400_register_clocks(S3C6400_CLKDIV0_ARM_MASK); + s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK); s3c6400_setup_clocks(); } diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c index fd457cc3ab87..59635d19466a 100644 --- a/arch/arm/mach-s3c64xx/s3c6410.c +++ b/arch/arm/mach-s3c64xx/s3c6410.c @@ -58,9 +58,7 @@ void __init s3c6410_map_io(void) void __init s3c6410_init_clocks(int xtal) { printk(KERN_DEBUG "%s: initialising clocks\n", __func__); - s3c24xx_register_baseclocks(xtal); - s3c64xx_register_clocks(); - s3c6400_register_clocks(S3C6410_CLKDIV0_ARM_MASK); + s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK); s3c6400_setup_clocks(); } diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h index ba9a1cdd3a28..60b62692ac7a 100644 --- a/arch/arm/plat-samsung/include/plat/clock.h +++ b/arch/arm/plat-samsung/include/plat/clock.h @@ -94,7 +94,6 @@ extern void s3c_register_clocks(struct clk *clk, int nr_clks); extern int s3c24xx_register_baseclocks(unsigned long xtal); -extern void s3c64xx_register_clocks(void); extern void s5p_register_clocks(unsigned long xtal_freq); extern void s3c24xx_setup_clocks(unsigned long fclk, From 89f0ce721c0bc95c109300edcd8525d8ea5df8f2 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 26 Jan 2010 15:49:15 +0900 Subject: [PATCH 11/14] ARM: S3C64XX: Remove plat-s3c64xx Kconfig and PLAT_S3C64XX Remove the Kconfig and PLAT_S3C64XX defines for the previous S3C64XX directory structure now that the code is moved into mach-s3c64xx. Note, we cannot currently remove plat-s3c64xx directory as we have a pair of include files used within plat-s3c and plat-samsung that need to find a new home. Signed-off-by: Ben Dooks --- arch/arm/Kconfig | 16 +++++++++++++++- arch/arm/Makefile | 2 +- arch/arm/plat-s3c64xx/Kconfig | 15 --------------- 3 files changed, 16 insertions(+), 17 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 685ff7effff9..89fbed5e11ec 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -627,9 +627,24 @@ config ARCH_S3C2410 config ARCH_S3C64XX bool "Samsung S3C64XX" + select PLAT_S3C + select CPU_V6 select GENERIC_GPIO + select ARM_VIC select HAVE_CLK + select NO_IOPORT select ARCH_HAS_CPUFREQ + select ARCH_REQUIRE_GPIOLIB + select SAMSUNG_CLKSRC + select SAMSUNG_IRQ_VIC_TIMER + select SAMSUNG_IRQ_UART + select S3C_GPIO_TRACK + select S3C_GPIO_PULL_UPDOWN + select S3C_GPIO_CFG_S3C24XX + select S3C_GPIO_CFG_S3C64XX + select S3C_DEV_NAND + select USB_ARCH_HAS_OHCI + select SAMSUNG_GPIOLIB_4BIT help Samsung S3C64XX series based systems @@ -784,7 +799,6 @@ source "arch/arm/mach-dove/Kconfig" source "arch/arm/plat-samsung/Kconfig" source "arch/arm/plat-s3c24xx/Kconfig" -source "arch/arm/plat-s3c64xx/Kconfig" source "arch/arm/plat-s3c/Kconfig" source "arch/arm/plat-s5p/Kconfig" source "arch/arm/plat-s5pc1xx/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index ecf963d61aed..c1300d88a014 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -183,7 +183,7 @@ plat-$(CONFIG_PLAT_NOMADIK) := nomadik plat-$(CONFIG_PLAT_ORION) := orion plat-$(CONFIG_PLAT_PXA) := pxa plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c samsung -plat-$(CONFIG_PLAT_S3C64XX) := s3c64xx s3c samsung +plat-$(CONFIG_ARCH_S3C64XX) := s3c64xx s3c samsung plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx s3c samsung plat-$(CONFIG_PLAT_S5P) := s5p samsung s3c plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig index 94ac74eeca5f..ae034c2267f3 100644 --- a/arch/arm/plat-s3c64xx/Kconfig +++ b/arch/arm/plat-s3c64xx/Kconfig @@ -8,20 +8,5 @@ config PLAT_S3C64XX bool depends on ARCH_S3C64XX default y - select CPU_V6 - select PLAT_S3C - select ARM_VIC - select NO_IOPORT - select ARCH_REQUIRE_GPIOLIB - select SAMSUNG_CLKSRC - select SAMSUNG_IRQ_VIC_TIMER - select SAMSUNG_IRQ_UART - select S3C_GPIO_TRACK - select S3C_GPIO_PULL_UPDOWN - select S3C_GPIO_CFG_S3C24XX - select S3C_GPIO_CFG_S3C64XX - select S3C_DEV_NAND - select USB_ARCH_HAS_OHCI - select SAMSUNG_GPIOLIB_4BIT help Base platform code for any Samsung S3C64XX device From 431fb7df24ebf360ba35895a60d084de364e39f8 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 5 Feb 2010 13:52:53 +0100 Subject: [PATCH 12/14] ARM: SAMSUNG: Move pm-core.h to machine directory Move the pm-core.h to the machine include directory in the process of eliminating the plat-s3c64xx. Signed-off-by: Ben Dooks --- .../include/plat => mach-s3c2410/include/mach}/pm-core.h | 2 +- .../include/plat => mach-s3c64xx/include/mach}/pm-core.h | 2 +- arch/arm/plat-s3c/pm.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) rename arch/arm/{plat-s3c24xx/include/plat => mach-s3c2410/include/mach}/pm-core.h (97%) rename arch/arm/{plat-s3c64xx/include/plat => mach-s3c64xx/include/mach}/pm-core.h (98%) diff --git a/arch/arm/plat-s3c24xx/include/plat/pm-core.h b/arch/arm/mach-s3c2410/include/mach/pm-core.h similarity index 97% rename from arch/arm/plat-s3c24xx/include/plat/pm-core.h rename to arch/arm/mach-s3c2410/include/mach/pm-core.h index fb45dd9adca5..70a83b209e25 100644 --- a/arch/arm/plat-s3c24xx/include/plat/pm-core.h +++ b/arch/arm/mach-s3c2410/include/mach/pm-core.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c24xx/include/plat/pll.h +/* linux/arch/arm/mach-s3c2410/include/pm-core.h * * Copyright 2008 Simtec Electronics * Ben Dooks diff --git a/arch/arm/plat-s3c64xx/include/plat/pm-core.h b/arch/arm/mach-s3c64xx/include/mach/pm-core.h similarity index 98% rename from arch/arm/plat-s3c64xx/include/plat/pm-core.h rename to arch/arm/mach-s3c64xx/include/mach/pm-core.h index 61b8aae76d3d..1e9f20f0bb7b 100644 --- a/arch/arm/plat-s3c64xx/include/plat/pm-core.h +++ b/arch/arm/mach-s3c64xx/include/mach/pm-core.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/pm-core.h +/* linux/arch/arm/mach-s3c64xx/include/mach/pm-core.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c/pm.c b/arch/arm/plat-s3c/pm.c index e5eef126791b..27cfca597699 100644 --- a/arch/arm/plat-s3c/pm.c +++ b/arch/arm/plat-s3c/pm.c @@ -29,7 +29,7 @@ #include #include -#include +#include /* for external use */ From 992426bfe98e71db1ce767fd66f6c68ed18fcc14 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sat, 20 Feb 2010 23:01:33 +0000 Subject: [PATCH 13/14] ARM: SAMSUNG: Remove dma-plat.h to allow plat-s3c64xx to be removed dma-plat.h is the last file left in plat-s3c64xx, but to remove it we must also change the use of dma-plat.h by the core code and the s3c24xx implementation. Rename the s3c24xx dma-plat.h in the common plat-samsung directory as it may be used for other ports. Move the specific dma bits into the mach-s3c64xx directory and update the build as needed. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c2410/dma.c | 2 +- arch/arm/mach-s3c2412/dma.c | 2 +- arch/arm/mach-s3c2440/dma.c | 2 +- arch/arm/mach-s3c2443/dma.c | 2 +- arch/arm/mach-s3c64xx/dma.c | 1 - arch/arm/mach-s3c64xx/include/mach/dma.h | 57 +++++++++++++++ arch/arm/plat-s3c/dma.c | 2 - arch/arm/plat-s3c24xx/dma.c | 2 +- arch/arm/plat-s3c64xx/include/plat/dma-plat.h | 70 ------------------- .../include/plat/dma-s3c24xx.h} | 4 +- 10 files changed, 64 insertions(+), 80 deletions(-) delete mode 100644 arch/arm/plat-s3c64xx/include/plat/dma-plat.h rename arch/arm/{plat-s3c24xx/include/plat/dma-plat.h => plat-samsung/include/plat/dma-s3c24xx.h} (95%) diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c index 63b753f56c64..0d8e043804c2 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c2410/dma.c @@ -21,7 +21,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c index f8d16fc10bc6..e880524904eb 100644 --- a/arch/arm/mach-s3c2412/dma.c +++ b/arch/arm/mach-s3c2412/dma.c @@ -20,7 +20,7 @@ #include -#include +#include #include #include diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c index e08e081430f0..3b0529f54e9c 100644 --- a/arch/arm/mach-s3c2440/dma.c +++ b/arch/arm/mach-s3c2440/dma.c @@ -20,7 +20,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c index 397f3b5c0b47..3f658685ec16 100644 --- a/arch/arm/mach-s3c2443/dma.c +++ b/arch/arm/mach-s3c2443/dma.c @@ -20,7 +20,7 @@ #include -#include +#include #include #include diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c index 0e0edf75e8ed..b62bdf18dca4 100644 --- a/arch/arm/mach-s3c64xx/dma.c +++ b/arch/arm/mach-s3c64xx/dma.c @@ -27,7 +27,6 @@ #include #include -#include #include #include diff --git a/arch/arm/mach-s3c64xx/include/mach/dma.h b/arch/arm/mach-s3c64xx/include/mach/dma.h index 6723860748be..0a5d9268a23e 100644 --- a/arch/arm/mach-s3c64xx/include/mach/dma.h +++ b/arch/arm/mach-s3c64xx/include/mach/dma.h @@ -67,4 +67,61 @@ static __inline__ bool s3c_dma_has_circular(void) #include +#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */ + +struct s3c64xx_dma_buff; + +/** s3c64xx_dma_buff - S3C64XX DMA buffer descriptor + * @next: Pointer to next buffer in queue or ring. + * @pw: Client provided identifier + * @lli: Pointer to hardware descriptor this buffer is associated with. + * @lli_dma: Hardare address of the descriptor. + */ +struct s3c64xx_dma_buff { + struct s3c64xx_dma_buff *next; + + void *pw; + struct pl080s_lli *lli; + dma_addr_t lli_dma; +}; + +struct s3c64xx_dmac; + +struct s3c2410_dma_chan { + unsigned char number; /* number of this dma channel */ + unsigned char in_use; /* channel allocated */ + unsigned char bit; /* bit for enable/disable/etc */ + unsigned char hw_width; + unsigned char peripheral; + + unsigned int flags; + enum s3c2410_dmasrc source; + + + dma_addr_t dev_addr; + + struct s3c2410_dma_client *client; + struct s3c64xx_dmac *dmac; /* pointer to controller */ + + void __iomem *regs; + + /* cdriver callbacks */ + s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */ + s3c2410_dma_opfn_t op_fn; /* channel op callback */ + + /* buffer list and information */ + struct s3c64xx_dma_buff *curr; /* current dma buffer */ + struct s3c64xx_dma_buff *next; /* next buffer to load */ + struct s3c64xx_dma_buff *end; /* end of queue */ + + /* note, when channel is running in circular mode, curr is the + * first buffer enqueued, end is the last and curr is where the + * last buffer-done event is set-at. The buffers are not freed + * and the last buffer hardware descriptor points back to the + * first. + */ +}; + +#include + #endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/plat-s3c/dma.c b/arch/arm/plat-s3c/dma.c index a995850cd9d5..606db1af5fe7 100644 --- a/arch/arm/plat-s3c/dma.c +++ b/arch/arm/plat-s3c/dma.c @@ -20,8 +20,6 @@ struct s3c2410_dma_buf; #include #include -#include - /* dma channel state information */ struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS]; struct s3c2410_dma_chan *s3c_dma_chan_map[DMACH_MAX]; diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index f0ea7943ac5a..93827b3d4e84 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c @@ -33,7 +33,7 @@ #include #include -#include +#include #include /* io map for dma */ diff --git a/arch/arm/plat-s3c64xx/include/plat/dma-plat.h b/arch/arm/plat-s3c64xx/include/plat/dma-plat.h deleted file mode 100644 index 8f76a1e474d6..000000000000 --- a/arch/arm/plat-s3c64xx/include/plat/dma-plat.h +++ /dev/null @@ -1,70 +0,0 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/dma-plat.h - * - * Copyright 2009 Openmoko, Inc. - * Copyright 2009 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * S3C64XX DMA core - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */ - -struct s3c64xx_dma_buff; - -/** s3c64xx_dma_buff - S3C64XX DMA buffer descriptor - * @next: Pointer to next buffer in queue or ring. - * @pw: Client provided identifier - * @lli: Pointer to hardware descriptor this buffer is associated with. - * @lli_dma: Hardare address of the descriptor. - */ -struct s3c64xx_dma_buff { - struct s3c64xx_dma_buff *next; - - void *pw; - struct pl080s_lli *lli; - dma_addr_t lli_dma; -}; - -struct s3c64xx_dmac; - -struct s3c2410_dma_chan { - unsigned char number; /* number of this dma channel */ - unsigned char in_use; /* channel allocated */ - unsigned char bit; /* bit for enable/disable/etc */ - unsigned char hw_width; - unsigned char peripheral; - - unsigned int flags; - enum s3c2410_dmasrc source; - - - dma_addr_t dev_addr; - - struct s3c2410_dma_client *client; - struct s3c64xx_dmac *dmac; /* pointer to controller */ - - void __iomem *regs; - - /* cdriver callbacks */ - s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */ - s3c2410_dma_opfn_t op_fn; /* channel op callback */ - - /* buffer list and information */ - struct s3c64xx_dma_buff *curr; /* current dma buffer */ - struct s3c64xx_dma_buff *next; /* next buffer to load */ - struct s3c64xx_dma_buff *end; /* end of queue */ - - /* note, when channel is running in circular mode, curr is the - * first buffer enqueued, end is the last and curr is where the - * last buffer-done event is set-at. The buffers are not freed - * and the last buffer hardware descriptor points back to the - * first. - */ -}; - -#include diff --git a/arch/arm/plat-s3c24xx/include/plat/dma-plat.h b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h similarity index 95% rename from arch/arm/plat-s3c24xx/include/plat/dma-plat.h rename to arch/arm/plat-samsung/include/plat/dma-s3c24xx.h index 9565ead1bc9b..336d5ac02035 100644 --- a/arch/arm/plat-s3c24xx/include/plat/dma-plat.h +++ b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h @@ -1,9 +1,9 @@ -/* linux/arch/arm/plat-s3c24xx/include/plat/dma-plat.h +/* linux/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h * * Copyright (C) 2006 Simtec Electronics * Ben Dooks * - * Samsung S3C24XX DMA support + * Samsung S3C24XX DMA support - per SoC functions * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as From 110d85acd479b80dc11b7fa3abef63285da8ea0c Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Mon, 22 Feb 2010 23:26:47 +0000 Subject: [PATCH 14/14] ARM: S3C64XX: Eliminate plat-s3c64xx Now we've move the support out of plat-s3c64xx for everything, eliminate the platform directory arch/arm/plat-s3c64xx and remove it from the ARM build configuration. Note, PLAT_S3C64XX is kept around for the moment until the drivers that depend on it can be updated, so it is moved to the mach-s3c64xx Kconfig. Signed-off-by: Ben Dooks --- arch/arm/Makefile | 2 +- arch/arm/mach-s3c64xx/Kconfig | 9 +++++++++ arch/arm/plat-s3c64xx/Kconfig | 12 ------------ arch/arm/plat-s3c64xx/Makefile | 12 ------------ 4 files changed, 10 insertions(+), 25 deletions(-) delete mode 100644 arch/arm/plat-s3c64xx/Kconfig delete mode 100644 arch/arm/plat-s3c64xx/Makefile diff --git a/arch/arm/Makefile b/arch/arm/Makefile index c1300d88a014..5cda6e7cf86f 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -183,7 +183,7 @@ plat-$(CONFIG_PLAT_NOMADIK) := nomadik plat-$(CONFIG_PLAT_ORION) := orion plat-$(CONFIG_PLAT_PXA) := pxa plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c samsung -plat-$(CONFIG_ARCH_S3C64XX) := s3c64xx s3c samsung +plat-$(CONFIG_ARCH_S3C64XX) := s3c samsung plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx s3c samsung plat-$(CONFIG_PLAT_S5P) := s5p samsung s3c plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index 8c2c89c24fce..44cdd80ea107 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -3,6 +3,15 @@ # # Licensed under GPLv2 +# temporary until we can eliminate all drivers using it. +config PLAT_S3C64XX + bool + depends on ARCH_S3C64XX + default y + help + Base platform code for any Samsung S3C64XX device + + # Configuration options for the S3C6410 CPU config CPU_S3C6400 diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig deleted file mode 100644 index ae034c2267f3..000000000000 --- a/arch/arm/plat-s3c64xx/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright 2008 Openmoko, Inc. -# Copyright 2008 Simtec Electronics -# Ben Dooks -# -# Licensed under GPLv2 - -config PLAT_S3C64XX - bool - depends on ARCH_S3C64XX - default y - help - Base platform code for any Samsung S3C64XX device diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/plat-s3c64xx/Makefile deleted file mode 100644 index 7ca1c0999595..000000000000 --- a/arch/arm/plat-s3c64xx/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# arch/arm/plat-s3c64xx/Makefile -# -# Copyright 2008 Openmoko, Inc. -# Copyright 2008 Simtec Electronics -# -# Licensed under GPLv2 - -obj-y := -obj-m := -obj-n := dummy.o -obj- := -