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dt-bindings: arm: coresight: Add support to skip trace unit power up

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Add "qcom,skip-power-up" property to identify systems which can
skip powering up of trace unit since they share the same power
domain as their CPU core. This is required to identify such
systems with hardware errata which stops the CPU watchdog counter
when the power up bit is set (TRCPDCR.PU).

Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org>
Co-developed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-5-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Tingwei Zhang 2020-07-16 11:57:33 -06:00 committed by Greg Kroah-Hartman
parent 02510a5aa7
commit 7f1a1c2c57
1 changed files with 7 additions and 0 deletions
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Documentation/devicetree/bindings/arm/coresight.txt
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@ -108,6 +108,13 @@ its hardware characteristcs.
* arm,cp14: must be present if the system accesses ETM/PTM management
registers via co-processor 14.
* qcom,skip-power-up: boolean. Indicates that an implementation can
skip powering up the trace unit. TRCPDCR.PU does not have to be set
on Qualcomm Technologies Inc. systems since ETMs are in the same power
domain as their CPU cores. This property is required to identify such
systems with hardware errata where the CPU watchdog counter is stopped
when TRCPDCR.PU is set.
* Optional property for TMC:
* arm,buffer-size: size of contiguous buffer space for TMC ETR