scsi: mpi3mr: Schedule IRQ kthreads only on non-RT kernels
In RT kernels, the IRQ handler's code is executed as a kernel thread. Modify the driver to avoid explicitly scheduling the IRQ kernel thread. Link: https://lore.kernel.org/r/20220912135742.11764-4-sreekanth.reddy@broadcom.com Signed-off-by: Sreekanth Reddy <sreekanth.reddy@broadcom.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -537,6 +537,7 @@ int mpi3mr_process_op_reply_q(struct mpi3mr_ioc *mrioc,
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if ((le16_to_cpu(reply_desc->reply_flags) &
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MPI3_REPLY_DESCRIPT_FLAGS_PHASE_MASK) != exp_phase)
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break;
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#ifndef CONFIG_PREEMPT_RT
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/*
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* Exit completion loop to avoid CPU lockup
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* Ensure remaining completion happens from threaded ISR.
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@ -545,7 +546,7 @@ int mpi3mr_process_op_reply_q(struct mpi3mr_ioc *mrioc,
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op_reply_q->enable_irq_poll = true;
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break;
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}
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#endif
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} while (1);
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writel(reply_ci,
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@ -614,6 +615,8 @@ static irqreturn_t mpi3mr_isr_primary(int irq, void *privdata)
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return IRQ_NONE;
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}
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#ifndef CONFIG_PREEMPT_RT
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static irqreturn_t mpi3mr_isr(int irq, void *privdata)
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{
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struct mpi3mr_intr_info *intr_info = privdata;
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@ -691,6 +694,8 @@ static irqreturn_t mpi3mr_isr_poll(int irq, void *privdata)
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return IRQ_HANDLED;
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}
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#endif
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/**
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* mpi3mr_request_irq - Request IRQ and register ISR
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* @mrioc: Adapter instance reference
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@ -713,8 +718,13 @@ static inline int mpi3mr_request_irq(struct mpi3mr_ioc *mrioc, u16 index)
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snprintf(intr_info->name, MPI3MR_NAME_LENGTH, "%s%d-msix%d",
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mrioc->driver_name, mrioc->id, index);
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#ifndef CONFIG_PREEMPT_RT
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retval = request_threaded_irq(pci_irq_vector(pdev, index), mpi3mr_isr,
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mpi3mr_isr_poll, IRQF_SHARED, intr_info->name, intr_info);
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#else
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retval = request_threaded_irq(pci_irq_vector(pdev, index), mpi3mr_isr_primary,
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NULL, IRQF_SHARED, intr_info->name, intr_info);
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#endif
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if (retval) {
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ioc_err(mrioc, "%s: Unable to allocate interrupt %d!\n",
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intr_info->name, pci_irq_vector(pdev, index));
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@ -2179,9 +2189,13 @@ int mpi3mr_op_request_post(struct mpi3mr_ioc *mrioc,
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pi = 0;
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op_req_q->pi = pi;
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#ifndef CONFIG_PREEMPT_RT
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if (atomic_inc_return(&mrioc->op_reply_qinfo[reply_qidx].pend_ios)
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> MPI3MR_IRQ_POLL_TRIGGER_IOCOUNT)
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mrioc->op_reply_qinfo[reply_qidx].enable_irq_poll = true;
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#else
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atomic_inc_return(&mrioc->op_reply_qinfo[reply_qidx].pend_ios);
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#endif
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writel(op_req_q->pi,
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&mrioc->sysif_regs->oper_queue_indexes[reply_qidx].producer_index);
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