KVM: LAPIC: add APIC Timer periodic/oneshot mode VMX preemption timer support
Most windows guests still utilize APIC Timer periodic/oneshot mode instead of tsc-deadline mode, and the APIC Timer periodic/oneshot mode are still emulated by high overhead hrtimer on host. This patch converts the expected expire time of the periodic/oneshot mode to guest deadline tsc in order to leverage VMX preemption timer logic for APIC Timer tsc-deadline mode. After each preemption timer vmexit preemption timer is restarted to emulate LVTT current-count register is automatically reloaded from the initial-count register when the count reaches 0. This patch reduces ~5600 cycles for each APIC Timer periodic mode operation virtualization. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: Yunhong Jiang <yunhong.jiang@intel.com> Signed-off-by: Wanpeng Li <wanpeng.li@hotmail.com> [Squashed with my fixes that were reviewed-by Paolo.] Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
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@ -1090,7 +1090,7 @@ static void apic_send_ipi(struct kvm_lapic *apic)
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static u32 apic_get_tmcct(struct kvm_lapic *apic)
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{
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ktime_t remaining;
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ktime_t remaining, now;
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s64 ns;
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u32 tmcct;
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@ -1101,7 +1101,8 @@ static u32 apic_get_tmcct(struct kvm_lapic *apic)
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apic->lapic_timer.period == 0)
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return 0;
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remaining = hrtimer_get_remaining(&apic->lapic_timer.timer);
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now = apic->lapic_timer.timer.base->get_time();
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remaining = ktime_sub(apic->lapic_timer.target_expiration, now);
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if (ktime_to_ns(remaining) < 0)
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remaining = ktime_set(0, 0);
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@ -1349,15 +1350,33 @@ static void start_sw_tscdeadline(struct kvm_lapic *apic)
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static void start_sw_period(struct kvm_lapic *apic)
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{
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ktime_t now;
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/* lapic timer in oneshot or periodic mode */
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now = apic->lapic_timer.timer.base->get_time();
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apic->lapic_timer.period = (u64)kvm_lapic_get_reg(apic, APIC_TMICT)
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* APIC_BUS_CYCLE_NS * apic->divide_count;
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if (!apic->lapic_timer.period)
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return;
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if (apic_lvtt_oneshot(apic) &&
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ktime_after(apic->lapic_timer.timer.base->get_time(),
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apic->lapic_timer.target_expiration)) {
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apic_timer_expired(apic);
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return;
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}
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hrtimer_start(&apic->lapic_timer.timer,
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apic->lapic_timer.target_expiration,
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HRTIMER_MODE_ABS_PINNED);
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}
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static bool set_target_expiration(struct kvm_lapic *apic)
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{
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ktime_t now;
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u64 tscl = rdtsc();
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now = apic->lapic_timer.timer.base->get_time();
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apic->lapic_timer.period = (u64)kvm_lapic_get_reg(apic, APIC_TMICT)
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* APIC_BUS_CYCLE_NS * apic->divide_count;
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if (!apic->lapic_timer.period)
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return false;
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/*
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* Do not allow the guest to program periodic timers with small
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* interval, since the hrtimers are not throttled by the host
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@ -1376,10 +1395,6 @@ static void start_sw_period(struct kvm_lapic *apic)
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}
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}
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hrtimer_start(&apic->lapic_timer.timer,
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ktime_add_ns(now, apic->lapic_timer.period),
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HRTIMER_MODE_ABS_PINNED);
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apic_debug("%s: bus cycle is %" PRId64 "ns, now 0x%016"
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PRIx64 ", "
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"timer initial count 0x%x, period %lldns, "
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@ -1389,6 +1404,21 @@ static void start_sw_period(struct kvm_lapic *apic)
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apic->lapic_timer.period,
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ktime_to_ns(ktime_add_ns(now,
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apic->lapic_timer.period)));
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apic->lapic_timer.tscdeadline = kvm_read_l1_tsc(apic->vcpu, tscl) +
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nsec_to_cycles(apic->vcpu, apic->lapic_timer.period);
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apic->lapic_timer.target_expiration = ktime_add_ns(now, apic->lapic_timer.period);
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return true;
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}
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static void advance_periodic_target_expiration(struct kvm_lapic *apic)
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{
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apic->lapic_timer.tscdeadline +=
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nsec_to_cycles(apic->vcpu, apic->lapic_timer.period);
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apic->lapic_timer.target_expiration =
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ktime_add_ns(apic->lapic_timer.target_expiration,
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apic->lapic_timer.period);
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}
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bool kvm_lapic_hv_timer_in_use(struct kvm_vcpu *vcpu)
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@ -1406,22 +1436,12 @@ static void cancel_hv_timer(struct kvm_lapic *apic)
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apic->lapic_timer.hv_timer_in_use = false;
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}
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void kvm_lapic_expired_hv_timer(struct kvm_vcpu *vcpu)
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{
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struct kvm_lapic *apic = vcpu->arch.apic;
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WARN_ON(!apic->lapic_timer.hv_timer_in_use);
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WARN_ON(swait_active(&vcpu->wq));
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cancel_hv_timer(apic);
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apic_timer_expired(apic);
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}
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EXPORT_SYMBOL_GPL(kvm_lapic_expired_hv_timer);
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static bool start_hv_timer(struct kvm_lapic *apic)
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{
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u64 tscdeadline = apic->lapic_timer.tscdeadline;
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if (atomic_read(&apic->lapic_timer.pending) ||
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if ((atomic_read(&apic->lapic_timer.pending) &&
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!apic_lvtt_period(apic)) ||
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kvm_x86_ops->set_hv_timer(apic->vcpu, tscdeadline)) {
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if (apic->lapic_timer.hv_timer_in_use)
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cancel_hv_timer(apic);
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@ -1430,7 +1450,8 @@ static bool start_hv_timer(struct kvm_lapic *apic)
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hrtimer_cancel(&apic->lapic_timer.timer);
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/* In case the sw timer triggered in the window */
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if (atomic_read(&apic->lapic_timer.pending))
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if (atomic_read(&apic->lapic_timer.pending) &&
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!apic_lvtt_period(apic))
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cancel_hv_timer(apic);
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}
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trace_kvm_hv_timer_state(apic->vcpu->vcpu_id,
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@ -1438,14 +1459,30 @@ static bool start_hv_timer(struct kvm_lapic *apic)
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return apic->lapic_timer.hv_timer_in_use;
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}
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void kvm_lapic_expired_hv_timer(struct kvm_vcpu *vcpu)
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{
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struct kvm_lapic *apic = vcpu->arch.apic;
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WARN_ON(!apic->lapic_timer.hv_timer_in_use);
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WARN_ON(swait_active(&vcpu->wq));
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cancel_hv_timer(apic);
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apic_timer_expired(apic);
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if (apic_lvtt_period(apic) && apic->lapic_timer.period) {
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advance_periodic_target_expiration(apic);
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if (!start_hv_timer(apic))
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start_sw_period(apic);
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}
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}
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EXPORT_SYMBOL_GPL(kvm_lapic_expired_hv_timer);
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void kvm_lapic_switch_to_hv_timer(struct kvm_vcpu *vcpu)
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{
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struct kvm_lapic *apic = vcpu->arch.apic;
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WARN_ON(apic->lapic_timer.hv_timer_in_use);
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if (apic_lvtt_tscdeadline(apic))
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start_hv_timer(apic);
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start_hv_timer(apic);
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}
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EXPORT_SYMBOL_GPL(kvm_lapic_switch_to_hv_timer);
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@ -1462,7 +1499,10 @@ void kvm_lapic_switch_to_sw_timer(struct kvm_vcpu *vcpu)
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if (atomic_read(&apic->lapic_timer.pending))
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return;
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start_sw_tscdeadline(apic);
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if (apic_lvtt_period(apic) || apic_lvtt_oneshot(apic))
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start_sw_period(apic);
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else if (apic_lvtt_tscdeadline(apic))
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start_sw_tscdeadline(apic);
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}
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EXPORT_SYMBOL_GPL(kvm_lapic_switch_to_sw_timer);
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@ -1470,9 +1510,11 @@ static void start_apic_timer(struct kvm_lapic *apic)
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{
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atomic_set(&apic->lapic_timer.pending, 0);
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if (apic_lvtt_period(apic) || apic_lvtt_oneshot(apic))
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start_sw_period(apic);
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else if (apic_lvtt_tscdeadline(apic)) {
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if (apic_lvtt_period(apic) || apic_lvtt_oneshot(apic)) {
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if (set_target_expiration(apic) &&
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!(kvm_x86_ops->set_hv_timer && start_hv_timer(apic)))
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start_sw_period(apic);
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} else if (apic_lvtt_tscdeadline(apic)) {
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if (!(kvm_x86_ops->set_hv_timer && start_hv_timer(apic)))
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start_sw_tscdeadline(apic);
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}
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@ -1923,6 +1965,7 @@ static enum hrtimer_restart apic_timer_fn(struct hrtimer *data)
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apic_timer_expired(apic);
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if (lapic_is_periodic(apic)) {
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advance_periodic_target_expiration(apic);
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hrtimer_add_expires_ns(&ktimer->timer, ktimer->period);
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return HRTIMER_RESTART;
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} else
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@ -2007,6 +2050,10 @@ void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu)
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kvm_apic_local_deliver(apic, APIC_LVTT);
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if (apic_lvtt_tscdeadline(apic))
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apic->lapic_timer.tscdeadline = 0;
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if (apic_lvtt_oneshot(apic)) {
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apic->lapic_timer.tscdeadline = 0;
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apic->lapic_timer.target_expiration = ktime_set(0, 0);
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}
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atomic_set(&apic->lapic_timer.pending, 0);
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}
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}
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@ -15,6 +15,7 @@
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struct kvm_timer {
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struct hrtimer timer;
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s64 period; /* unit: ns */
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ktime_t target_expiration;
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u32 timer_mode;
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u32 timer_mode_mask;
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u64 tscdeadline;
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