From d8d7477702f7c7cbc6ed7beb93cc9515753ed9e9 Mon Sep 17 00:00:00 2001 From: David Gounaris Date: Mon, 3 Sep 2018 14:47:25 +0200 Subject: [PATCH 1/6] net/wan/fsl_ucc_hdlc: allow ucc index up to 7 There is a need to allow higher indexes to be able to support MPC83xx platforms. (UCC1-UCC8) Signed-off-by: David Gounaris Signed-off-by: David S. Miller --- drivers/net/wan/fsl_ucc_hdlc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c index 5f0366a125e2..f2252e87ce43 100644 --- a/drivers/net/wan/fsl_ucc_hdlc.c +++ b/drivers/net/wan/fsl_ucc_hdlc.c @@ -1015,7 +1015,7 @@ static int ucc_hdlc_probe(struct platform_device *pdev) } ucc_num = val - 1; - if ((ucc_num > 3) || (ucc_num < 0)) { + if (ucc_num > (UCC_MAX_NUM - 1) || ucc_num < 0) { dev_err(&pdev->dev, ": Invalid UCC num\n"); return -EINVAL; } From 43a78e0e64d1122fb85527dd96fa786b4084e0df Mon Sep 17 00:00:00 2001 From: David Gounaris Date: Mon, 3 Sep 2018 14:47:26 +0200 Subject: [PATCH 2/6] net/wan/fsl_ucc_hdlc: allow PARITY_CRC16_PR0_CCITT parity Signed-off-by: David Gounaris Signed-off-by: David S. Miller --- drivers/net/wan/fsl_ucc_hdlc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c index f2252e87ce43..df5661d57d87 100644 --- a/drivers/net/wan/fsl_ucc_hdlc.c +++ b/drivers/net/wan/fsl_ucc_hdlc.c @@ -780,6 +780,7 @@ static int ucc_hdlc_attach(struct net_device *dev, unsigned short encoding, if (parity != PARITY_NONE && parity != PARITY_CRC32_PR1_CCITT && + parity != PARITY_CRC16_PR0_CCITT && parity != PARITY_CRC16_PR1_CCITT) return -EINVAL; From 8978ca7c8b7b0710309eb7bf155179d21f5dd3fb Mon Sep 17 00:00:00 2001 From: David Gounaris Date: Mon, 3 Sep 2018 14:47:27 +0200 Subject: [PATCH 3/6] net/wan/fsl_ucc_hdlc: Adding ARPHRD_ETHER This patch is to avoid discarding ethernet packets when using HDLC_ETH protocol. Signed-off-by: David Gounaris Signed-off-by: David S. Miller --- drivers/net/wan/fsl_ucc_hdlc.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c index df5661d57d87..128230ab53a7 100644 --- a/drivers/net/wan/fsl_ucc_hdlc.c +++ b/drivers/net/wan/fsl_ucc_hdlc.c @@ -375,6 +375,10 @@ static netdev_tx_t ucc_hdlc_tx(struct sk_buff *skb, struct net_device *dev) dev->stats.tx_bytes += skb->len; break; + case ARPHRD_ETHER: + dev->stats.tx_bytes += skb->len; + break; + default: dev->stats.tx_dropped++; dev_kfree_skb(skb); @@ -512,6 +516,7 @@ static int hdlc_rx_done(struct ucc_hdlc_private *priv, int rx_work_limit) break; case ARPHRD_PPP: + case ARPHRD_ETHER: length -= HDLC_CRC_SIZE; skb = dev_alloc_skb(length); From 045f77baf6b429a446ace64ba3174783a933398a Mon Sep 17 00:00:00 2001 From: David Gounaris Date: Mon, 3 Sep 2018 14:47:28 +0200 Subject: [PATCH 4/6] net/wan/fsl_ucc_hdlc: hmask Ability to set hmask in the device-tree, which can be used to change address filtering of packets. Signed-off-by: David Gounaris Signed-off-by: David S. Miller --- .../devicetree/bindings/soc/fsl/cpm_qe/network.txt | 6 ++++++ drivers/net/wan/fsl_ucc_hdlc.c | 5 ++++- drivers/net/wan/fsl_ucc_hdlc.h | 1 + 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt index 03c741602c6d..6d2dd8a31482 100644 --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt @@ -98,6 +98,12 @@ The property below is dependent on fsl,tdm-interface: usage: optional for tdm interface value type: Definition : Internal loopback connecting on TDM layer. +- fsl,hmask + usage: optional + Value type: + Definition: HDLC address recognition. Set to zero to disable + address filtering of packets: + fsl,hmask = /bits/ 16 <0x0000>; Example for tdm interface: diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c index 128230ab53a7..bb52c4dcf22c 100644 --- a/drivers/net/wan/fsl_ucc_hdlc.c +++ b/drivers/net/wan/fsl_ucc_hdlc.c @@ -265,7 +265,7 @@ static int uhdlc_init(struct ucc_hdlc_private *priv) iowrite16be(MAX_FRAME_LENGTH, &priv->ucc_pram->mflr); iowrite16be(DEFAULT_RFTHR, &priv->ucc_pram->rfthr); iowrite16be(DEFAULT_RFTHR, &priv->ucc_pram->rfcnt); - iowrite16be(DEFAULT_ADDR_MASK, &priv->ucc_pram->hmask); + iowrite16be(priv->hmask, &priv->ucc_pram->hmask); iowrite16be(DEFAULT_HDLC_ADDR, &priv->ucc_pram->haddr1); iowrite16be(DEFAULT_HDLC_ADDR, &priv->ucc_pram->haddr2); iowrite16be(DEFAULT_HDLC_ADDR, &priv->ucc_pram->haddr3); @@ -1096,6 +1096,9 @@ static int ucc_hdlc_probe(struct platform_device *pdev) goto free_utdm; } + if (of_property_read_u16(np, "fsl,hmask", &uhdlc_priv->hmask)) + uhdlc_priv->hmask = DEFAULT_ADDR_MASK; + ret = uhdlc_init(uhdlc_priv); if (ret) { dev_err(&pdev->dev, "Failed to init uhdlc\n"); diff --git a/drivers/net/wan/fsl_ucc_hdlc.h b/drivers/net/wan/fsl_ucc_hdlc.h index c21134c1f180..b99fa2f1cd99 100644 --- a/drivers/net/wan/fsl_ucc_hdlc.h +++ b/drivers/net/wan/fsl_ucc_hdlc.h @@ -106,6 +106,7 @@ struct ucc_hdlc_private { unsigned short encoding; unsigned short parity; + unsigned short hmask; u32 clocking; spinlock_t lock; /* lock for Tx BD and Tx buffer */ #ifdef CONFIG_PM From 040b7c94e4ec585149f63f429253a493064749c3 Mon Sep 17 00:00:00 2001 From: David Gounaris Date: Mon, 3 Sep 2018 14:47:29 +0200 Subject: [PATCH 5/6] net/wan/fsl_ucc_hdlc: GUMR for non tsa mode The following bits in the GUMR is changed for non tsa mode: CDS, CTSP and CTSS are set to zero. When set, there is no tx interrupts from the controller. Signed-off-by: David Gounaris Signed-off-by: David S. Miller --- drivers/net/wan/fsl_ucc_hdlc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c index bb52c4dcf22c..4545c782ef4e 100644 --- a/drivers/net/wan/fsl_ucc_hdlc.c +++ b/drivers/net/wan/fsl_ucc_hdlc.c @@ -97,6 +97,12 @@ static int uhdlc_init(struct ucc_hdlc_private *priv) if (priv->tsa) { uf_info->tsa = 1; uf_info->ctsp = 1; + uf_info->cds = 1; + uf_info->ctss = 1; + } else { + uf_info->cds = 0; + uf_info->ctsp = 0; + uf_info->ctss = 0; } /* This sets HPM register in CMXUCR register which configures a From ccb7bc0edd9979b57d2f0becf4d4c7ec62b7202d Mon Sep 17 00:00:00 2001 From: David Gounaris Date: Mon, 3 Sep 2018 14:47:30 +0200 Subject: [PATCH 6/6] net/wan/fsl_ucc_hdlc: tx timeout handler Added tx timeout handler. This helps when troubleshooting. Signed-off-by: David Gounaris Signed-off-by: David S. Miller --- drivers/net/wan/fsl_ucc_hdlc.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c index 4545c782ef4e..8523ade16030 100644 --- a/drivers/net/wan/fsl_ucc_hdlc.c +++ b/drivers/net/wan/fsl_ucc_hdlc.c @@ -999,11 +999,17 @@ static const struct dev_pm_ops uhdlc_pm_ops = { #define HDLC_PM_OPS NULL #endif +static void uhdlc_tx_timeout(struct net_device *ndev) +{ + netdev_err(ndev, "%s\n", __func__); +} + static const struct net_device_ops uhdlc_ops = { .ndo_open = uhdlc_open, .ndo_stop = uhdlc_close, .ndo_start_xmit = hdlc_start_xmit, .ndo_do_ioctl = uhdlc_ioctl, + .ndo_tx_timeout = uhdlc_tx_timeout, }; static int ucc_hdlc_probe(struct platform_device *pdev) @@ -1122,6 +1128,7 @@ static int ucc_hdlc_probe(struct platform_device *pdev) hdlc = dev_to_hdlc(dev); dev->tx_queue_len = 16; dev->netdev_ops = &uhdlc_ops; + dev->watchdog_timeo = 2 * HZ; hdlc->attach = ucc_hdlc_attach; hdlc->xmit = ucc_hdlc_tx; netif_napi_add(dev, &uhdlc_priv->napi, ucc_hdlc_poll, 32);