s390/ctlreg: change parameters of __local_ctl_load() and __local_ctl_store()

Change __local_ctl_load() and __local_ctl_store(), so that control
register parameters come first.

This way all control handling functions consistently have control
register(s) parameter first.

Reviewed-by: Alexander Gordeev <agordeev@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
This commit is contained in:
Heiko Carstens 2023-09-11 21:40:01 +02:00 committed by Vasily Gorbik
parent 2372d39142
commit 8072597826
6 changed files with 12 additions and 12 deletions

View File

@ -35,7 +35,7 @@
#include <linux/bug.h>
#define __local_ctl_load(array, low, high) do { \
#define __local_ctl_load(low, high, array) do { \
struct addrtype { \
char _[sizeof(array)]; \
}; \
@ -53,7 +53,7 @@
: "memory"); \
} while (0)
#define __local_ctl_store(array, low, high) do { \
#define __local_ctl_store(low, high, array) do { \
struct addrtype { \
char _[sizeof(array)]; \
}; \

View File

@ -38,10 +38,10 @@ static void ctl_bit_callback(void *info)
struct ctl_bit_parms *pp = info;
unsigned long regs[16];
__local_ctl_store(regs, 0, 15);
__local_ctl_store(0, 15, regs);
regs[pp->cr] &= pp->andval;
regs[pp->cr] |= pp->orval;
__local_ctl_load(regs, 0, 15);
__local_ctl_load(0, 15, regs);
}
void system_ctl_set_clear_bit(unsigned int cr, unsigned int bit, bool set)

View File

@ -232,12 +232,12 @@ static void enable_singlestep(struct kprobe_ctlblk *kcb,
per_kprobe.end = ip;
/* Save control regs and psw mask */
__local_ctl_store(kcb->kprobe_saved_ctl, 9, 11);
__local_ctl_store(9, 11, kcb->kprobe_saved_ctl);
kcb->kprobe_saved_imask = regs->psw.mask &
(PSW_MASK_PER | PSW_MASK_IO | PSW_MASK_EXT);
/* Set PER control regs, turns on single step for the given address */
__local_ctl_load(per_kprobe, 9, 11);
__local_ctl_load(9, 11, per_kprobe);
regs->psw.mask |= PSW_MASK_PER;
regs->psw.mask &= ~(PSW_MASK_IO | PSW_MASK_EXT);
regs->psw.addr = ip;
@ -249,7 +249,7 @@ static void disable_singlestep(struct kprobe_ctlblk *kcb,
unsigned long ip)
{
/* Restore control regs and psw mask, set new psw address */
__local_ctl_load(kcb->kprobe_saved_ctl, 9, 11);
__local_ctl_load(9, 11, kcb->kprobe_saved_ctl);
regs->psw.mask &= ~PSW_MASK_PER;
regs->psw.mask |= kcb->kprobe_saved_imask;
regs->psw.addr = ip;

View File

@ -104,9 +104,9 @@ void update_cr_regs(struct task_struct *task)
return;
}
regs->psw.mask |= PSW_MASK_PER;
__local_ctl_store(old, 9, 11);
__local_ctl_store(9, 11, old);
if (memcmp(&new, &old, sizeof(struct per_regs)) != 0)
__local_ctl_load(new, 9, 11);
__local_ctl_load(9, 11, new);
}
void user_enable_single_step(struct task_struct *task)

View File

@ -449,7 +449,7 @@ static void __init setup_lowcore(void)
lc->restart_fn = (unsigned long) do_restart;
lc->restart_data = 0;
lc->restart_source = -1U;
__local_ctl_store(lc->cregs_save_area, 0, 15);
__local_ctl_store(0, 15, lc->cregs_save_area);
lc->spinlock_lockval = arch_spin_lockval(0);
lc->spinlock_index = 0;
arch_spin_lock_setup(0);

View File

@ -922,11 +922,11 @@ int __cpu_disable(void)
/* Disable pseudo page faults on this cpu. */
pfault_fini();
/* Disable interrupt sources via control register. */
__local_ctl_store(cregs, 0, 15);
__local_ctl_store(0, 15, cregs);
cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
__local_ctl_load(cregs, 0, 15);
__local_ctl_load(0, 15, cregs);
clear_cpu_flag(CIF_NOHZ_DELAY);
return 0;
}